Van Lunteren, Jan

Patent Trials and Appeals Board

Feb 27, 2020

12970127 - (D) (P.T.A.B. Feb. 27, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/970,127 12/16/2010 Jan Van Lunteren CH920100072US1 5499
74599 7590 02/27/2020
Cantor Colburn LLP-IBM Europe
20 Church Street
22nd Floor
Hartford, CT 06103
EXAMINER
RIFKIN, BEN M
ART UNIT PAPER NUMBER
2123
NOTIFICATION DATE DELIVERY MODE
02/27/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
usptopatentmail@cantorcolburn.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte JAN VAN LUNTEREN
____________

Appeal 2019-001052
Application 12/970,127
Technology Center 2100
____________

Before MAHSHID D. SAADAT, LARRY J. HUME, and
JULIET MITCHELL DIRBA, Administrative Patent Judges.

SAADAT, Administrative Patent Judge.

DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1–5.2 We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as
International Business Machines Corporation. Appeal Br. 2.
2 Claims 6–23 have been withdrawn.
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STATEMENT OF CASE
Introduction
Appellant’s Specification describes “storage efficient programmable
state machines.” See Spec. ¶ 1.
Exemplary claim 1 under appeal reads as follows:
1. A state machine, comprising:
a hardware rule selector controlled by at least one
computer processor, the rule selector being configured to
receive input data, and one or more transition rules, the one or
more transition rules comprising a next state and the input data
including at least one character;
a hardware character classifier controlled by the at least
one computer processor and communicatively coupled to the
rule selector, the character classifier comprising a plurality of
base classes and being configured to receive the at least one
character and to send one or more of the plurality of base
classes to the rule selector in response to receiving the at least
one character and operating on the at least one character as a
whole; and
the rule selector being further configured to select one of
the one or more transition rules in response to determining that
the input character as a whole and one of the plurality of base
classes correspond to the transition rule, and to set a current
state of the state machine to the next state of the selected one of
the one or more transition rules,
wherein the base classes include an at least one first class
comprising a plurality of numerical symbols, at least one
second class comprising a plurality of lower-case alphabetic
symbols, and at least one third class comprising a plurality of
upper-case alphabetic symbols, and
wherein the rule selector is further configured to select
between at least two different input class vectors indicating a
respective base class in response to performing in a parallel a
first comparison between a first input class vector and the
selected one or more transition rules and a second comparison
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between the second input class vector and a selected one or
more transition rules, and to apply the base class indicated by
the selected first input class vector or second input class vector
to the at least one character.
Appeal Br. 18 (Claims Appendix).
The Examiner’s Rejections
Claims 1–5 stand rejected under 35 U.S.C. § 101 for being directed to
patent-ineligible subject matter. Ans. 10–12.3
Claim 1 stands rejected under pre-AIA 35 U.S.C. § 103(a) as being
unpatentable over Wyschogrod (US 2003/0065800 Al; pub. Apr. 3, 2003),
Daniweb (Lookup Tables: How to Perform a Switch Using a String,
accessed at https://www.daniweb.com/software-development/cpp/threads/
65343/lookup-tables-how-to . . .), Bredebusch (A Petri-net Representation of
the Qualitative Behavior of a Dynamical Continuous-Time System,
Intelligent Systems Engineering, 5–9 September 1994, Conference
Publication No. 395, IEE, 1994, pp. 223–228), and Ladner (Parallel Prefix
Computation, University of Washington, Seattle, Washington, Journal of the
Association for Computing Machinery, Vol. 27, No. 4, October 1980, pp.
831–838). See Final Act. 2–6.
Claims 2, 3, and 5 stand rejected under pre-AIA 35 U.S.C. § 103(a) as
being unpatentable over Wyschogrod, Daniweb, Bredebusch, Ladner, and
SML/NJ Library Manual (hereinafter “SML”) (The BitVector Structure,
Copyright© 1998 Bell Labs, Lucent Technologies). See Final Act. 6–8.
Claim 4 stands rejected under pre-AIA 35 U.S.C. § 103(a) as being
unpatentable over Wyschogrod, Daniweb, Bredebusch, Ladner, SML, and

3 The Examiner added the claim rejection under 35 U.S.C. § 101 in the
Answer as a new ground of rejection.
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Faezipour (Constraint Repetition Inspection for Regular Expression on
FPGA, 16th IEEE Symposium on High Performance Interconnects, 2008,
pp. 111–118). See Final Act. 8–9.
ANALYSIS
We review the appealed rejections for error based upon the issues
Appellant identifies, and in light of the arguments and evidence produced
thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential)
cited with approval in In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011)
(“[I]t has long been the Board’s practice to require an applicant to identify
the alleged error in the examiner's rejections.”)). After considering the
argued claims in light of the case law presented in this Appeal and each of
Appellant’s arguments, we are not persuaded of Examiner error in rejecting
claims 1–5 as being directed to unpatentable subject matter, however, we are
persuaded that the Examiner reversibly erred in rejecting claims 1–5 over the
cited prior art references.
CLAIM REJECTION UNDER 35 U.S.C. § 101
Principles of Law
Section 101 of the Patent Act provides that “any new and useful
process, machine, manufacture, or composition of matter, or any new and
useful improvement thereof” is patent eligible. 35 U.S.C. § 101. But the
Supreme Court has long recognized an implicit exception to this section:
“Laws of nature, natural phenomena, and abstract ideas are not patentable.”
Alice Corp. v. CLS Bank Int’l, 573 U.S. 208, 216 (2014) (quoting Ass’n for
Molecular Pathology v. Myriad Genetics, Inc., 569 U.S. 576, 589 (2013)).
To determine whether a claim falls within one of these excluded categories,
the Court has set out a two-part framework. The framework requires us first
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to consider whether the claim is “directed to one of those patent-ineligible
concepts.” Alice, 573 U.S. at 217. If so, we then examine “the elements of
[the] claim both individually and ‘as an ordered combination’ to determine
whether the additional elements ‘transform the nature of the claim’ into a
patent-eligible application.” Alice, 573 U.S. at 217 (quoting Mayo
Collaborative Servs. v. Prometheus Labs., Inc., 566 U.S. 66, 78, 79 (2012)).
That is, we examine the claim for an “inventive concept,” “an element or
combination of elements that is ‘sufficient to ensure that the patent in
practice amounts to significantly more than a patent upon the [ineligible
concept] itself.’” Alice, 573 U.S. at 217–18 (alteration in original) (quoting
Mayo, 566 U.S. at 72–73).
The PTO published revised guidance on the application of section
101. USPTO, 2019 Revised Patent Subject Matter Eligibility Guidance, 84
Fed. Reg. 50 (Jan. 7, 2019) (“Guidance”). Under that guidance, we first
look to whether the claim recites:
(1) any judicial exceptions, including certain groupings of
abstract ideas (i.e., mathematical concepts, certain methods of
organizing human activity such as a fundamental economic
practice, or mental processes); and
(2) additional elements that integrate the judicial exception into
a practical application (see MANUAL OF PATENT EXAMINING
PROCEDURE (“MPEP”) §§ 2106.05(a)–(c), (e)–(h) (9th ed.
2018)).
See 2019 Guidance, 84 Fed. Reg. at 52, 55–56. Only if a claim (1) recites a
judicial exception and (2) does not integrate that exception into a practical
application, do we then look to whether the claim:
(3) adds a specific limitation beyond the judicial exception that
are not “well-understood, routine, conventional” in the field
(see MPEP § 2106.05(d)); or
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(4) simply appends well-understood, routine, conventional
activities previously known to the industry, specified at a high
level of generality, to the judicial exception.
See Guidance, 84 Fed. Reg. at 56.
Under the Guidance, we first look to whether a claim recites (1) any
judicial exceptions, including certain groupings of abstract ideas (i.e.,
mathematical concepts, certain methods of organizing human activity such
as a fundamental economic practice, or mental processes) (“Guidance Step
2A, Prong One”), and (2) additional elements that integrate the judicial
exception into a practical application (see MPEP § 2106.05(a)–(c), (e)–(h))
(“Guidance Step 2A, Prong Two”). Only if a claim (1) recites a judicial
exception and (2) does not integrate that exception into a practical
application, do we then look to whether the claim (3) adds a specific
limitation beyond the judicial exception that is not “well-understood,
routine, conventional” in the field (see MPEP § 2106.05(d)), or (4) simply
appends well-understood, routine, conventional activities previously known
to the industry, specified at a high level of generality, to the judicial
exception (“Guidance Step 2B”).
Discussion
The Examiner rejects claims 1–5 under 35 U.S.C. § 101 as directed to
patent ineligible subject matter. See Ans. 10–12.
The Examiner finds claim 1 is directed to “a hardware rule selector
receiving data, a classifier to receive data and send that data to a rule
selector, a rule selector for selecting transition rules corresponding to the
class, based on at least two different input vectors, with the decision
performed in parallel,” which “amount to no more than the gathering of data,
analysis of that data, and providing select results of the analysis to the user,
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which has been found to be an abstract idea under Electric Power v
Alstrom.” Ans. 10. The Examiner also finds “the additional elements do
not amount to significantly more than the above identified judicial exception
(the abstract idea)” or “the combination of elements improves the
functioning of a computer or improves any other technology.” Ans. 11.
With respect to the other claims, the Examiner finds the additional elements
do not add significantly more than the abstract idea (types of data or rules in
claims 2, 3, and 5) or provide more than “generic and basic circuit elements”
(AND and OR gates in claim 4). Ans. 11–12.
Appellant contends that “a conclusion of an element or combination
of elements as well-understood, routine, and conventional is a question of
fact and must be supported by factual determination as outlined in Section
III of the Berkheimer Memo.” Reply Br. 12. Appellant argues “the
Examiner has neither found, nor expressly supported in writing, Appellant’s
state machine as a whole, or any of the individual claimed elements recited
in claim 1, as being well-understood, routine, and conventional.” Reply
Br. 13. According to Appellant, the recited elements of claim 1 improve the
functionality and operation of the computer by stating:
For instance, performing in a parallel a first comparison
between a first input class vector and the selected one or more
transition rules and a second comparison between the second
input class vector and a selected one or more transition rules
facilitates the capability to generate base class combinations
that can directly be tested by the transition rules selected by the
rule selector, and applied to a base class. The efficiency of
performing this base class mapping directly affects the storage
efficiency of the resulting data structure and consequently
affects the system’s performance because it directly impacts
the processing throughput (i.e., improve throughput
efficiency) through its influence on the cache performance, as
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explicitly described, for example, at paragraphs 0038-0040 of
Appellant’s originally filed application. Further, the base class
mapping operation described in claim 1, for example, achieves
the capability of mapping a large number rules into a smaller
amount of memory, which improves storage efficiency of the
computer system memory as described at paragraph 0066 of the
originally filed Application.
Reply Br. 14. Appellant argues the claims under this rejection as a group.
See generally Reply Br. 12–14. Accordingly, we focus our discussion on
independent claim 1, which we select as representative of the group.
37 C.F.R. § 41.37(c)(1)(iv).
Judicial Exception — Step 2A, Prong One
As indicated above, under Guidance Step 2A, Prong One, we consider
whether claim 1 recites a judicial exception to the statutory categories of
patent-eligible subject matter, including one of the following groupings of
abstract ideas: (1) mathematical concepts, e.g., mathematical relationships,
mathematical formulas or equations, and mathematical calculations; (2)
mental processes, e.g., concepts performed in the human mind, including
observations, evaluations, judgments, and opinions; and (3) certain methods
of organizing human activity. See Guidance, 84 Fed. Reg. at 52.
Claim 1 recites a state machine including a rule selector, a computer
processor, and a character classifier which are configured to perform the
following functions: (1) “to receive input data, and one or more transition
rules;” (2) “to receive the at least one character and to send one or more of
the plurality of base classes to the rule selector;” (3) “to select one of the one
or more transition rules;” (4) “to set a current state of the state machine to
the next state of the selected one of the one or more transition rules;” (5) “to
select between at least two different input class vectors”; and (6) “to apply
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the base class indicated by the selected first input class vector or second
input class vector to the at least one character.” Appeal Br. 18 (Claims
Appendix). The rule selector is recited to be configured “to select between
at least two different input class vectors” that is in response to “performing
in a parallel a first comparison between a first input class vector and the
selected one or more transition rules and a second comparison between the
second input class vector and a selected one or more transition rules.” Id.
Here, apart from the state machine, rule selector, processor, and
character classifier, every limitation of claim 1 recites an abstract idea,
namely concepts performed in the human mind (including an observation,
evaluation, judgment, opinion). The functions related to receiving data and
rules, sending base classes, and selecting transition rules, which determines
the next state do not require a machine, let alone a particular machine, to
implement—and fits squarely within the mental processes category of the
agency’s guidelines. See Guidance, 84 Fed. Reg. at 52 (listing “[m]ental
processes—concepts performed in the human mind (including an
observation, evaluation, judgment, opinion)” as one of the “enumerated
groupings of abstract ideas”). The Guidance explains that “mental
processes” include acts that people can perform in their minds or using pen
and paper, even if the claim recites that a generic computer component
performs the acts. See Guidance, 84 Fed. Reg. at 52 n.14 (“If a claim, under
its broadest reasonable interpretation, covers performance in the mind but
for the recitation of generic computer components, then it is still in the
mental processes category unless the claim cannot practically be performed
in the mind.”); see also Intellectual Ventures I LLC v. Symantec Corp., 838
F.3d 1307, 1318 (Fed. Cir. 2016) (“[W]ith the exception of generic
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computer-implemented steps, there is nothing in the claims themselves that
foreclose them from being performed by a human, mentally or with pen and
paper.”), quoted in 2019 Eligibility Guidance, 84 Fed. Reg. at 52 n.14.
Accordingly, claim 1 recites mental processes, and thus an abstract idea.4
Integration into a Practical Application — Step 2A, Prong Two
Having determined that claim 1 recites the abstract idea of mental
processes, we next look to determine whether the claim recites “additional
elements that integrate the judicial exception into a practical application.”
Guidance, 84 Fed. Reg. at 53–54. According to the Guidance, even if a
claim recites any one of three groupings of abstract ideas, the claim is still
not “directed to” a judicial exception (abstract idea), and thus is patent
eligible, if “the claim as a whole integrates the recited judicial exception into
a practical application of that exception.” Guidance, 84 Fed. Reg. at 53.
Limitations that are indicative of “integration into a practical application”

4 Additionally, applying rules to input data, such as corresponding input
characters to selected transition rules to set a current state of the state
machine to that rule, is directed to processing information. Our reviewing
court treats collecting information, including when limited to a particular
content, as within the realm of abstract ideas. See Electric Power Group,
LLC v. Alstom, S.A., 830 F.3d 1350, 1353 (Fed. Cir. 2016) (citing Internet
Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1349 (Fed. Cir. 2015);
OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363 (Fed. Cir. 2015);
Content Extraction & Transmission LLC v. Wells Fargo Bank, Nat’l Ass’n,
776 F.3d 1343, 1347 (Fed. Cir. 2014); Digitech Image Techs., LLC v. Elecs.
for Imaging, Inc., 758 F.3d 1344, 1351 (Fed. Cir. 2014); CyberSource Corp.
v. Retail Decisions, Inc., 654 F.3d 1366, 1370 (Fed. Cir. 2011)). Merely
presenting the results of abstract processes of collecting and analyzing
information, without more (such as identifying a particular tool for
presentation), is abstract as an ancillary part of such collection and analysis.
See, e.g., Content Extraction, 776 F.3d at 1347; Ultramercial, Inc. v. Hulu,
LLC, 772 F.3d 709, 715 (Fed. Cir. 2014).
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include: (1) improvements to the functioning of a computer, or to any other
technology or technical field (see MPEP § 2106.05(a)); (2) applying the
judicial exception with, or by use of, a particular machine (see id.
§ 2106.05(b)); (3) effecting a transformation or reduction of a particular
article to a different state or thing (see id. § 2106.05(c)); and (4) applying or
using the judicial exception in some other meaningful way beyond generally
linking the use of the judicial exception to a particular technological
environment, such that the claim as a whole is more than a drafting effort
designed to monopolize the exception (see id. § 2106.05(e)). See Guidance,
84 Fed. Reg. at 54–55 (“Prong Two”). In contrast, limitations that are not
indicative of “integration into a practical application” include: (1) adding the
words “apply it” (or an equivalent) with the judicial exception, merely
including instructions to implement an abstract idea on a computer, or
merely using a computer as a tool to perform an abstract idea (see MPEP
§ 2106.05(f)); (2) adding insignificant extra-solution activity to the judicial
exception (see id. § 2106.05(g)); and (3) generally linking the use of the
judicial exception to a particular technological environment or field of use
(see id. § 2106.05(h)). See Guidance, 84 Fed. Reg. at 54–55 (“Prong Two”).
Appellant argues that the recited parallel comparison between two sets
of input class vectors and transition rules “achieves the capability of
mapping a large number [of] rules into a smaller amount of memory, which
improves storage efficiency of the computer system memory as described at
paragraph 0066 of the originally filed Application.” Reply Br. 14. We are
not persuaded because the claim does not recite how the specific base class
mapping affects a computer’s functionality or improves the purported
efficiency in storing “the resulting data structure.” To the contrary, other
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than reciting receiving data and rules, sending base classes, and selecting
transition rules, which determines the next state, no improvement is recited,
explained, or supported. Appeal Br. 18 (Claims Appendix). Appellant’s
argument that the recited “base class mapping” improves the process
throughput (Reply Br. 14 (citing Spec. ¶ 66)) is insufficient to indicate an
integration of the abstract idea into a practical application.
Furthermore, the remaining elements recited in claim 1 do not
integrate these abstract ideas into a practical application. In addition to the
steps discussed above, claim 1 recites a “state machine,” a “rule selector,” at
least one “processor,” and a “hardware character classifier.” The written
description discloses that the recited elements encompass generic
components. See, e.g., Spec. ¶¶ 36, 74; Fig. 2 (Providing no specific
definition for the terms “rule selector” and “character classifier”). Simply
adding generic hardware and computer components to perform abstract ideas
does not integrate those ideas into a practical application. See Guidance, 84
Fed. Reg. at 55 (identifying “merely includ[ing] instructions to implement
an abstract idea on a computer” as an example of when an abstract idea has
not been integrated into a practical application).
Accordingly, we determine that claim 1 as a whole does not integrate
the judicial exception—mental processes—into a practical application of
that exception.
Inventive Concept —Step 2B
Because we determine claim 1 is “directed to” an abstract idea, we
consider whether claim 1 recites an “inventive concept.” Under the
Guidance, if a claim: (1) recites a judicial exception, and (2) does not
integrate that exception into a practical application, we then look to whether
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the claim adds a specific limitation beyond the judicial exception that is not
“well-understood, routine, conventional” in the field (see MPEP
§ 2106.05(d)); or, simply appends well-understood, routine, conventional
activities previously known to the industry, specified at a high level of
generality, to the judicial exception. See Guidance, 84 Fed. Reg. at 56.
The Examiner determined claim 1 does not recite an inventive concept
because “[t]here is no indication that the combination of elements improves
the functioning of a computer or improves any other technology. Their
collective functions merely provide conventional computer implementation.”
See Ans. 11. The Examiner further cited portions of MPEP § 2106.05 to
explain Appellant’s disclosure of the additional claim elements at a high
level of generality indicates the “well-understood, routine, conventional”
nature of their implementation. Ans. 10–11.5
Appellant argues that the Examiner did not provide any evidence to
show the recited features of claim 1 are “well-understood, routine, or
conventional.” Appeal Br. 14. Appellant contends:
In the instant case, the question is whether the claimed
components and their activities are well-understood, routine,
and conventional. The lack of a rejection based on prior art

5 A specification demonstrates the well-understood, routine, conventional
nature of additional elements when it describes the additional elements as
well-understood or routine or conventional (or an equivalent term), as a
commercially available product, or in a manner that indicates that the
additional elements are sufficiently well-known that the specification does
not need to describe the particulars of such additional elements to satisfy
35 U.S.C. § 112(a). Memorandum on Changes in Examination Procedure
Pertaining to Subject Matter Eligibility, Recent Subject Matter Eligibility
Decision (Berkheimer v. HP, Inc.) (Apr. 19, 2018) available at:
https://www.uspto.gov/sites/default/files/documents/memo-berkheimer-
20180419.PDF
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supports a conclusion that the activities are not well-
understood, routine, and conventional. The Examiner has not
established that the claims fail to recite significantly more than
the abstract idea as a matter of fact.
Id.
Appellant’s argument that the Examiner has not found or provided
support that the recited features of claim 1 are “well-understood, routine, or
conventional” (see Reply Br. 13–14) is not persuasive. The Examiner
pointed to the general description of the claimed elements, which indicates
they are sufficiently well-known. We also find Appellant’s claims can be
distinguished from patent-eligible claims such as those in Bascom, for
example, where the system claims were directed to a “content filtering
system for filtering content retrieved from an Internet computer network,”
which the court held were directed to an abstract idea. Bascom Glob.
Internet Servs., Inc. v. AT&T Mobility LLC, 827 F.3d 1341, 1348–49 (Fed.
Cir. 2016). The court further held the claims included an inventive concept
in the ordered combination of system components, including a local client
computer and a remote ISP server connected to the client computer and
Internet computer network providing for “the installation of a filtering tool at
a specific location, remote from the end-users, with customizable filtering
features specific to each end user.” Id. at 1350.
Additionally, Appellant has failed to establish that claim 1 includes a
similar or analogous arrangement or “ordered combination” of components,
and, instead, makes only the conclusory statement that the recited state
machine “achieves the capability of mapping a large number rules into a
smaller amount of memory, which improves storage efficiency of the
computer system memory as described at paragraph 0066 of the originally
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filed Application.” See Reply Br. 14. More specifically, the additional
elements, such as a “state machine,” a “rule selector,” at least one
“processor,” and a “hardware character classifier,” are recited at a high level
of generality, and the written description provides no details about the
“resulting data structure” or its storage efficiency and how the recited
process improves the underlying technology or provides a technological
advancement, but rather, the additional elements process the recited mental
steps faster. See, e.g., Spec. ¶¶ 36, 74; Fig. 2 (describing generic
components without detailed description of their specific processing
functions). See also USPTO, Memorandum on Changes in Examination
Procedure Pertaining to Subject Matter Eligibility, Recent Subject Matter
Eligibility Decision (Berkheimer v. HP, Inc.) at 3 (Apr. 19, 2018).
Consequently, we find that the above-identified claim elements, at the high
level of generality recited in claim 1, constitute no more than what would
have been well-understood, routine and conventional to a skilled artisan.
See Berkheimer v. HP Inc., 881 F.3d 1360, 1368 (2018).
CLAIM REJECTION UNDER 35 U.S.C. § 103
In rejecting claim 1, the Examiner finds Wyschogrod discloses all the
recited elements of the claim including a state machine, a hardware rule
selector, a hardware character classifier, wherein a transition rule is selected
based on the received input data and a plurality of base classes. Final
Act. 2–3 (citing Wyschogrod ¶¶ 45, 50–53). The Examiner further relies on
Daniweb as disclosing “the base classes include an at least one first class
comprising a plurality of numerical symbols,” on Bredebusch as disclosing a
rule selector that is configured “to select between at least two different input
class vectors indicating a respective base class . . . a first comparison . . .
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and a second comparison . . ., and to apply the base class . . . to the at least
one character,” and on Ladner as disclosing “in response to performing in a
parallel a first comparison.” Final Act. 4 (citing Bredebusch pp. 227–228;
Ladner p. 1). The Examiner finds it would have been obvious to one of
ordinary skill in the art “to combine the work of Wyschogrod and Daniweb
in order to make use of strings for lookup tables,” “to combine the work of
Bredebusch and Wyschogrod in order to select the best input vector to use in
a situation,” and “to combine the work of Ladner and Wyschogrod modified
by Bredebusch in order to make use of parallel processes.” See Final Act.
4–6.
Appellant contends the Examiner’s rejection is in error because
[T]he Petri-net algorithm (Algorithm 1) relied upon by the
Examiner to cure the deficiencies of the cited art does not
operate in the manner contended by the Examiner. In fact, the
Petri-net operates in a manner that is fundamentally different
than the mode of operation contended by the Examiner.
Consequently, one of ordinary skill in the art would have no
reasonable expectation of successfully reconstructing
Appellant’s state machine as claimed if the teachings of
Wyschogrod and Daniweb were modified to employ
Bredebusch’s Algorithm 1 as contended by the Examiner.
Appeal Br. 6. According to Appellant, “the principle operation of using a
Petri-net algorithm prevents modifying Bredebusch’s system from
inputting parallel input variables, let alone allows for Bredebusch’s
system to input variables in parallel.” Appeal Br. 7. Appellant refers to
page 227 of Bredebusch and further argues:
More specifically, a Petri-net algorithm (i.e., Algorithm 1) is a
vector-based calculation, and each calculation must be done
sequentially i.e., one at a time – not in parallel (see Id., page
224, left column). The output/result of each calculation is a
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function of the input vector. Thus, each input vector is input to
the algorithm one-by-one in a serial manner, the algorithm
calculates the output/result based on the current input vector,
the output/result is mapped, and the process is repeated with a
new input vector. Only then can the results corresponding to
each input vector (i.e., the mapped results) be compared.
Appeal Br. 8. Appellant reasons “[b]ecause Bredbusch’s system is so
fundamentally different, one of ordinary skill in the art would not have a
reasonable motivation to combine Bredbusch’s teachings with Wyschogrod
in order to produce Appellant’s fundamentally different system recited in
claim 1 without first learning of Appellant’s invention.” Appeal Br. 9.6
In response, the Examiner finds that Bredebusch describes the
Algorithm 1 as having “one or more input vectors,” which “clearly shows
that the system has more than one input vector at once.” Ans. 12–13. The
Examiner explains that this disclosure of multiple input vectors indicates
“use of parallel processing.” Ans. 15.
Based on a review of the applied prior art references, and specifically
Bredebusch, we are persuaded by Appellant’s contentions that the Examiner
has not explained how a petri-net state machine processes the input vectors
in parallel, as required by Appellant’s claim 1. Although Bredebusch
discusses computing one or more input vectors, the algorithm used in the
state machine is based on serial processing “where every transition has
exactly one input place and one output place.” Bredebusch p. 224; see also
Reply Br. 4–6. In other words, it is not clear how the teaching of parallel
processing of Ladner, in combination with the state machine of Wyschogrod

6 We do not address Appellant’s other contentions because this contention is
dispositive of the issue on appeal.
Appeal 2019-001052
Application 12/970,127

18
and Bredebusch, meets the above-mentioned disputed claim limitation
because the Examiner has not identified any elements in the combination of
these references that allows selecting two different input class vectors in
response to performing a comparison between the vectors and the transition
rules in parallel.
Therefore, Appellant’s arguments have persuaded us of error in the
Examiner’s position with respect to the rejections of independent claim 1.
The Examiner has not identified any teachings in the other applied prior art
that would make up for the above-mentioned deficiency. We, therefore, do
not sustain the rejections of claim 1, as well as claims 2–5 dependent
therefrom.
DECISION SUMMARY
In summary:
Claims
Rejected
35 U.S.C. § Reference(s)/Basis Affirmed Reversed
1–5 101 Eligibility 1–5
1 103 Wyschogrod, Daniweb,
Bredebusch, Ladner
1
2, 3, 5 103 Wyschogrod, Daniweb,
Bredebusch, Ladner,
SML
2, 3, 5
4 103 Wyschogrod, Daniweb,
Bredebusch, Ladner,
SML, Faezipour
4
Overall
Outcome
1–5

Appeal 2019-001052
Application 12/970,127

19
TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED