Texas Instruments Incorporated

Patent Trials and Appeals Board

Oct 22, 2021

2020005054 (P.T.A.B. Oct. 22, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/684,620 08/23/2017 Dan Okamoto TI-76720A 8151
23494 7590 10/22/2021
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, MS 3999
DALLAS, TX 75265
EXAMINER
KIELIN, ERIK J
ART UNIT PAPER NUMBER
2814
NOTIFICATION DATE DELIVERY MODE
10/22/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte DAN OKAMOTO
Appeal 2020-005054
Application 15/684,620
Technology Center 2800
Before LINDA M. GAUDETTE, JEFFREY B. ROBERTSON, and
JENNIFER R. GUPTA, Administrative Patent Judges.
GAUDETTE, Administrative Patent Judge.
DECISION ON APPEAL1
The Appellant2 appeals under 35 U.S.C. § 134(a) from the Examiner’s
decision finally rejecting claims 33–37 and 39–43.3
We affirm.

1 The following documents are of record: Specification filed August 23,
2017 (“Spec.”); Final Office Action dated October 25, 2019 (“Final Act.”);
Appeal Brief filed March 27, 2020 (“Appeal Br.”), citations to pages 15–17
being to the Claims Appendix; Examiner’s Answer dated April 20, 2020
(“Ans.”); and Reply Brief filed June 22, 2020 (“Reply Br.”).
2 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. The
Appellant identifies the real party in interest as Texas Instruments
Incorporated. Appeal Br. 3.
3 We have jurisdiction under 35 U.S.C. § 6(b).
Appeal 2020-005054
Application 15/684,620
2

CLAIMED SUBJECT MATTER
The invention relates to lead frames used in integrated circuit (IC)
packaging. Spec. ¶ 2. Semiconductor Small Outline No-Lead (SON) and Quad
Flat No-Lead (QFN) are typically fabricated by assembling multiple IC chips
on a leadframe strip. Id. ¶ 3. The leadframe strip includes multiple leadframes,
each comprising an IC chip attached to an IC chip pad and electrically
connected to coordinated wirebond pads by wirebonds. Id. ¶¶ 3, 5. Each lead
frame’s bondwire pads are connected directly to an adjacent leadframe’s
wirebond pads by saw streets. Id. ¶ 3. Except for areas intended for
soldering—e.g., the bottom surfaces of the wirebond and chip pads which are
subsequently solder-connected to the circuit board’s metal pads—the
assembled leadframe strip is encapsulated in a protective plastic compound.
Id. ¶¶ 5, 6. The discrete packaged IC chips are then singulated from the
assembled leadframe strip by cutting through the encapsulating compound and
the plated metal saw streets. Id. ¶ 6.
A drawback of singulation is that it exposes the metal wirebond pads’
side surfaces. Spec. ¶ 8. The unprotected metal may oxidize, preventing solder
from wetting the wirebond pads’ side surfaces and forming strong bonds when
the IC chips are attached by soldering to a printed circuit board. Id. The
invention addresses this drawback by forming the saw streets and lead frames’
outer surfaces primarily of solder. Id. ¶ 9. Claim 33, reproduced below, is
illustrative of the claimed subject matter:
33. An integrated circuit (IC) package comprising:
a chip pad and a plurality of wire bond pads;
an IC chip on the chip pad and electrically connected via
wire bond to a top surface of at least one of the plurality of wire
bond pads;
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Application 15/684,620
3

a vertical surface of the at least one of the plurality of
wire bond pads exposed from the IC package, the vertical
surface including a surface of a base metal of the wire bond
pad exposed between surfaces of solder portions, the surface of
the base metal and the surfaces of the solder portions being
coplanar, the at least one of the plurality of wire bond pads
including a bottom surface at an angle with respect to the
vertical surface, at least a section of one of the solder portions
extending beyond a plane along the bottom surface of the wire
bond pads; and
a plastic compound covering portions of the IC chip, the
chip pad and the plurality of wire bond pads, wherein the
plastic compound includes a surface coplanar with the vertical
surface; wherein a bottom surface of the plastic compound is
coplanar with the plane along the bottom surface of the wire
bond pads.
Appeal Br. 15 (emphases added).
REJECTIONS
1. Claims 33, 35–37, and 40–43 are rejected under 35 U.S.C. § 103
as unpatentable over Kierse (US 2014/0035113 A1, pub. Feb. 6, 2014) and
Fujisawa (US 2012/0108013 A1, pub. May 3, 2012), as evidenced by or in
view of Sugihara (US 2001/0052643 A1, pub. Dec. 20, 2001). Final Act. 3–8.
2. Claim 34 is rejected under 35 U.S.C. § 103 as unpatentable over
Kierse and Fujisawa, as evidenced by or in view of Sugihara, further in view
of Fontana (US 2016/0351476 A1, pub. Dec. 1, 2016). Final Act. 8–9.
3. Claim 39 is rejected under 35 U.S.C. § 103 as unpatentable over
Kierse and Fujisawa, as evidenced by or in view of Sugihara, further in view
of Ito (US 2003/0178723 A1, pub. Sept. 25, 2003). Final Act. 9–11.
4. Claims 33–37, 39, and 41–43 are rejected under 35 U.S.C. § 103
as unpatentable over Kasuya (US 2010/0013069 A1, pub. Jan. 21, 2010) and
Hess (US 2011/0108965 A1, pub. May 12, 2011). Final Act. 11–18.
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Application 15/684,620
4

5. Claim 40 is rejected under 35 U.S.C. § 103 as unpatentable over
Kasuya and Hess, further in view of Fontana. Final Act. 18–19.
OPINION
The Examiner rejected all pending claims as obvious over (1) Kierse
and Fujisawa, and (2) Kasuya and Hess.4 Final Act. 3–19. The Appellant’s
arguments are limited to independent claims 33 and 41. See generally Appeal
Br. 5–13. Further, the Appellant’s arguments are directed to similar
limitations in claims 33 and 41. Compare id. at 5–9, 11–12 (claim 33
arguments), with id. at 9–13 (claim 41 arguments); see also Ans. 30, 32
(“Appellant separately argues claim 41 but provides no arguments different
from those used to traverse the rejection of claim 33.”). For convenience, we
refer to the Examiner’s and the Appellant’s respective positions as to claim 33
only.
Rejections over Kierse and Fujisawa5
The Appellant argues that the Examiner reversibly erred in finding that
the ordinary artisan would have fabricated Kierse’s IC package such that the
plastic compound’s and the wire bond pads’ bottom surfaces were coplanar, as
required by claim 33’s final wherein clause. See Appeal Br. 6. The
Appellant’s argument is persuasive for the reasons discussed below.

4 As indicated in the above-listed grounds of rejection, the Examiner relies
on additional references in rejecting various dependent claims.
5 The Appellant does not dispute the Examiner’s alternative findings that (1)
Sugihara evidences the suitability of SnPb solder for application to lead
frame leads and ordinary plastic for molding semiconductor packages or (2)
suggests the use of these materials for Kierse’s plating layers and molding
material. See Ans. 6; see generally Appeal Br. 3–19.
Appeal 2020-005054
Application 15/684,620
5

Kierse discloses a method of making an IC device package from a
leadframe having an array of multiple leadframe device cells. See Kierse ¶ 47.
Kierse describes forming lead regions 24 and die attach pad regions 23 by
etching trenches 19 through the leadframe’s top surface. Id. ¶ 51. Referring to
Figure 2C, Kierse discloses etching top surface 16 “at least partially through
the thickness of the leadframe to define the lead regions 24 and the die attach
pad regions 23 which remain connected to one another by thinned portions of
the leadframe.” Id. (emphasis added). Kierse discloses a subsequent step of
etching partially through the leadframe’s bottom surface 15 to create a
plurality of recessed regions 20 through the bottom side of lead regions 24
that roughly define portions of each lead 4’s outer ends in the completed
package. Id. ¶ 52. Kierse teaches that “the leadframe remains intact at this
stage of processing.” Id. In subsequent steps, an integrated device die is
mounted on die attach pad region 23 and electrically connected to lead regions
24 via wire bonds 5. Id. ¶ 58. Package body 6 is formed by applying a
molding material over the leadframe that fills trenches 19 to encapsulate
the integrated device dies 9, the wire bonds 5, and the leadframe’s top surface
16. Id. The leadframe material underlying the trench 19 is then removed by a
suitable technique, such as etching until the etchant reaches the molding
material within trench 19. Id. ¶ 59.
The Appellant argues that because Kierse removes the leadframe
material underlying trench 19 after trench 19 is filled with the molding
material (a plastic compound), the molding material’s bottom surface cannot
be coplanar with the bottom surfaces of lead regions 24 (the wire bond pads).
Appeal Br. 6.
The Examiner acknowledges that in Figure 2C, Kierse illustrates
forming trenches 19 that extend only partially through the leadframe
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Application 15/684,620
6

material’s thickness, but finds that paragraph 51’s description of etching “at
least” partially through the leadframe material’s thickness “implies that
trenches 19 may extend all the way through the thickness of the lead frame
material.” Ans. 23 (emphasis omitted). As to Kierse’s teaching that “‘thinned
portions of the leadframe’ remain to connect the lead regions 24 and die pad
regions 23,” the Examiner finds that the thinned portions may be tie bars as
used in Fujisawa’s Figure 5 embodiment when forming coplanar bottom
surfaces of plastic molding material 2, wire bond pads 5, and chip pad 3. Id.
(quoting Kierse ¶ 51); Final Act. 6.
The problem with these findings is that they are based on speculative
assumptions as to Kierse’s teachings. The Examiner has not cited evidence to
support a finding that the ordinary artisan would have understood Kierse’s
description of etching “at least partially through” the lead frame material
(Kierse ¶ 51) as meaning completely through. To the contrary, Kierse’s
description of removing leadframe material below trenches 19 (id. ¶ 59)
supports the Appellant’s position that Kierse does not disclose or suggest
etching through the entire leadframe material’s thickness. Likewise, the
Examiner has not identified persuasive evidence to support a finding that
Kierse discloses or suggests tie bars. The Examiner’s finding that Fujisawa
teaches the known use of tie bars does not amount to a teaching that Kierse
discloses or suggests the use of tie bars. Although the Examiner finds that the
ordinary artisan could have modified Kierse’s method to form coplanar
molding material and lead region bottom surfaces by adding Fujisawa’s tie
bars (Ans. 24; see also Final Act. 6), the Examiner has not provided a
persuasive reason why the ordinary artisan would have made this
modification. See, e.g., In re Gordon, 733 F.2d 900, 902 (Fed. Cir. 1984)
(explaining that although a prior art device could have been turned upside
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down, that did not make the modification obvious unless the prior art fairly
suggested the desirability of turning the device upside down.).
Because the Examiner has not established a prima facie case of
obviousness as to independent claims 33 and 41, we do not sustain the
rejection of those claims or the rejections of their dependent claims as obvious
over the combination of Kierse and Fujisawa.
Rejections over Kasuya and Hess
The Examiner found, and the Appellant does not dispute, that Kasuya
discloses the claim 33 invention except for “the vertical surface including a
surface of a base metal of the wire bond pad exposed between surfaces of
solder portions.” See Final Act. 11–12; Appeal Br. 11–12. Instead, Kasuya
discloses a vertical surface comprising a single solder portion (12) adjacent an
exposed surface (9b) of a wire bond pad’s base metal. Kasuya ¶¶ 49, 51; see
Final Act. 12. The Examiner found that the ordinary artisan would have
included a second solder portion on Kasuya’s vertical surface—such that
exposed surface (9b) of a wire bond pad’s base metal is between surfaces of
the solder surfaces—based on Hess’s teaching that providing more solder
improves wettability, “allow[ing] for the formation of a solder joint with
higher strength, increased reliability, and a longer operational life” (Hess
¶ 36). See Final Act. 13; Ans. 31 (“Hess teaches a configuration having more
solder wettable surface area and less exposed lead area is better for forming a
reliable solder bond.”).
The Appellant argues that Kasuya forms solder portion 12 to prevent
the lead material, i.e., copper, from elongating and forming a downwardly
extending burr during the dicing step. Appeal Br. 11 (citing Kasuya ¶ 8). The
Appellant argues that Kasuya is not concerned with a burr forming on the
other side of the exposed lead surface and, therefore, there would have been
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Application 15/684,620
8

no reason to modify Kasuya to include a second solder portion as disclosed in
Hess. Id. at 12. The Appellant further argues that there is no evidence in
Kasuya and Hess that including one more solder-containing groove on the top
portion of the lead of Kasuya would improve wettability. See id.
The Appellant’s arguments are not persuasive of reversible error. As
indicated by the Examiner (Ans. 30), the test for obviousness is what the
collective teachings of the prior art would have suggested to one of ordinary
skill in the art. In re Young, 927 F.2d 588, 591 (Fed. Cir. 1991). Hess teaches
that including a solder wettable material over the entire exposed lead surface
or on opposite sides of the exposed lead surface improves bonding to the
substrate. See Hess ¶ 50, Fig. 14. “[I]f a technique has been used to improve
one device, and a person of ordinary skill in the art would recognize that it
would improve similar devices in the same way, using the technique is
obvious unless its actual application is beyond his or her skill.” KSR Int’l Co.
v. Teleflex Inc., 550 U.S. 398, 417 (2007). The Appellant has not explained
persuasively why Hess’s technique would not have been expected to provide a
similar improvement to Kasuya’s device or shown that such modification to
Kasuya’s device would have been beyond the ordinary artisan’s skill level.
Because the Appellant has not identified reversible error in the
Examiner’s determination that the claimed subject matter would have been
obvious over the combination of Kasuya and Hess, we sustain above-listed
rejections 4 and 5.
Appeal 2020-005054
Application 15/684,620
9

DECISION SUMMARY
Claims
Rejected
35 U.S.C. § Reference(s)/Basis  Affirmed Reversed
33, 35–37,
40–43
103 Kierse, Fujisawa,
Sugihara
33, 35–37,
40–43
34 103 Kierse, Fujisawa,
Sugihara, Fontana
34
39 103 Kierse, Fujisawa,
Sugihara, Ito
39
33–37, 39,
41–43
103 Kasuya, Hess 33–37, 39,
41–43

40 103 Kasuya, Hess,
Fontana
40
Overall
Outcome:

33–37, 39–
43

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED