NVIDIA Corporationv.Samsung Electronics Co., Ltd.Download PDFPatent Trial and Appeal BoardOct 20, 201512193952 (P.T.A.B. Oct. 20, 2015) Copy Citation Trials@uspto.gov Paper: 7 571-272-7822 Entered: October 20, 2015 UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ NVIDIA CORPORATION, Petitioner, v. SAMSUNG ELECTRONICS CO., LTD, Patent Owner. ____________ Case IPR2015-01135 Patent 7,804,734 B2 ____________ Before KEVIN F. TURNER, BEVERLY M. BUNTING, and JON B. TORNQUIST, Administrative Patent Judges. TORNQUIST, Administrative Patent Judge. DECISION Denying Institution of Inter Partes Review 37 C.F.R. § 42.108 IPR2015-01135 Patent 7,804,734 B2 2 I. INTRODUCTION A. Background NVIDIA Corporation (“Petitioner”) filed a Petition (Paper 2, “Pet.”) requesting inter partes review of claims 1, 7–9, 12, 13, 17, and 19 of U.S. Patent No. 7,804,734 B2 (Ex. 1101, “the ’734 patent”). Samsung Electronics Co., Ltd. (“Patent Owner”) filed a Preliminary Response (Paper 6, “Prelim. Resp.”) to the Petition. We have jurisdiction under 35 U.S.C. § 314(a), which provides that an inter partes review may not be instituted “unless . . . there is a reasonable likelihood that the petitioner would prevail with respect to at least 1 of the claims challenged in the petition.” For the reasons set forth below, we do not institute an inter partes review for the challenged claims. B. Related Proceedings The parties inform us that the ’734 patent is the subject of a Petition for inter partes review in IPR2015-01068 and an investigation before the International Trade Commission: Certain Graphics Processing Chips, Systems on a Chip, and Products Containing the Same, 337-TA-941 (USITC). Pet. 4–5; Paper 5, 2. Patent Owner also identifies IPR2015-01062 and IPR2015-01065 as related to the current proceeding. Pet. 5. C. The ’734 Patent The ’734 patent discloses a data strobe buffer, and a memory system containing the same, that can be interfaced to different types of semiconductor memory devices. Ex. 1101, 1:15–19. In one embodiment of the ’734 patent, during a read operation in a first mode, the data strobe buffer receives a data strobe signal, compares this signal with a reference IPR2015-01135 Patent 7,804,734 B2 3 voltage Vref, and outputs a new data strobe signal based on the results of the comparison. Id. at 4:32–37. During a read operation in a second mode, the data strobe buffer receives a data strobe signal and passes this signal without comparing it with the reference voltage Vref. Id. at 4:44–48. According to the ’734 patent, the first mode may be an operating mode of the data strobe buffer when the data strobe buffer interfaces with Double-Data-Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) and the second mode may be an operating mode of the data strobe buffer when the data strobe buffer interfaces with Mobile Double-Data-Rate (MDDR) SDRAM. Id. at 1:21–27, 4:37–39, 4:48–51, 5:13–16, 5:25–30, Figs. 3A, 3B. D. Illustrative Claim Of the challenged claims, claims 1 and 17 are independent. Claim 1 is illustrative of the challenged claims and is reproduced below: 1. A data strobe buffer comprising: a first input/output node; a first driver coupled to the first input/output node, the first driver configured to output a first data strobe signal to the first input/output node during a write operation; and a first receiver coupled to receive a second data strobe signal from the first input/output node and output a third data strobe signal during a read operation when the data strobe buffer is in a first or second mode, the first receiver configured to compare the second data strobe signal with a first reference voltage and output a result of the comparison as the third data strobe signal when the data strobe buffer is in the first mode, the receiver further configured to not compare the second data strobe signal with the first reference voltage when the data strobe buffer is in the second mode. Ex. 1101, 8:27–42. IPR2015-01135 Patent 7,804,734 B2 4 E. The Asserted Ground of Unpatentability Petitioner asserts the following ground of unpatentability (Pet. 5): Whether claims 1, 7–9, 12, 13, 17, and 19 are unpatentable under 35 U.S.C. § 103 as having been obvious over Seo 1 and Kong. 2 II. ANALYSIS A. Claim Construction In an inter partes review, “[a] claim in an unexpired patent shall be given its broadest reasonable construction in light of the specification of the patent in which it appears.” 37 C.F.R. § 42.100(b); In re Cuozzo Speed Tech., LLC, 793 F.3d 1268, 1275–79 (Fed. Cir. 2015). In determining the broadest reasonable construction, we presume that claim terms carry their ordinary and customary meaning. See In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007). This presumption may be rebutted when a patentee, acting as a lexicographer, sets forth an alternate definition of a term in the specification with reasonable clarity, deliberateness, and precision. In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994). Petitioner proffers claim constructions for four terms: “coupled,” “data strobe signal,” “data strobe bar signal,” and “input/output node.” Pet. 13–14. Patent Owner proposes constructions for the terms “mode” and “input/output node.” Prelim. Resp. 8–14. Upon review of the record, we determine that no claim terms need be construed for purposes of this decision. 3 See Vivid Techs., Inc. v. Am. Sci. & 1 U.S. Patent No. 6,819,602 B2, issued Nov. 16, 2004 (Ex. 1103). 2 U.S. Patent No. 7,173,871 B2, issued Feb. 6, 2007 (Ex. 1104). 3 We discuss below the terms “read” and “write,” as used in the context of the ’734 patent. IPR2015-01135 Patent 7,804,734 B2 5 Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999) (“only those terms need be construed that are in controversy and only to the extent necessary to resolve the controversy.”) B. Obviousness Based on Seo and Kong Petitioner contends that claims 1, 7–9, 12, 13, 17, and 19 of the ’734 patent are unpatentable under 35 U.S.C. § 103 in view of Seo and Kong. Pet. 32–55. In support of its contentions, Petitioner relies on the declaration testimony of Dr. Bruce Jacob (Ex. 1107). For the reasons that follow, we determine Petitioner has not demonstrated a reasonable likelihood of prevailing as to claims 1, 7–9, 12, 13, 17, and 19 of the ’734 patent. 1. Seo Seo is directed to a multimode data buffer and a method for controlling propagation time delay for a semiconductor memory device. Ex. 1103, 1:15–17. Figure 2 of Seo is reproduced below: Figure 2 a block diagram of a data strobe input buffer of Seo. Seo discloses that data strobe input buffer 13 of Figure 2 may be a single mode/dual mode (SM/DM) double-use data strobe input buffer that, in IPR2015-01135 Patent 7,804,734 B2 6 response to a control signal (CNT/CNTB), differentially amplifies data strobe signal (DQS) and reference voltage (VREF) when in single mode (SM) and differentially amplifies data strobe signal (DQS) and inverse data strobe signal (DQSB) when in dual mode (DM). Id. at 7:48–54, 7:63–67, 8:4–8. 2. Kong “Kong discloses a semiconductor memory device containing a circuit for inputting and outputting a bi-directional data strobe signal.” Ex. 1107 ¶ 84 (citing Ex. 1104, 1:14–18, Abstract). Figure 3 of Kong is reproduced below: Figure 3 illustrates circuit diagrams of a data strobe input and output buffer and a control circuit contained in a semiconductor memory device. IPR2015-01135 Patent 7,804,734 B2 7 Dr. Jacob testifies that, although the process of driving the data strobe signal is not disclosed in Seo, including whether the data strobe buffer is uni-directional or bi-directional, circuits for driving a bi-directional data strobe are disclosed in Kong. Ex. 1107 ¶ 99. Specifically, Dr. Jacob testifies that element 32 of Kong is a data-strobe input buffer and element 34 of Kong is a data-strobe output buffer. Id. ¶ 100. 3. Analysis Independent claims 1 and 17 both require a driver “configured to output a first data strobe signal to the first input/output node during a write operation” and a “receiver coupled to receive a second data strobe signal from the first input/output node and output a third data strobe signal during a read operation.” Ex. 1101, 8:30–34, 10:26–31. Both parties agree that, as used in the claims of the ’734 patent, the term “read” means to read data from a memory device and the term “write” means to write data to a memory device. Pet. 11 (noting that in the ’734 patent “a driver is used to drive a data strobe signal to the memory device during a write operation”), 25; Ex. 1107 ¶ 32; Prelim. Resp. 15–16; see also Ex. 1101, 3:52–56, 3:65– 4:2 (noting that the “data strobe buffer 190 provides a first data strobe signal DQS_1 to the memory device 200 during a write operation, and is provided with a second data strobe signal DQS_2 by the memory device 200 during a read operation”). Petitioner argues, however, that a write operation from the perspective of a memory controller is the equivalent of a read operation from the perspective of the memory device. Likewise, Petitioner argues that a read operation from the perspective of a memory controller is the equivalent of a write operation from the perspective of the memory device. Pet. 25 (citing IPR2015-01135 Patent 7,804,734 B2 8 Ex. 1107 ¶¶ 89–92), 35 (citing Ex. 1107 ¶¶ 127–128), 37 (citing Ex. 1107 ¶ 133). According to Petitioner, the situation is akin to cars that drive on the left or right side of the road, but have the same components and work the same way. Id. at 24. Petitioner concludes, therefore, that the “location and perspective of the data strobe buffer does not alter the invalidity analysis.” Id. at 25 (citing Ex. 1107 ¶¶ 89–92). Patent Owner asserts the challenged claims would not have been obvious over Seo and Kong because neither reference discloses a data strobe buffer for use in a memory controller. Prelim. Resp. 15–16. In particular, Patent Owner asserts that both Seo and Kong are directed to data strobe buffers for use in a memory device, which would not output a data strobe signal during a “write” operation or receive a data strobe signal during a “read” operation, as recited in claim 1 of the ’734 patent. Id. at 16–17. According to Patent Owner, the difference in placement between the data strobe buffer of Seo and Kong and the data strobe buffer of the ’734 patent is “fundamental,” because placement of the data strobe buffer in the memory controller enables the memory controller to operate in conjunction with varying types of memory devices. Id. at 16. Patent Owner’s argument is persuasive. As discussed above, Petitioner concedes that neither Seo nor Kong discloses a data strobe buffer that outputs a data strobe signal during a “write operation” or that receives a data strobe signal during a “read operation.” Pet. 35 (“Kong discloses a ‘read’ operation in which the data strobe is output . . . .”); see also Ex. 1107 ¶ 90 (Dr. Jacob testifying that, “[w]hen Seo or Kong talk about outputting a data strobe signal, they are talking about a read operation, because a DRAM outputs the data and data strobe signals during a read operation”). Thus, we IPR2015-01135 Patent 7,804,734 B2 9 are not persuaded that Seo and Kong explicitly disclose or suggest a “first driver configured to output a first data strobe signal to the first input/output node during a write operation” or a receiver “coupled to receive a second data strobe signal from the first input/output node and output a third data strobe signal during a read operation,” as recited in claim 1 of the ’734 patent. Ex. 1101, 8:29–34. Petitioner’s argument that the function of the two data strobe buffers is equivalent, i.e., “regardless of where the data strobe buffer is located (in the memory controller or memory device) it is used for both write and read operations,” is not persuasive, because this argument does not address the claims as written. Pet. 24. Moreover, as noted by Patent Owner, Petitioner does not persuasively argue that it would have been obvious to place the data strobe buffer of Seo and Kong in a memory controller, as opposed to a memory device, such that the data strobe buffer would output a data strobe signal “during a write operation” and receive a data strobe signal “during a read operation.” Prelim Resp. 17 (“Petitioner does not—and cannot—allege that it would have been obvious to place the combined system of Seo and Kong in a memory controller.”). Thus, we are not persuaded that the combination of Seo and Kong, as formulated by Petitioner, discloses or suggests every limitation of independent claims 1 and 17 of the ’734 patent. 4. Conclusion Based on the foregoing, and on the arguments presented in the Petition, Petitioner has not demonstrated a reasonable likelihood that independent claims 1 and 17 would have been obvious over Seo and Kong. As dependent claims 7–9, 12, 13, and 19 each depend from claim 1 or claim IPR2015-01135 Patent 7,804,734 B2 10 17, we are likewise not persuaded that these claims would have been obvious over Seo and Kong. III. ORDER In consideration of the foregoing, it is hereby: ORDERED that pursuant to 35 U.S.C. § 314(a), an inter partes review is not instituted. IPR2015-01135 Patent 7,804,734 B2 11 PETITIONER: Bob Steinberg Julie Holloway Latham & Watkins LLP bob.steinberg@lw.com Julie.Holloway@lw.com PATENT OWNER: Robert Appleby Gregory Arovas Kirkland & Ellis LLP robert.appleby@kirkland.com greg.arovas@kirkland.com Copy with citationCopy as parenthetical citation