Franz Hirler et al.

Patent Trials and Appeals Board

Aug 15, 2019

14968540 - (D) (P.T.A.B. Aug. 15, 2019)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/968,540 12/14/2015 Franz Hirler 1012-1264/2012P51527
US01
2813
57579 7590 08/15/2019
MURPHY, BILAK & HOMILLER/INFINEON TECHNOLOGIES
1255 Crescent Green
Suite 200
CARY, NC 27518
EXAMINER
ALMO, KHAREEM E
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
08/15/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
official@mbhiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte FRANZ HIRLER, ANTON MAUDER, and FRANK PFIRSCH
____________

Appeal 2018-009025
Application 14/968,540
Technology Center 2800
____________

Before BRADLEY R. GARRIS, CATHERINE Q. TIMM, and LINDA M.
GAUDETTE, Administrative Patent Judges.

GAUDETTE, Administrative Patent Judge.

DECISION ON APPEAL1

The Appellant2 appeals under 35 U.S.C. § 134(a) from the Examiner’s
decision finally rejecting claims 1–35 under 35 U.S.C. § 103 over Lobsiger (US
2012/0098577 A1, published April 26, 2012) in view of Kawahara (US 5,719,529,
issued February 17, 1998).3
We REVERSE.

1 This Decision includes citations to the following documents: Specification filed
December 14, 2015 (“Spec.”); Final Office Action dated August 4, 2017 (“Final”);
Appeal Brief filed March 7, 2018 (“Appeal Br.”); Examiner’s Answer dated July
24, 2018 (“Ans.”); and Reply Brief filed September 24, 2018 (“Reply Br.”).
2 The Appellant is the Applicant, Infineon Technologies Austria AG, also
identified as the real party in interest. Appeal Br. 2.
3 We have jurisdiction under 35 U.S.C. § 6(b).
Appeal 2018-009025
Application 14/968,540

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The Specification describes the technical field of the invention as “relat[ing]
to a circuit with a plurality of bipolar transistors and to a method for controlling
such circuit.” Spec. ¶ 1. The Background Section of the Specification discloses that
“[b]ipolar transistors such as IGBTs (Insulated Gate Bipolar Transistors) are
widely used in different applications in the automotive and industrial field. . . .
Within such applications, the IGBTs may be cyclically switched on and off.” Id.
¶ 2. The Specification discloses that “[w]hen an operation state of [a]
semiconductor device changes from a conducting state to a non-conducting state,”
n-type and p-type charge carriers stored in the semiconductor device when in a
conducting state, “have to be removed from the respective device . . . [by a] reverse
recovery process.” Id. ¶ 5. “During the reverse recovery process, the charge
carriers flowing out of the device cause a reverse current. This reverse current
multiplied with the voltage across the device during the reverse recovery process
equals the power losses resulting from the reverse recovery process.” Id.
According to the Specification,
the current rating of a device is chosen in accordance with the highest
currents occurring in an application in which the device is
implemented. A device with a high current rating has a large chip size
and has a high reverse recovery charge. When the device operates at
currents below the current rating, the device is over-dimensioned so
that at low currents relatively high losses resulting from the reverse
recovery charge occur.
Id. ¶ 7. The Specification discloses that a goal of the invention is “to reduce
transistor and diode losses in electronic circuit applications, in particular in power
electronics applications.” Id. ¶ 8.
Claim 1 is representative of the claims on appeal, and is reproduced below.
1. A method for operating a circuit, the circuit comprising a first
node, a second node and a plurality of transistors coupled in parallel
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Application 14/968,540

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between the first node and the second node, the method comprising in
one drive cycle:
switching on transistors of a first group of the plurality of
transistors at the same time, the first group comprising a
first subgroup and a second subgroup and each of the
first subgroup and the second subgroup comprising one
or more of the transistors;
switching off the transistors of the first subgroup at the end of a
first time period; and
switching off the transistors of the second subgroup before the
end of the first time period.
Appeal Br. 16 (Claims Appendix). Independent claim 20 recites “[a] circuit” and
independent claim 35 recites “[a] method of operating a circuit.” Id. 19, 22.
Independent claims 20 and 35 include limitations similar to those recited in claim
1. See id. at 19, 22–23.
The Examiner rejected claims 1–35 as unpatentable over the combination of
Lobsiger and Kawahara. Lobsiger discloses an “apparatus and method for using
intelligent gate driver units with distributed intelligence to control antiparallel
power modules or parallel-connected electrical switching devices like IGBTs.”
Lobsiger, at [57]. Lobsiger discloses that
[a] known problem associated with the parallel-connected switching
devices is that currents through the switching devices are seldom
evenly balanced. . . . Unbalanced currents cause uneven wear and tear
in the switching devices. The uneven wear and tear in turn reduces the
lifetime of the switching devices. Further, unbalanced currents may
cause a switching device to reach its maximum temperature rating or
maximum current rating faster than when the currents are in balance.
Lobsiger ¶ 4. Lobsiger discloses that it was known in the art to add passive
components in the current path to reduce the current imbalance, but that this
approach could be inefficient and costly. Id. ¶ 5. Lobsiger’s method is said to
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Application 14/968,540

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overcome these drawbacks by eliminating the need to add passive components to
balance the currents. Id. ¶ 22. More specifically, Lobsiger utilizes “intelligent gate
driver units (IGDU) with distributed intelligence to control parallel-connected
electrical switching devices such as IGBTs . . . . The intelligence balances the
currents of the switching devices.” Id. ¶ 20. Lobsiger discloses that by eliminating
the need for additional passive components, the inventive method also reduces
total power losses. Id. ¶ 22.
Kawahara discloses “an operational amplifier which can remove a noise
superposed on an input signal and a digital signal transfer circuit using the
operational amplifier.” Kawahara 1:7–10. Kawahara discloses a fifth embodiment
that is identical to a first embodiment with the exception that two PNP transistors
are replaced by a plurality of parallel-connected PNP transistors. Id. at 8:24–29. As
to the fifth embodiment, Kawahara discloses that “[a]s a result of this construction,
when . . . the operation of the operational amplifier is stable, the collector currents
of [the] parallel PNP transistors . . . are the same.” Id. at 8:35–39.
The Examiner found Lobsiger discloses a device comprising transistors
(e.g., IGBT1–IGBT3 (Ans. 13)) that are turned on at different times and turned off
at different times. See Final 3. The Examiner found that Lobsiger fails to disclose a
step of switching on the first group of the plurality of transistors at the same time,
as required by claim 1. Id. The Examiner found Kawahara discloses that using
multiple transistors to replace a single switch provides a more stable circuit. Id. at
3–4 (citing Kawahara 8:25–45, 50–65; Figs. 1, 5). The Examiner found that, based
on Kawahara’s teaching, one of ordinary skill in the art would have modified
Lobsiger by replacing each single transistor (IGBT1–IGBT3) with multiple
transistors for the purpose of providing stability in switching. Id. at 4. In the
Answer, the Examiner further explains that one of ordinary skill in the art would
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Application 14/968,540

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have substituted multiple transistors for each of Lobsiger’s transistors IGBT1–
IGBT3, resulting in a first group of transistors comprising three subgroups, each
subgroup containing multiple transistors. Ans. 13 (explaining that in Lobsiger,
IGBT1–IGBT3 represent three individual transistors, but, as modified by
Kawahara, IGBT1–IGBT3 represent three subgroups, each of which contains
multiple transistors).
The Appellant agrees that the Examiner’s combination of Lobsiger and
Kawahara would result in “multiple subgroups with multiple transistors that in
each of the subgroups turn on at the same time and turn off at the same time.”
Reply Br. 3. The Appellant argues, however, that this combination would not result
in the claimed invention because the times that the multiple transistors in each of
the subgroups turn on would differ, e.g., the transistors in IGBT1 would turn on at
a different time than the transistors in IGBT2 turn on and the transistors in IGBT3
turn on. Id.
The Appellant’s argument is persuasive of reversible error in the Examiner’s
conclusion of obviousness. We agree with the Appellant that the claims, when read
in light of the Specification, require that all of the transistors in the first group,
i.e.[,] the transistors in both the first and second subgroups, turn on at the same
time. See, e.g., Spec. ¶ 41 (“In the embodiment shown in Figure 2, the IGBTs of
the first group (that is the IGBTs of the first and second subgroups) are switched in
accordance with the input signal SIN, that is when the input signal assumes the on-
level.”); id. ¶ 44 (“The number of IGBTs of the bipolar transistor circuit 40 that are
activated at the beginning of the first time period Ton, that is the number of the first
group, may vary dependent on a load condition of the bipolar transistor circuit 40.
That is, there may be a second group of IGBTs that are not switched on at all
during the first time period Ton, wherein the number of IGBTs of this second group
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Application 14/968,540

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may vary dependent on a load condition of the bipolar transistor circuit 40.”). The
Examiner’s rejection, however, is based on an overly broad interpretation of claim
1 as encompassing a method wherein the transistors in only one subgroup turn on
at the same time. See Ans. 15 (“With the teaching of Kawahara, each of the
transistors (IGBTs) represent a subgroup of transistors. Thus we have multiple
transistors turning on at the same time . . . .”).
Because the Appellant has identified reversible error in the Examiner’s
determination that Lobsiger, as modified by Kawahara, discloses the switching on
and off of transistors in the manner recited in the claims, we need not reach the
Appellant’s argument that Kawahara is nonanalogous art.

ORDER
Claims
Rejected
Basis Reference(s) Affirmed Reversed
1–35 § 103 Lobsiger and
Kawahara
1–35
Outcome 1–35

REVERSED