Ex Parte Yap et al

Patent Trial and Appeal Board

Jul 24, 2017

13621994 (P.T.A.B. Jul. 24, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/621,994 09/18/2012 Keng Teck Yap P26996C 9668
104333 7590 07/26/2017
International IP Law Group, P.L.L.C.
13231 Champion Forest Drive
Suite 410
Houston, TX 77069
EXAMINER
PHAN, RAYMOND NGAN
ART UNIT PAPER NUMBER
2185
NOTIFICATION DATE DELIVERY MODE
07/26/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
eoffrceaction @ appcoll.com
Intel_Docketing @ iiplg.com
inteldocs_docketing @ cpaglobal. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte KENG TECK YAP and AZYDEE HAMID
(Applicant: Intel Corporation)
Appeal 2017-002844
Application 13/621,994
Technology Center 2100
Before ALLEN R. MacDONALD, AMBER L. HAGY, and
MICHAEL M. BARRY, Administrative Patent Judges.
HAGY, Administrative Patent Judge.
DECISION ON APPEAL
Appellants1 appeal under 35 U.S.C. § 134(a) from the Examiner’s
Final Rejection of claims 1, 2, 4—12, and 15—22, which are all of the pending
claims.2 We have jurisdiction over these claims under 35 U.S.C. § 6(b).
We affirm.
1 Appellants identify Intel Corp. as the real party in interest. (App. Br. 2.)
2 Claims 3, 13, 14, 23, and 24 have been canceled in an Amendment filed
February 21, 2014.
Appeal 2017-002844
Application 13/621,994
STATEMENT OF THE CASE
Introduction
According to Appellants, “[t]he inventions generally relate to a
modular and scalable PCI-Express implementation.” (Spec. 13.)
Exemplary Claim
Claim 1, reproduced below with the disputed limitation italicized, is
exemplary of the claimed subject matter:
1. An apparatus comprising:
a functional PCI Express port including first buffers;
an idle PCI Express port including second buffers; and
a common data bus that communicatively couples the
functional PCI Express port to the idle PCI Express port,
wherein one or more of the second buffers of the idle PCI
Express port are accessed by the functional PCI Express port
through the common data bus.
References
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Manula et al. (“Manula”) US 7,424,566 B2 Sept. 9, 2008
Accapadi et al. (“Accapadi”) US 2008/0244118 Al Oct. 2, 2008
Alfieri et al. (“Alfieri”) US 7,630,389 B1 Dec. 8, 2009
Rejections
Claims 5 and 7 stand rejected under 35U.S.C. § 112, second
paragraph, as being indefinite. (Final Act. 2.)
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Application 13/621,994
Claims 1, 2, 4—7, 10-12, 15—17, and 20-22 stand rejected under 35
U.S.C. § 103(a) as being unpatentable over Manula and Accapadi. (Final
Act. 2-8.)
Claims 8, 9, 18, and 19 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Manula, Accapadi, and Alfieri. (Final Act. 8.)
ISSUES
(1) Whether the Examiner erred in finding the combination of
Manula and Accapadi teaches or suggests “a common data bus that
communicatively couples the functional PCI Express port to the idle PCI
Express port, wherein one or more of the second buffers of the idle PCI
Express port are accessed by the functional PCI Express port through the
common data bus,” as recited in independent claim 1 and commensurately
recited in independent claim 15.
(2) Whether the Examiner erred in finding the combination of
Manula, Accapadi, and Alfieri teaches or suggests “wherein the clock gating
device is to provide power to the second buffers,” as recited in dependent
claim 9 and commensurately recited in dependent claim 19.
ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellants’
arguments the Examiner has erred. We disagree with Appellants’
conclusions and we adopt as our own: (1) the findings and reasons set forth
by the Examiner in the action from which this appeal is taken (Final Act. 2—
9); and (2) the reasons set forth by the Examiner in the Examiner’s Answer
in response to Appellants’ Appeal Brief (Ans. 5—14). We concur with the
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Application 13/621,994
conclusions reached by the Examiner, and we highlight the following for
emphasis.3
A. Indefiniteness Rejection of Claims 5 and 7
Appellants do not argue on appeal the Examiner’s rejection of claims
5 and 7 as indefinite under 35 U.S.C. § 112, second paragraph. In particular
the Examiner rejects these claims for “insufficient antecedent basis” because
each claim recites “[t]he apparatus of claim 3,” but claim 3 has been
canceled. (Final Act. 2.) Appellants state only “Applicants are willing to
amend claims 5 and 7 pending the outcome of the present appeal.” (App. Br.
4.)
Meanwhile, however, because this rejection has not been withdrawn
by the Examiner (Ans. 5—6) and has not been addressed substantively on
appeal, we summarily sustain this rejection. See 37 C.F.R. § 41.37(c)(l)(iv)
and Manual of Patent Examining Procedure (MPEP) § 1205.02, 9th ed.,
March 2014 (“If a ground of rejection stated by the examiner is not
addressed in the appellant’s brief, appellant has waived any challenge to that
ground of rejection and the Board may summarily sustain it, unless the
examiner subsequently withdrew the rejection in the examiner’s answer.”).
3 Only those arguments made by Appellants have been considered in this
decision. Arguments Appellants did not make have not been considered and
are deemed to be waived. See 37 C.F.R. § 41.37(c)(l)(iv).
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B. Claims 1, 2, 4—8, 10—12, 15—18 and 20—22
The Examiner finds Manula teaches the limitations of claim 1, except
“where buffers of the idle port are accessed by the functional port.” (Final
Act. 3.) As to that limitation, the Examiner finds Accapadi teaches a system
in which components are “allocated buffers from memory,” such that
“[w]hen a particular component (port) is idle (Fig. 3, 302, donor
components) and its buffers (Fig. 3, 310) are therefore free, they can be used
by another component (requestor component) which needs more buffers
(Fig. 3, 318; par. 45).” (Final Act. 4.) The Examiner further finds, “[i]n this
way, buffer allocation is made more efficient and the system performance is
better managed (par. 8; par. 93).” (Id.)
Appellants’ arguments are premised on piecemeal challenges to the
Examiner’s reliance on each of the cited references. In particular, although
Appellants concede “Manula describes a PCIe port that includes buffers,”
the Examiner’s findings are in error because “Manula says nothing about
enabling a functional port to access the buffers included in an idle port.”
(App. Br. 6.) Appellants also acknowledge “[t]he Examiner relies on
Accapadi to provide the missing subject matter,” but argue the Examiner’s
findings are in error because “Accapadi says nothing about a buffer included
in a port.'” (App. Br. 7.)
We are not persuaded of error. The test for obviousness is not
whether the claimed invention must be expressly suggested in any one or all
of the references. “Rather, the test is what the combined teachings of the
references would have suggested to those of ordinary skill in the art.” In re
Keller, 642 F.2d 413, 425 (CCPA 1981) (citations omitted) (emphasis
added). Thus, where, as here, the rejections are based upon the teachings of
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a combination of references, “[n]on-obviousness cannot be established by
attacking references individually.” In re Merck & Co., 800 F.2d 1091, 1097
(Fed. Cir. 1986) (citing Keller, 642 F.2d at 425). In addition, a reference
“must be read, not in isolation, but for what it fairly teaches in combination
with the prior art as a whole.” Id.
As noted above, the Examiner finds the subject matter of claim 1 is
taught or suggested by the combined teachings of Manula and Accapadi.
(Final Act. 3^4; see also Ans. 12—13.) We agree the Examiner’s findings
are supported by the teachings of the cited references.
We are also unpersuaded by Appellants’ conclusory statement that
“the Examiner has not provided an ‘articulated reasoning with some rational
underpinning to support the legal conclusion of obviousness.’” (App. Br. 7.)
To the contrary, the Examiner has provided a rationale supporting
motivation by a person of ordinary skill in the art to achieve the claimed
subject matter. (Final Act. 4; see also Ans. 8.) Specifically, the Examiner
finds “it would have been obvious to one of ordinary skill in this art at the
time of invention by Applicant to utilize the buffer allocation method as
taught by Accapadi et al. in the system of Manula et al. for the purpose of
dynamically allocating buffers from ports that are not using them to ports
that do. This would have been obvious in order to improve system
performance.” (Final Act. 4.) The Examiner premises this finding, in part,
on teachings in Accapadi that reallocating buffers from idle components to
active components results in “more efficient” buffer allocation “and the
system performance is better managed.” {Id. (citing Accapadi Tflf 8, 93).)
Appellants have not provided persuasive evidence or line of reasoning
explaining why the Examiner’s rationale is erroneous or why a person of
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ordinary skill in the art would not have reached the conclusions reached by
the Examiner. See DyStar Textilfarben GmbH & Co. Deutschland KG v.
C.H. Patrick Co., 464 F.3d 1356, 1368 (Fed. Cir. 2006) (“[T]he proper
question is whether the ordinary artisan possesses knowledge and skills
rendering him capable of combining the prior art references.”).
For the foregoing reasons, we are not persuaded of error in the
Examiner’s rejection of independent claim 1, and, therefore, we sustain that
rejection, along with the rejection of independent claim 15 (which is argued
on the same basis of claim 1) and dependent claims 2, 4—7, 8, 10-12, 15—18
and 20—22, which are not argued separately. (App. Br. 8—9.)
C. Claims 9 and 19
Claim 8 depends from claim 1, and recites the apparatus “further
compris[es] a clock gating device to limit power to the idle PCI Express
port.” (Claims App’x 3.)4 Claim 9 depends from claim 8, and further recites
“wherein the clock gating device is to provide power to the second buffers.”
(Id. ) Claims 18 and 19 depend from claim 15, and recite commensurate
limitations in method form. (Claims App’x 4.)
The Examiner relies on the combination of Manula, Accapadi and
Alfieri as teaching or suggesting the subject matter of claims 8, 9, 18, and
19. In particular, the Examiner finds, and we agree, “Alfieri teaches a
system wherein clock gating is utilized to reduce power consumption for idle
components.” (Final Act. 8 (citing Alfieri col. 4:11—27).)
Appellants argue the Examiner’s findings regarding claims 9 and 19
are in error because Alfieri “says nothing about applying clock gating to an
4 References herein to “Claims App’x” are to the corrected Claims Appendix
filed on February 26, 2015, in which Appellants “include claims 5 and 7 as
requested by the Examiner.”
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Application 13/621,994
idle port while continuing to provide power to buffers included in an idle
port, as generally recited in claims 9 and 19.” (App. Br. 9—10 (emphases
added).) We are not persuaded of error. Appellants’ arguments, again,
improperly challenge the references piecemeal while disregarding the
combined teachings of the cited references. With regard to the claimed ports
and buffers, and reallocation of unused buffers, the Examiner does not
purport to rely on Alfieri. but instead specifically relies on the combination
of Manula and Accapadi, as noted above. (Final Act. 3—4.) The Examiner
adds Alfieri as teaching use of clock gating to reduce power consumption to
idle components, and relies on the combination of Alfieri, Manula, and
Accapadi as teaching the subject matter of claims 8, 9, 18, and 19. {Id. at 8.)
Appellants do not persuasively rebut the Examiner’s findings regarding the
combined teaches of these references.
In short, Appellants have not persuaded us of error in the Examiner’s
rejection of claims 9 and 19, or claims 8 and 18, which are not separately
argued. We, therefore, sustain the rejection of claims 8, 9, 18, and 19.
DECISION
For the above reasons, the Examiner’s rejections of claims 1, 2, 4—12,
and 15—22 are affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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