Ex parte WUU et al.Download PDFBoard of Patent Appeals and InterferencesOct 16, 200008630111 (B.P.A.I. Oct. 16, 2000) Copy Citation The opinion in support of the decision being entered today was not written for publication and is not binding precedent of the Board. Paper No. 15 UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte SHOU-GWO WUU, MONG-SONG LIANG, CHUNG-HUI SU, and CHEN-JANG WANG ____________ Appeal No. 1998-2887 Application No. 08/630,111 ____________ ON BRIEF ____________ Before HAIRSTON, FLEMING, and BLANKENSHIP, Administrative Patent Judges. HAIRSTON, Administrative Patent Judge. DECISION ON APPEAL This is an appeal from the final rejection of claims 14 through 18. The disclosed invention relates to a plug structure for stacked contacts and metal contacts on a Static Random Access Memory (SRAM) cell having thin film transistors. Appeal No. 1998-2887 Application No. 08/630,111 2 Claim 14 is the only independent claim on appeal, and it reads as follows: 14. A novel plug structure for stacked contacts and metal contacts on a Static Random Access Memory (SRAM) cell having thin film transistors, on a partially completed semiconductor substrate having device areas and field oxide areas and further having field effect transistors (FETs) and word lines formed from a first polysilicon layer and Vss ground plate formed from a second polysilicon layer comprising of: a first insulating layer on said substrate; a patterned N doped third polysilicon layer on said first+ insulating layer forming first and second gate electrodes for a first and second thin film transistor; a second insulating layer forming a gate oxide on said first and second gate electrodes; a patterned N type amorphous silicon layer on said second insulating layer with P doped areas over said first and+ second gate electrodes and with undoped P type areas for+ channel regions on said first and second thin film transistors; and said channel regions contiguous with said P-doped areas and said P-doped areas extending over areas of the other said gate electrode and on said second insulating layer; said patterned N type amorphous silicon layer having openings in said P-doped areas of said amorphous polysilicon layer over said other gate electrode area and to said second insulating layer; a third insulating layer over said patterned N type amorphous silicon layer having openings aligned over and larger in size than said openings in said P doped portions of said amorphous silicon layer, Appeal No. 1998-2887 Application No. 08/630,111 3 said third insulating layer openings extending to said amorphous layer and further to said third polysilicon layer, and said third insulating layer having other openings to device areas elsewhere on said substrate; conducting plugs in said third insulating layer openings and thereby having low resistance ohmic stacked contacts for said thin film transistors and other conducting plugs in said other openings elsewhere to device areas on said substrate; a patterned first metal layer forming electrical interconnections, and thereby having said novel plug structure on said SRAM cell. The references relied on by the examiner are: Krishna 4,639,274 Jan. 27, 1987 Kobayashi et al. (Koyabashi) 0 603 622 Jun. 29, 1994 (European Patent Application) Claims 14 through 18 stand rejected under 35 U.S.C. § 103 as being unpatentable over the admitted prior art Figures 1 through 5 in view of Kobayashi and Krishna. Reference is made to the final rejection, the brief and the answer for the respective positions of the appellants and the examiner. OPINION The obviousness rejection of claims 14 through 18 is reversed. Appeal No. 1998-2887 Application No. 08/630,111 4 The examiner acknowledges (Final rejection, page 3) that “the admitted Prior Art Figures 1-5 fail to teach an amorphous silicon layer and a gate conducting plug.” According to the examiner (Answer, page 5): Kobayashi et al was used to show that the level of ordinary skill in the art includes knowledge of forming a contact through an aperture in an amorphous silicon layer (16). . . . Krishna was used to show that the level of ordinary skill in the art includes knowledge of forming a contact to a polysilicon layer (20) through an aperture in an insulating layer. Hence, the two missing features in Applicants’ Admitted Prior Art Figures are provided by the two references. The examiner concludes (Answer, page 5) that “it would have been obvious to use a contact to a polysilicon layer through an opening in an insulating layer and an amorphous silicon layer in view of the teachings of Kobayashi et al and Krishna.” Appellants argue (Brief, pages 7 and 8) that the applied references do not teach applicants’ plug structure, namely, the larger contact opening aligned over the other opening so that “[w]hen the metal plug 24 (Fig. 8) is formed in the opening 6 (and 4), the exposed P amorphous layer 18 in+ opening 6 and the exposed N polysilicon layer 14 in opening 4+ Appeal No. 1998-2887 Application No. 08/630,111 5 electrically short the P layer 18 to the N layer 14 to form a+ + low-resistance ohmic contact (Fig. 9).” Although element 21 in Kobayashi may appear to be a “contact through an aperture in an amorphous silicon layer (16)” (Answer, page 5), it is really a silicon nitride passivation layer (column 8, lines 4 through 19). We agree with the examiner (Answer, page 5) that Krishna forms “a contact to a polysilicon layer (20) through an aperture in an insulating layer.” The polysilicon layer 20 in Krishna is, however, one of two polysilicon plates 16 and 20 that are separated from each other by an oxide layer 18 to form a capacitor 12. The metal contact 22 is a contact for the capacitor 12. Based upon the foregoing, we agree with appellants that neither Krishna nor Kobayashi teaches or would have suggested the claimed low resistance ohmic stacked contact located in the two differently sized openings (i.e., the stacked contact 24 extending through the smaller opening 4 in the amorphous silicon layer 18 to make contact with the third polysilicon layer 14). Appeal No. 1998-2887 Application No. 08/630,111 6 DECISION The decision of the examiner rejecting claims 14 through 18 under 35 U.S.C. § 103 is reversed. REVERSED KENNETH W. HAIRSTON ) Administrative Patent Judge ) ) ) ) ) BOARD OF PATENT MICHAEL R. FLEMING ) APPEALS Administrative Patent Judge ) AND ) INTERFERENCES Appeal No. 1998-2887 Application No. 08/630,111 7 ) ) ) HOWARD B. BLANKENSHIP ) Administrative Patent Judge ) lp Appeal No. 1998-2887 Application No. 08/630,111 8 GEORGE O. SAILE 20 MCINTOSH DRIVE POUGHKEEPSIE NY 12603 Leticia Appeal No. 1998-2887 Application No. 08/630,111 APJ HAIRSTON APJ FLEMING APJ BLANKENSHIP DECISION: REVERSED Send Reference(s): Yes No or Translation (s) Panel Change: Yes No Index Sheet-2901 Rejection(s): Prepared: June 8, 2001 Draft Final 3 MEM. CONF. Y N OB/HD GAU PALM / ACTS 2 / BOOK DISK (FOIA) / REPORT Copy with citationCopy as parenthetical citation