Ex Parte Woychik et al

Patent Trial and Appeal Board

Sep 14, 2016

12061145 (P.T.A.B. Sep. 14, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
12/061,145 04/02/2008 Charles Gerard Woychik
62204 7590 09/16/2016
GENERAL ELECTRIC COMPANY (LICENSING)
ATTN: Brandon, 59W - 105U
1 RIVER ROAD
SCHENECTADY, NY 12345
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
214233-2 (GEL8083.154) 7980
EXAMINER
GUPTA, YOGENDRAN
ART UNIT PAPER NUMBER
1744
NOTIFICATION DATE DELIVERY MODE
09/16/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
vivian.brandon@ge.com
rlt@zpspatents.com
docket@fyiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte CHARLES GERARD WOYCHIK and RAYMOND ALBERT FILLION 1
Appeal2014-009168
Application 12/061, 145
Technology Center 1700
Before CHUNG K. PAK, JEFFREY T. SMITH, and WESLEY B. DERRICK,
Administrative Patent Judges.
PAK, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on an appeal under 35 U.S.C. § 134(a) from the
Examiner's decision2 finally rejecting claims 1-23, 25-36, and 40--42, which are
all of the claims pending in the above-identified application. We have jurisdiction
under 35 U.S.C. § 6(b ).
We REVERSE.
1 The real party in interest is said to be General Electric Company. Appeal Brief
filed May 21, 2014 ("App. Br.") at 2.
2 Final Action entered November 21, 2013 ("Final Act.") at 1-15 and the
Examiner's Answer entered June 23, 2014 ("Ans.") at 2-17.
Appeal2014-009168
Application 12/061,145
STATEMENT OF THE CASE
The subject matter on appeal is directed to "the fabrication of an
interconnect structure" in a manner which allows the salvaging or recovery of
undamaged or non-defective electronic components and substrates. Spec. iii! 2 and
5. Figures 1 (a )-1 ( d), which illustrate a method of fabricating an interconnect
structure, are reproduced below:
Fig. 1
Figures l(a) shows base insulative layer 10 that has first surface 12 and second
surface 14. Id. at ii 49. Figure 1 (b) shows adhesive layer 16 applied to second
surface 14 of base insulative layer 10. Id. at ii 50. Figure l(c) shows electronic
device 18 having first surface 20 and second surface 22, with one or more I/O
contacts 23, passivation layer 21, a plurality of first metal layers 24, a plurality of
second metal layers 25, and removable layer 26 located on first surface 20. Id. at
iii! 50-53. Figure 1 (d) shows electronic device 18 having removable layer 26 and
first second metal layers 24, 25 thereon in contact with adhesive layer 16 on
second surface 14 ofbase insulative layer 10. Id. at ii 54. While "[t]he adhesive
layer is a thermoset adhesive[,]" the "removable layer includes a thermoplastic
polymer." Id. at iii! 32 and 37. Removable layer 26 may be applied to first surface
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Application 12/061,145
20 of electronic device 18 in regions not covered by first and second metal layers
24, 25 or to the entire area of first surface 20 of electronic device 18 to cover first
and second metal layers 24, 25. Id. at i-f 53. "Suitable electronic devices may be a
packaged or unpackaged semiconductor chip such as a microprocessor, a
microcontroller ... or an ASIC (Application Specific Integrated Circuit) ... " Id.
at ,-r 52.
Details of the appealed subject matter are recited in illustrative claims 1 and
40, 3 which are reproduced below from the Claims Appendix of the Appeal Brief
(with disputed limitations in italicized form and bracketed reference characters
from Figure l(d)):
1. A method for making an interconnect structure, comprising:
applying a first metal layer [24J to an electronic device [18J,
wherein the electronic device [ 18J comprises at least one I/O contact
[23J and the first metal layer [24J is located on a surface of the I/O
contact [23 J;
applying a removable layer [26J to the electronic device [18J,
wherein the removable layer[26J is located adjacent to the first metal
layer;
applying an adhesive layer [16J to the electronic device [18J or to a
base insulative layer [ 1 OJ ; and
securing the electronic device [18J to the base insulative layer [lOJ
using the adhesive layer [16J, with the adhesive layer [16] being
positioned between the removable layer [26] and the base insulative
layer [JO] so as to bond the removable layer [26] to the base
insulative layer [l OJ;
wherein the first metal layer [24J and removable layer [26J are
disposed between the electronic device [ 18J and the base insulative
layer [lOJ;
wherein the removable layer [26J and first metal layer [24 J allow
the electronic device [ 18J to be retrieved from the base insulative
layer [ 1 OJ without damaging the electronic device [ 18J, without
3 Claims 1 and 40 are the only independent claims in the above-identified
application.
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Application 12/061,145
damaging the base insulative layer [10], or without damaging both the
electronic device [18J and the base insulative layer [lOJ; and
wherein the removable layer [26J and first metal layer [24 J allow
the at least one I/O contact [23J to be exposed when the electronic
device [18J is retrieved from the base insulative layer [10].
40. A method for making an interconnect structure, comprising:
applying a first metal layer [24J to an electronic device [18J,
wherein the electronic device [18J comprises at least one I/O contact
[23J and the first metal layer [24J is located on a surface of the I/O
contact [23 J;
applying a removable layer [26J to the electronic device [18J,
wherein theremovable layer [26J is located adjacent to the first metal
layer [24;
applying an adhesive layer [ 16J to the electronic device [ 18J or
to a base insulative layer [lOJ; and
securing the electronic device [ 18J to the base insulative layer
[lOJ using the adhesive layer [16J, with a first surface of the adhesive
layer [16] being bonded to the removable layer [26] and a second
surface of the adhesive layer [ 16] being bonded to the base insulative
layer [JO];
wherein the first metal layer [24J and removable layer [26J are
disposed between the electronic device [ 18J and the base insulative
layer [1 OJ; and
wherein the removable layer [26J and first metal layer [24 J each
have a melting point or softening point temperature that is lower than
a maximum damage threshold temperature of the electronic device
[18J, such that the removable layer [26J and first metal layer [24J can
be removed so as to allow the electronic device [18J to be retrieved
from the base insulative layer [1 OJ without damaging the electronic
device [ 18J, without damaging the base insulative layer [ 1 OJ, or
without damaging both the electronic device [18J and the base
insulative layer [ 1 OJ.
App. Br. 16, 22-23.
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Appeal2014-009168
Application 12/061,145
The Examiner has maintained the following grounds of rejection:
1. Claim 42 under 35 U.S.C. § l 12(a) or 35 U.S.C. § 112 (pre-AIA), first
paragraph, as failing to comply with the written description requirement;
2. Claims 1-3, 5-8, 10, 11, 13, 15, 18, 21-23, 25-36, and 40--42 under
35 U.S.C. § 103(a) as unpatentable over Fillion (US 5,353,498 issued to Fillion et
al. on Oct. 11, 1994) in view of Boettcher (US 6,639,314 B2 issued to Boettcher et
al. on Oct. 28, 2003) and Stewart (US 2003/0170450 Al published in the name of
Stewart et al. on Sept. 11, 2003);
3. Claims 4, 9, and 12 under 35 U.S.C. § 103(a) as unpatentable over
Fillion in view of Boettcher, Stewart, and Whitehurst (US 6,365,057 Bl issued to
Whitehurst et al. on Apr. 2, 2002);
4. Claim 14 under 35 U.S.C. § 103(a) as unpatentable over Fillion in
view of Boettcher, Stewart and Mis (US 6,222,279 B 1 issued to Mis et al. on Apr.
24, 2001);
5. Claims 16 and 17 under 35 U.S.C. § 103(a) as unpatentable over
Fillion in view of Boettcher, Stewart, and Lin (US 6,548,393 Bl issued to Lin on
Apr. 15,2003);and
6. Claims 19 and 20 under 35 U.S.C. § 103(a) as unpatentable over
Fillion in view of Boettcher, Stewart, and Budnaitis (US 5,966,593 issued to
Budnaitis et al. on Oct. 12, 1999). Final Act. 2-15 and Ans. 2-17.
DISCUSSION
Upon consideration of the evidence on this appeal record in light of the
respective positions advanced by the Examiner and Appellants, we reverse the
Examiner's§ 112, first paragraph, rejection of claim 42 and§ 103(a) rejections of
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Application 12/061,145
claims 1-23, 25-36, and 40--42. We add the following primarily for emphasis and
completeness.
35 U.S.C. § 112
As our reviewing court stated in In re Kaslow, 707 F.2d 1366, 1375 (Fed.
Cir. 1983):
The test for determining compliance with the written description
requirement [of 35 U.S.C. § 112, first paragraph,] is whether the
disclosure of the application as originally filed reasonably conveys to
the artisan that the inventor had possession at that time of the later
claimed subject matter, rather than the presence or absence of literal
support in the specification for the claim language .... The content of the
drawings may also be considered in determining compliance with the
written description requirement. [Citations omitted.]
The Examiner bears the initial burden of establishing that the original application
disclosure as a whole would not have reasonably conveyed to those skilled in the
art that the inventors had possession of the subject matter of claim 42, at the time
the instant application was filed. Ariad Pharm., Inc. v. Eli Lilly & Co., 598 F.3d
1336, 1351 (Fed. Cir. 2010) (en bane); In re Alton, 76 F.3d 1168, 1172, 1175-76
(Fed. Cir. 1996) (citing In re Wertheim, 541F.2d257, 262-64 (CCPA 1976)); In
re Wright, 866 F.2d 422, 425 (Fed. Cir. 1989).
Although the Examiner does not question that solder ball 69 used in Figure
10 of the instant application is used to join the interconnect structure to a printed
circuit board, the Examiner takes the position that the limitation "the applied first
metal layer is a separate feature from a solder material" in claim 42 constitutes a
negative limitation which is not supported by the application disclosure as
originally filed. Ans. 3 and 16. However, as explained by Appellants at page 4 of
the Appeal Brief, Figure 10 shows first metal layer 24 which is separate from
solder ball 69 (i.e., a solder material) used for joining the interconnect structure to
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Application 12/061,145
a printed circuit. See also Fig. 10 in conjunction with Spec. ilil 51-53 and 87. On
this record, the Examiner does not demonstrate why such disclosure would not
have reasonably conveyed to one of ordinary skill in the art that the inventors had
possession of the limitation "the applied first metal layer [24] is a separate feature
from a solder material [69]" recited in claim 42. Ans. 3 and 16. The Examiner's
reference to In re Johnson, 568 F .2d 1008, 1019 (CCP A 1977), Ex parte Grasselli,
231 USPQ 393 (Bd. App. 1983) and Ex parte Park, 30 USPQ2d 1234, 1236 (BPAI
1993) does not support the Examiner's position.
Accordingly, we reverse the Examiner's rejection of claim 42 under 35
U.S.C. § 112(a) or 35 U.S.C. § 112 (pre-AIA), first paragraph, as failing to comply
with the written description requirement.
35 U.S.C. § 103
"[R]ejections on obviousness grounds [under 35 U.S.C. § 103(a)] cannot be
sustained by mere conclusory statements; instead, there must be some articulated
reasoning with some rational underpinning to support the legal conclusion of
obviousness." In re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006) quoted with
approval in KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007); see also In re
Warner, 379 F.2d 1011, 1017 (CCPA 1967) ("A rejection based on section 103
clearly must rest on a factual basis, and these facts must be interpreted without
hindsight reconstruction of the invention from the prior art"). The Examiner bears
the initial burden of presenting a prima facie case of obviousness. In re Oetiker,
977 F.2d 1443, 1445 (Fed. Cir. 1992).
Here, the Examiner finds that Fillion teaches a method of fabricating an
interconnect structure comprising providing chip 14 (the recited electronic device)
having contact pads 15 (I/O contacts) and securing chip 14 to base layer 10 coated
with polymeric film 12b via adhesive layer 12a. Ans. 4--5. Although the Examiner
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Application 12/061,145
recognizes that Fillion does not expressly mention a metal layer and a removable
layer as recited in claims 1 and 40, the Examiner relies upon Boettcher's metal film
on a contact pad as corresponding to the recited metal film and Pillion's polymeric
film 12b as corresponding to the recited removable layer. Id. at 5-6. The
Examiner also alternatively relies upon Stewart's adhesive layer which is said to
act as both adhesive and removable layers as corresponding to both the adhesive
and removable layers. Id. at 7-9.
As correctly stated by Appellants, the Examiner does not demonstrate that
the collective teachings of Fillion, Boettcher, and Stewart would have led one of
ordinary skill in the art to place the adhesive layer between the removable layer
and the base insulative layer so as to bond the removable layer to the base
insulative layer as recited in claims 1 and 40. App. Br. 7. In particular, the
Examiner does not show that Pillion's adhesive layer 12a is placed between
polymer film 12b (corresponding to the recited removable layer) and base layer 10
to bond polymeric film 12b to base layer 10. Compare Ans. 4-6 with Fillion, Figs.
1 (a )-1 ( c ). Although Stewart teaches the advantage of using an easily removable
thermoplastic adhesive layer to bond an electronic device or a substrate to a printed
circuit board, the Examiner does not identify any teachings in Fillion and/or
Stewart, which would have suggested employing such thermoplastic adhesive layer
between the removable layer (polymeric film 12b) and the base insulative layer.
Compare Ans. 7-9 with Stewart i-fi-f 18, 19, 76, 109-13. Nor would such teaching
in Stewart have led one of ordinary skill in the art to use its thermoplastic adhesive
layer as the polymer film of Pillion's interconnect structure. Thus, combining the
teachings of the prior art references relied upon by the Examiner would not result
in the claimed subject matter. See, e.g., Uniroyal, Inc., v. Rudkin-Wiley Corp., 837
F.2d 1044 (Fed. Cir. 1988).
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Application 12/061,145
The Examiner's reliance on In re Larson, 340 F.2d 965, 968 (CCPA) does
not remedy such shortcomings in the applied prior art. App. Br. 7. In Larson, the
predecessor to our reviewing court held that using "one piece [brake disc or drum]
construction" (a single unit) "would be merely a matter of obvious engineering
choice" because a prior art reference already teaches using a brake disc or drum
made of several components as a single unit by holding or fixing them together as
if they are one piece. However, unlike Larson, the Examiner in this case does not
identify any sufficient teaching in Stewart and/or Fillion, which would have
suggested forming two distinct layers, i.e., the recited adhesive layer and
removable layer, as a matter of obvious engineering choice, for the purpose of
using the adhesive layer to bond the removable layer to the base insulative layer.
Even if the thermoplastic adhesive layer taught by Stewart corresponds to
the recited removable layer as indicated by the Examiner, the Examiner does not
identify any teaching or suggestion in Fillion and/or Stewart which would have led
one of ordinary skill in the art to employ another adhesive layer to bond such
adhesive layer taught by Stewart (the recited removable layer) to the base
insulative layer. Ans. 7-9. On this record, the Examiner does not show that one of
ordinary skill in art would have reasonably understood that the adhesive layer
taught by Stewart would not bond to the base insulative layer without the aid of
another adhesive layer. Id.
Moreover, we note that the Examiner relies upon Whitehurst to show
applying an adhesive layer in the manner recited in dependent claims 4, 9, and 12,
Mis to show applying a passivation layer in the manner recited in dependent claim
14, Lin to show reflowing solder for connecting a contact pad to an electrical
component in the manner recited in dependent claims 16 and 17, and Budnaitis to
show using laser ablation to form vias in the manner recited in dependent claims
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Application 12/061,145
19 and 20. Ans. 14-17. In other words, the Examiner does not rely upon
Whitehurst, Mis, Lin, and Budnaitis to remedy the above shortcomings. Id.
Accordingly, we reverse the Examiner's rejections of claims 1-23, 25-36,
and 40--42 under 35 U.S.C. § 103(a).
ORDER
In view of the foregoing, the decision of the Examiner to reject claim 42
under 35 U.S.C. § 112 and claims 1-23, 25-36, and 40--42 under 35 U.S.C. § 103
is REVERSED.
REVERSED
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