Ex Parte Wakiyama et alDownload PDFBoard of Patent Appeals and InterferencesNov 23, 201111157863 (B.P.A.I. Nov. 23, 2011) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte SATORU WAKIYAMA and SHINJI BABA ___________ Appeal 2010-005022 Application 11/157,863 Technology Center 2800 ____________ Before MAHSHID D. SAADAT, DAVID M. KOHUT, and ERIC B. CHEN, Administrative Patent Judges. CHEN, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-005022 Application 11/157,863 2 This is an appeal under 35 U.S.C. § 134(a) from the final rejection of claims 23-28.1 Claims 1-22 have been cancelled. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. STATEMENT OF THE CASE Appellants’ invention relates to a semiconductor device including a semiconductor chip, electrodes formed on a major surface of the semiconductor chip and a wiring board for mounting the semiconductor chip (e.g., wirings for electrically connecting the wirings of the wiring board). (Spec. Abstract.) Claim 23 is exemplary, with disputed limitations in italics: 23. A semiconductor device comprising: a semiconductor chip using an Si substrate, a low-dielectric-constant film as an interlayer insulation film, and solder bumps formed over a main surface of the Si substrate; and a wiring board having a core layer and built-up layers laminated over both sides of the core layer, wherein the semiconductor chip is electrically and mechanically connected with one of the built-up layers through the solder bumps, the low-dielectric-constant film has a rupture strength lower than a rupture strength of an SiO2 film, the built-up layers have a coefficient of linear thermal expansion larger than a coefficient of linear thermal expansion of the Si substrate, and each of the core layer and the built-up layers contain glass cloth. Claims 23-27 stand rejected under 35 U.S.C. §103(a) as being obvious over Lebonheur (U.S. Patent No. 6,617,683, B2, Sep. 9, 2003), Chung (U.S. Patent No. 6,184,142, B1, Feb. 6, 2001), Jaeger (RICHARD C. JAEGER, 1 An oral hearing was held on November 8, 2011. The record includes a written transcript of the oral hearing. Appeal 2010-005022 Application 11/157,863 3 INTRODUCTION TO MICROELECTRONIC FABRICATION 1 (Prentice Hall 2002)) and Takase (U.S. Patent Application Publication No. 2004/0104042, A1, Jun. 3, 2004). Claim 28 stands rejected under 35 U.S.C. §103(a) as being obvious over Lebonheur, Chung, Jaeger, Takase and Li (U.S. Patent No. 7,009,307, B1, Mar. 7, 2006). ANALYSIS We are not persuaded by Appellants’ arguments (App. Br. 8) that the combination of Lebonheur, Chung, Jaeger and Takase would not have rendered obvious independent claim 23, including the disputed limitation “each of the core layer and the built-up layers contain glass cloth.” The Examiner acknowledged that the combination of Lebonheur, Chung and Jaeger does not teach or suggest the disputed limitation (Ans. 5) and therefore, cited Takase for the disclosure of a laminate formed by doubled-side circuit boards 21, 30, 36 composed of epoxy resin impregnated with glass-cloth substrate (Ans. 6; Takase, ¶¶ [0031], [0065]; fig. 2A). The Examiner concluded that “[i]t would have been obvious to include the wiring board details of the build up layers and the core layer both being made of glass cloth . . . as suggested by Takase in order to ensure . . . a reliable laminated board structure.” (Ans. 6-7.) We agree with the Examiner. Lebonheur relates to “semiconductor die packages, especially microprocessor packages.” (Col. 1, ll. 8-9.) The semiconductor die package 1 disclosed in Lebonheur has a microprocessor package that includes a flip chip die 2 (i.e., a central processing unit) (col. 3, ll. 7-9; fig. 1) soldered to a substrate 8 of the package (col. 3, ll. 16-18; fig. 1). Appeal 2010-005022 Application 11/157,863 4 Takase describes a multilayer printed wiring board (¶ [0001]) “that has a reliable laminated board structure, simplified manufacturing process, shorter lead time, and higher yield” (¶ [0026]). In an exemplary embodiment, Takase discloses an insulated substrate 2 formed from “an insulating material selected from epoxy resin impregnated [with] glass-cloth substrate.” (¶ [0031].) As illustrated in Figure 2A, Takase further discloses that a multilayer printed wiring board is formed by laminating double-side circuit boards 21, 30, 36, and two sheets of prepreg 25 and 33. (¶¶ [0064]- [0065].) In other words, Takase teaches the claim limitation “each of the core layer and the built-up layers contain glass cloth.” A person of ordinary skill in the art at the time of the invention would have recognized that incorporating the multilayer printed wiring board of Takase, including the double-side circuit boards 21, 30, 36 formed from epoxy resin impregnated with glass-cloth, with the semiconductor die package 1 of Lebonheur would improve Lebonheur by providing a reliable laminated board structure. See KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 417 (2007). In the alternative, combining Lebonheur with Takase is no more than the simple substitution of the known multilayer printed wiring board of Takase, including the double-side circuit boards 21, 30, 36 formed from epoxy resin impregnated with glass-cloth substrate, for the known substrate 8 of Lebonheur, to yield predictable results. See id. Thus, we agree with the Examiner (Ans. 6-7) that modifying Lebonheur to include the multilayer printed wiring board of Takase, including the double-side circuit boards 21, 30, 36 formed from epoxy resin impregnated with glass-cloth substrate, would have been obvious. Appeal 2010-005022 Application 11/157,863 5 Appellants argue that “Takase does not disclose or suggest that the glass cloth achieves a reliable laminated board structure.” (App. Br. 8.) In particular, Appellants point to paragraphs [0025] and [0026] of Takase and asserts that: the reliable laminated board structure of Takase is achieved by . . . [p]reparing two double-side circuit boards and one sheet of prepreg, . . . [p]ositioning the pads of the double-side circuit boards opposite to each other via the though hole, and . . . [h]eat pressing to bind double- side circuit board/prepreg/double-side circuit board. (App. Br. 8.) However, the relied-on portions of Takase do not provide an express disclosure that the production of the “reliable laminated board structure” is only a result of heat pressing two doubled-side circuit boards and that the use of double-side circuit boards 21, 30, 36 formed from epoxy resin impregnated with glass cloth substrate provides no additional benefit. Arguments of counsel cannot take the place of factually supported objective evidence. See, e.g., In re Huang, 100 F.3d 135, 139-140 (Fed. Cir. 1996). Therefore, we agree with the Examiner that the combination of Lebonheur, Chung, Jaeger and Takase would have rendered obvious independent claim 23, which includes the disputed limitation “each of the core layer and the built-up layers contain glass cloth.” Accordingly, we sustain the rejection of independent claim 23 under 35 U.S.C. § 103(a). Claims 24-27 depend from independent claim 23 and Appellants have not presented any substantive arguments with respect to these claims. Therefore, we sustain the rejection of claims 24-27 under 35 U.S.C. § 103(a) for the same reasons discussed with respect to independent claim 23. With respect to the rejection of dependent claim 28, Appellants merely argue that “Claim 28 depends from Claim 23 and is patentable for at Appeal 2010-005022 Application 11/157,863 6 least the reasons stated for Claim 23.” (App. Br. 12.) We are not persuaded by this argument for the reasons discussed with respect to independent claim 23. Accordingly, we sustain the rejection of dependent claim 28. DECISION The Examiner’s decision to reject claims 23-28 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED ke Copy with citationCopy as parenthetical citation