Ex Parte Vreede et al

Board of Patent Appeals and Interferences

Aug 13, 2009

11019523 (B.P.A.I. Aug. 13, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte OLAF THEO JOS VREEDE, ADRIANUS JOHANNES PALM,
RONALD GIJSBERTSE, and FRANSISCUS ANTONIUS TILLIE
____________

Appeal 2009-003910
Application 11/019,523
Technology Center 2800
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Decided: August 13, 2009
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Before KENNETH W. HAIRSTON, MARC S. HOFF, and
CARLA M. KRIVAK, Administrative Patent Judges.

KRIVAK, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of claims
1-31. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

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Application 11/019,523

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STATEMENT OF THE CASE
Appellants’ claimed invention is a system and method for transmitting
data in a lithographic device. Addressable sensors are included in the
lithographic device. The sensors are electronically controlled by
transmitting a control signal from a remote processor to at least one local
processor coupled to the sensors (Spec. ¶¶ [0042]-[0044], [0047], [0068]).
Independent claims 1 and 23, reproduced below, are representative of
the subject matter on appeal.
1. A sensor assembly, comprising:

a sensor configured to output sensor data;

an analog-to-digital converter configured to receive an analog
signal corresponding to the sensor data and to output a digital signal
of the sensor data; and

a local processor that is electrically coupled to the analog-to-
digital converter and is configured to receive a first data transmission
from a remote processor and to transmit a second data transmission,

wherein the local processor is configured to transmit the second
data transmission based on information received in the first data
transmission,

wherein the first transmission includes an address of a target
sensor assembly.

23. A method of data acquisition, said method comprising:

transmitting digital control information to a sensor assembly in
a vacuum area over a serial data bus, said digital control information
including an address of the sensor assembly; and

Appeal 2009-003910
Application 11/019,523

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based on the control information, receiving a serial data stream
over the serial data bus, said serial data steam including digital sensor
data from the sensor assembly.

REFERENCES
Smesny US 5,444,637 Aug. 22, 1995
The Examiner rejected claims 1-31 under 35 U.S.C. § 102(b) based
upon the teachings of Smesny.
Appellants contend that Smesny does not teach that the first
transmission includes an address of a target sensor assembly (App. Br. 8).
Thus, the only issue is: Has the Examiner established that Smesny teaches
that a first transmission includes an address of a target sensor assembly?

ANALYSIS
The Examiner finds that Smesny meets Appellants’ claim limitations
by teaching that a stream of analog signals can be converted into digital
signals and placed upon a data bus addressably connected to an array of
memory cells. A select array of memory cells can be addressed and digital
information signals that are stored within the cells can be sent to the data
bus. (Ans. 13; Smesny col. 5, ll. 48-68). Further, the Examiner asserts that a
microprocessor in Smesny requires two distinct cycles, fetch and execute.
The operations consist mostly of a sequential series of regular fetch and
execute cycles that are occasionally broken up by operations with shorter or
longer execute cycles of instructions that cause a “program counter to jump
to a different address” (Ans. 13; Smesny col. 11, ll. 49-67). Lastly, the
Examiner finds that once an input port is enabled it allows a data bus
associated with the processor to receive data input that can be directly
Appeal 2009-003910
Application 11/019,523

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written into a RAM or “placed upon registers 60 contained within CPU 62”
(Ans. 13; Smesny col. 11, ll. 15-32). However, for all that the Examiner has
reiterated from Smesny, the Examiner has provided no indication how any
of Smesny’s teachings relate to a first transmission (or digital control
information) including an address of a target sensor assembly. Smesny
refers to different addresses and data buses addressably connected to
memory cells, but the Examiner has not pointed out where or how in
Smesny the transmission includes an address of a target sensor assembly.
Appellants contend that the “Examiner merely identifies passages of Smesny
that appear to disclose the memory cells that can be addressed and the
internal processes related to software stored in memory and executed by
processor [sic]. Neither of these can be regarded or considered as the address
of the target sensor assembly” (App. Br. 10). We find Appellants’ statement
persuasive.
“Anticipation of a patent claim requires a finding that the claim at
issue ‘reads on’ a prior art reference,” Atlas Powder Co. v. IRECO, Inc., 190
F.3d 1342, 1346 (Fed. Cir. 1999) (quoting Titanium Metals Corp. of Am. v.
Banner, 778 F.2d 775, 781 (Fed. Cir. 1985)). The Examiner has not
provided an explanation as to how Smesny teaches Appellants’ invention,
particularly that a first transmission includes an address of a target sensor
assembly. Appellants’ claims do not read on Smesny, and thus, Smesny
does not anticipate claims 1-31.

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CONCLUSION
The Examiner has not established that Smesny teaches that a first
transmission includes an address of a target sensor assembly. Thus, the
Examiner erred in rejecting claims 1-31 under 35 U.S.C. § 102(b).

DECISION
The Examiner’s decision rejecting claims 1-31 is reversed.

REVERSED

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