10631098 (B.P.A.I. Aug. 27, 2007)

Ex Parte Voldman

Board of Patent Appeals and InterferencesAug 27, 2007

10631098 (B.P.A.I. Aug. 27, 2007)

The opinion in support of the decision being entered today is not binding precedent of the Board. UNITED STATES PATENT AND TRADEMARK OFFICE _____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES _____________ Ex parte STEVEN H. VOLDMAN _____________ Appeal 2007-1648 Application 10/631,098 Technology Center 2800 ______________ Decided: August 27, 2007 _______________ Before JOSEPH L. DIXON, ROBERT E. NAPPI, and ST. JOHN COURTENAY III, Administrative Patent Judges. NAPPI, Administrative Patent Judge. DECISION ON APPEAL This is a decision on appeal under 35 U.S.C. § 134 of the final rejection of claims 14, 17, 18, and 24 through 36. We affirm. Appeal 2007-1648 Application 10/631,098 INVENTION The invention is directed to a circuit which modulates the body potential of a silicon over insulator (SOI) metal oxide silicon field effect transistor MOSFET to provide robust Electrostatic Discharge protection (ESD). (See pages 3 and 4 of Appellant’s Specification). Claim 14 is representative of the invention and reproduced below: 14. A silicon over insulator (SOI) metal oxide silicon field effect transistor (MOSFET) device comprising: a body that is floating with respect to an underlying substrate; a gate opposite said body; an RC discriminator comprising a resistor and a capacitor, wherein said RC discriminator is connected to said gate at a point of said RC discriminator between said resistor and said capacitor; and a circuit control network connected to said body, said circuit control network modulating a potential voltage of said body to provide electrostatic discharge (ESD) protection. REFERENCES The references relied upon by the Examiner are: Sasaki US 5,039,873 Aug. 13, 1991 Brady US 5,314,841 May 24, 1994 Au US 5,528,188 Jun. 18, 1996 Ker US 5,631,793 May 20, 1997 Chatterjee US 6,015,992 Jan. 18, 2000 (filed Dec. 30, 1997) Chen US 6,242,763 B1 Jun. 5, 2001 (filed Sep. 14, 1999) 2 Appeal 2007-1648 Application 10/631,098 REJECTIONS AT ISSUE Claims 14, 17, 18, and 31 through 36 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Au in view of Brady. The Examiner’s rejection is on pages 3 through 5 of the Answer. Claims 24 and 26 through 30 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Ker in view of Au and Brady. The Examiner’s rejection is on pages 6 through 8 of the Answer. Claim 25 stands rejected under 35 U.S.C. § 103(a) as being unpatentable over Ker in view of Au, Brady and Sasaki. The Examiner’s rejection is on pages 8 and 9 of the Answer. Throughout the opinion, we make reference to the Brief (filed April 14, 2006), and the Answer (mailed June 19, 2006) for the respective details thereof. CONTENTIONS Appellant argues, on page 7 through 9 of the Brief, that Au can not be combined with Brady as the circuit of Au would not be operable in a Silicon Over Insulator (SOI) structure. Appellant reasons that the N-well of the Silicon Controlled Rectifier (SCR) such as used by Au can not be fabricated using SOI technology1. Further, on pages 9 and 10 of the Brief, Appellant argues that if Au’s circuit were transferred to SOI technology the operability of Au would be destroyed as Au’s device relies upon the body being non- floating. Appellant reasons that “the technologies with respect to the body potential are fundamentally different, and teachings related to bodies of non- 1 Appellant cites no evidence to support the assertion. 3 Appeal 2007-1648 Application 10/631,098 SOI structures generally cannot be transferred to the floating bodies of SOI structures because of the fundamental difference regarding the body potential.”2 (Brief 10). On pages 10 and 11 of the Brief, Appellant also asserts that the combination of the references do not teach a circuit control network connected to said body, where said body is floating with respect to the underlying substrate, because it is improper to modify Au. The Examiner responds, on page 9 and 10 of the Answer, finding that fabricating an SCR using SOI technology was known to the skilled artisan at the time of the invention. The Examiner cites to two patents, Chen and Chatterjee, as evidence that SCR’s can be manufactured using SOI technology. Further, the Examiner states, on page 10 of the Answer: [W]hen modified the circuit of Au by fabricated [sic] the circuit in SOI environments, the body of transistor Q1 in Figure 4b of Au is still being controlled by the network 40 which is similar as applicant's invention that the body of the transistor is also controlled by a body controlled network. Note that, when fabricated in SOI technology, the circuit would have the advantages of low power and high speed. ISSUE Thus, the contentions present us with two issues. The first issue before us is whether Appellant has shown that the Examiner erred in finding that the circuit of Au could be implemented using SOI technology. The second issue before us is whether Appellant has shown that the Examiner erred in finding that Au’s circuit modified to be implemented in 2 Appellant cites no evidence to support the assertion. 4 Appeal 2007-1648 Application 10/631,098 SOI teaches the body of the MOSFET being floating with respect to the underlying substrate. PRINCIPLES OF LAW “Section 103 forbids issuance of a patent when ‘the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains.’” KSR Int'l Co. v. Teleflex Inc., 127 S. Ct. 1727, 1734, 82 USPQ2d 1385, 1391 (2007). The question of obviousness is resolved on the basis of underlying factual determinations including (1) the scope and content of the prior art, (2) any differences between the claimed subject matter and the prior art, (3) the level of skill in the art, and (4) where in evidence, so-called secondary considerations. Graham v. John Deere Co., 383 U.S. 1, 17-18, 148 USPQ 459, 467 (1966). See also KSR, 127 S. Ct. at 1734, 82 USPQ2d at 1391 (“While the sequence of these questions might be reordered in any particular case, the [Graham] factors continue to define the inquiry that controls.”) FINDINGS OF FACT 1. The Examiner finds that Au teaches a circuit which has a MOSFET (transistor Q1), with a body and gate; a resistor capacitor circuit and a control network (item 40). The control network modulates and controls the potential body of the transistor and is capable of providing ESD protection, i.e. 5 Appeal 2007-1648 Application 10/631,098 the Examiner finds that Au teaches the claimed circuit elements arranged as claimed. (Answer 3). 2. The Examiner finds that Au does not teach that the circuit elements are made using SOI technology. (Answer 3) 3. Appellant’s arguments do not dispute the Examiner’s findings identified in Fact 1. 4. Au teaches the circuit 40 is a SCR. (Col. 4, l. 60). 5. Au depicts the physical arrangement of the circuit in figure 4a. 6. The Examiner finds that Brady teaches that using SOI technology instead of regular silicon technology provides the advantages of increased processing speed and lower power consumption. (Answer 3). 7. The Examiner finds that “‘the body that is floating with respect to an underlying substrate’ on line 3 of claim 14 is met when fabricate the device by using SO1 technology (i.e., the body of Q1, Figure 4b in the above modification is floating with respect to an underlying substrate) because the body of an SOI MOSFET is floating with respect to an underlying substrate.” (Answer 4). 8. The Examiner finds Chen and Chatterjee teach that SCRs can be manufactured using SOI technology. (Answer 9-10). 9. We find that Chen teaches a SCR made using SOI technology. (See title, Abstract, col. 4, ll. 8-11). 6 Appeal 2007-1648 Application 10/631,098 10. We find that Chatterjee teaches an SCR made using SOI technology. The SCR makes use of either MOSFET or bipolar transistors. (See title, Abstract). ANALYSIS RELATED TO REJECTION OF CLAIMS 14, 17, 18, AND 31 THROUGH 36. First Issue: Appellant’s arguments have not convinced us that the Examiner erred in finding that Au can implement in SOI technology. Initially we note that the Appellant’s arguments do not dispute the Examiner’s findings that Au teaches the claimed circuit elements arranged as claimed (fact 3), rather Appellant’s arguments dispute the Examiner’s conclusion that a skilled artisan could implement Au’s circuit using SOI technology. Appellant has reasoned that the differences between SOI technology and regular silicon technology would prevent the Au’s circuit from being implemented in SOI, but Appellant has not provided any evidence to support the reasoning. In rebuttal to the Appellant’s arguments the Examiner has provided evidence (the Chen and Chatterjee references) which shows that, at the time of the Appellant’s filing of the instant application, it was known in the art that SCRs could be made using SOI technology. (Facts 8 through 10.) Thus, we find that the evidence of record supports the Examiner’s conclusion that fabricating Au’s circuit using SOI was within the skill of the art of the time of the invention. Accordingly, Appellant has not convinced us that the Examiner erred in finding that the circuit of Au could be implemented using SOI technology. 7 Appeal 2007-1648 Application 10/631,098 Second Issue: Appellant’s arguments have not persuaded us that the Examiner erred in finding that Au’s circuit modified to be implemented in SOI teaches the body of the MOSFET being floating with respect to the underlying substrate. The Examiner finds that implementing Au’s circuit using SOI will result in the body of the MOSFET being floating. Appellant argues that Au’s circuit can not be implemented using SOI, reasoning that the SCR can not be made in SOI and that Au’s circuit requires the body to be grounded. Appellant does not provide evidence to support these assertions. Further, as discussed supra, the Examiner has provided evidence to show that SCRs and MOSFETs can be implemented in SOI technology. (Fact 10.) Accordingly, Appellant has not convinced us that the Examiner erred in finding that Au’s circuit modified to be implemented in SOI teaches that the body of the MOSFET will be floating with respect to the underlying substrate. Appellant states, on page 11 of the Brief: Claims 17 and 32 define that the circuit control network limits the body to a reference voltage. As shown above, the teachings of Au cannot transfer to an SOI environment. Therefore, the combined teachings of Au and Brady would not teach or suggest to one ordinarily skilled in the art the features that are defined by dependent claims 17 and 32. Thus, it is Appellants [sic] position that dependent claims 17 and 32 are independently patentable on their own over the prior of record. On page 11 and 12 of the Brief, Appellant makes similar statements which recite the limitations of claim 17, 18, 32 through 36, without 8 Appeal 2007-1648 Application 10/631,098 providing an argument as to why the limitations are separately patentable. 37 C.F.R.§41.37(c)(1)(vii) states: [T]he failure of appellant to separately argue claims which appellant has grouped together shall constitute a waiver of any argument that the Board must consider the patentability of any grouped claim separately. Any claim argued separately should be placed under a subheading identifying the claim by number. Claims argued as a group should be placed under a subheading identifying the claims by number. A statement which merely points out what a claim recites will not be considered an argument for separate patentability of the claim. Thus, we consider Appellant’s statements, on page 11 and 12 of the Brief, regarding claims 17, 18, and 32 through 36 to be a statement which merely points out what the claims recite, and we do not consider these claims to be separately argued. Thus, in accordance with 37 C.F.R.§ 41.37(c)(1)(vii) we group these claims with claim 14. Nonetheless, as discussed above in our analysis related to the first issue, the Appellant has not convinced us that the Examiner erred in finding that one skilled in the art could implement Au’s circuit using SOI technology. Further, Appellant’s arguments do not separately address claim 31; accordingly, we group claim 31 with claim 14. ANALYSIS RELATED TO REJECTION OF CLAIMS 24 AND 26 THROUGH 30. Appellant presents arguments directed to independent claim 24 on pages 16 and 17 of the Brief. Appellant argues that Au’s circuit can not be implemented in SOI because it contains a SCR and that the circuits of Au and Brady can not be implemented as they rely upon the body being non- 9 Appeal 2007-1648 Application 10/631,098 floating. These arguments are similar to the arguments Appellant presented with respect to independent claim 14. As discussed supra, we find ample evidence of record to support the Examiner’s conclusion that fabricating Au’s circuit using SOI was within the skill of the art of the time of the invention. Similarly, Appellant has presented no evidence to rebut the Examiner’s finding that the teachings of Brady could also be implemented using SOI technology. Thus, Appellant’s arguments have not convinced us that the Examiner erred in finding that one skilled in the art could implement Brady and Au’s circuit using SOI technology. On page 19 and 20 of the Brief, Appellant makes statements which recite the limitations of claims 26 through 30 and state “As shown above, Au and Ker are not properly combinable with Brady. Therefore, the combined teachings of Ker, Au and Brady would not teach or suggest to one of ordinarily skilled in the art the features that is [sic] defined by dependent claim 26.” (Br. 20). Appellant’s statements regarding these claims do not provide separate argument as to why the limitations of claims 26 through 30 are separately patentable. Thus, we do not consider Appellant’s statements on page 19 and 20 regarding claims 26 through 30 to be separate arguments under 37 C.F.R.§ 41.37(c)(1)(vii), and we group these claims with claim 24. Nonetheless, as discussed above, Appellant has not convinced us that the Examiner erred in finding that one skilled in the art could implement Brady and Au’s circuit using SOI technology. Regarding claim 25, Appellant states, on page 19 of the Brief, that claim 25 recites that the first circuit control network and the second circuit control network comprise at least one MOSFET. Appellant asserts that the 10 Appeal 2007-1648 Application 10/631,098 Examiner’s rejection is in error as “One can not map the solution of Au into Ker and Brady, since it would not be operable nor possible to design and implement.” (Br. 19). These arguments have not persuaded us of error in the Examiner’s rejection. As discussed supra, Appellant has not presented evidence to support the assertion that the circuits of Au and Ker can not be implemented in SOI technology. Further, the Examiner has presented evidence to show that the elements of Au and Ker can be implemented in SOI technology. In the Examiner’s statement of the rejection the Examiner equates the first and second circuit control network with Au’s SCRs (items 52 and 50 of figure 4b). (See Answer page 6). Appellant does not contest this finding. Further, we note that Chatterjee teaches that implementing SCRs in SOI technology can be accomplished using MOSFETs. (Fact 10). Thus, Appellant’s arguments have not convinced us of error in the Examiner’s rejection of claim 25. CONCLUSION Appellant has not shown that the Examiner erred in finding that the circuit of Au could be implemented using SOI technology. Further, the Appellant has not shown that the Examiner erred in finding that Au’s circuit modified to be implemented in SOI teaches the body of the MOSFET being floating with respect to the underlying substrate. Thus, we find no error in the Examiner’s rejections, and we affirm the Examiner’s rejections of claims 14, 17, 18, and 24 through 36 under 35 U.S.C. § 103(a). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2006). 11 Appeal 2007-1648 Application 10/631,098 AFFIRMED eld FREDERICK W. GIBB, III GIBB & RAHMAN, LLC 2568-A RIVA ROAD SUITE 304 ANNAPOLIS MD 21401 12