Ex Parte Travaglini et al

Patent Trials and Appeals Board

Jul 9, 2019

15154497 - (D) (P.T.A.B. Jul. 9, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
15/154,497 05/13/2016 Dominick Travaglini
56412 7590 07/11/2019
InventIQ Legal LLP/Intel Corp.
P.O. Box 779
Menlo Park, CA 94026-0779
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
1 Ol - l 2900US 1747
EXAMINER
ROSARIO BENITEZ, GUSTA VO A
ART UNIT PAPER NUMBER
2838
NOTIFICATION DATE DELIVERY MODE
07/11/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
steve@inventiq.us
rodney@inventiq.us
sjc@eecspatents.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte DOMINICK TRA V AGLINI, JEFFREY DEMSKI,
THOMAS MATHES, SEAN TARLTON, and
JOSEPHZBIB
Appeal2018-008700
Application 15/154,497
Technology Center 2800
Before MARK NAGUMO, GRACE KARAFFA OBERMANN, and
MONTE T. SQUIRE, Administrative Patent Judges.
SQUIRE, Administrative Patent Judge.
DECISION ON APPEAL 1
Appellant2 appeals under 35 U.S.C. § 134(a) from the Examiner's
decision to reject claims 1-20, which are all of the claims pending in this
application. We have jurisdiction under 35 U.S.C. § 6(b ).
We AFFIRM.
1 In this Decision, we refer to the Specification filed May 13, 2016
("Spec."); Final Office Action dated Nov. 16, 2017 ("Final Act."); Appeal
Brief filed Mar. 6, 2018 ("Appeal Br."); Examiner's Answer dated July 9,
2018 ("Ans."); and Reply Brief filed Sept. 5, 2018 ("Reply Br.").
2 Appellant is Applicant, Altera Corporation (Bib Data Sheet), which,
according to the Appeal Brief (Appeal Br. 3), is also identified as the real
party in interest.
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Application 15/154,497
The Claimed Subject Matter
Appellant's disclosure relates to power converter circuits ( claims 1,
10) and methods with current limiting ( claim 17). Spec. ,r 1. In particular,
the Specification describes a power converter circuit, which includes a
current sensor circuit and a hysteretic comparison circuit. Id. ,r 3; see also
Abstract.
Claim 1 is illustrative of the subject matter on appeal and is
reproduced below from the Claims Appendix to the Appeal Brief:
1. A power converter circuit comprising:
a current sensor circuit that generates an indication of a
current through a power train circuit, wherein the power
converter circuit controls the current through the power train
circuit; and
a hysteretic comparison circuit that compares the
indication of the current through the power train circuit to a
negative current limit,
wherein the power converter circuit causes a negative
current in the power train circuit that is flowing away from an
output node of the power train circuit to decrease in response
to an indication generated by the hysteretic comparison circuit
that the negative current in the power train circuit has reached
the negative current limit.
Appeal Br. 16 (key disputed claim language italicized and bolded).
The References
The Examiner relies on the following prior art references as evidence
in rejecting the claims on appeal:
Gladish et al.
("Gladish")
Houston et al.
("Houston")
US 2014/0021933 Al
US 2016/0062375 Al
2
Jan.23,2014
Mar. 3, 2016
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Application 15/154,497
The Rejections
On appeal, the Examiner maintains (Ans. 2) the following rejections:
1. Claims 1-5 and 9-20 are rejected under 35 U.S.C. § 102(a)(l)
as being anticipated by Gladish ("Rejection 1 "). Final Act. 2-9; Ans. 2--4.
2. Claims 6-8 are rejected under 35 U.S.C. § 103 as being
unpatentable over Gladish in view of Houston ("Rejection 2"). Final
Act. 10-13.
OPINION
Having considered the respective positions advanced by the Examiner
and Appellant in light of this appeal record, we affirm the Examiner's
rejections based on the fact-finding and reasoning set forth in the Answer
and Final Office Action, which we adopt as our own. We add the following.
Reiection 1
Appellant presents substantive arguments for the patentability of
independent claims 1, 10, and 17 (Appeal Br. 7, 11, 13), but does not
separately argue the patentability of any other claim subject to the rejection.
We select claims 1, 10, and 17 as representative, and address each of these
claims in tum below. The remaining claims subject to this rejection stand or
fall with claims 1, 10, and 17. 37 C.F.R. § 4I.37(c)(l)(iv).
Claim 1
The Examiner determines that Gladish discloses all of the limitations
of claim 1 and, therefore, anticipates the claim. Ans. 2, 4--9 ( citing Gladish
,r,r 15-22, 25, 26, Figs. 1--4, 8); Final Act. 2-3. To serve as an anticipatory
reference, "the reference must disclose each and every element of the
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claimed invention, whether it does so explicitly or inherently." In re Gleave,
560 F.3d 1331, 1334 (Fed. Cir. 2009).
Appellant principally argues that the Examiner's rejection of claim 1
should be reversed because Gladish does not disclose "a hysteretic
comparison circuit that compares the indication of the current through the
power train circuit to a negative current limit," as recited in the claim.
Appeal Br. 7; Reply Br. 2--4. In particular, Appellant contends that, during
discontinuous conduction mode ("DCM"), Gladish does not compare an
indication current to a "negative current limit," as required by the claim.
Appeal Br. 7. Appellant contends that, in contrast to the claimed invention,
Gladish's "hysteresis comparator circuitry 136 compares the inductor
current II to a zero current level during DCM, not to a 'negative current
limit,' as recited in claim 1." Id. at 8.
Appellant further contends that Gladish does not disclose the
"wherein the power converter circuit causes a negative current ... to
decrease in response to an indication generated by the hysteretic comparison
circuit" recitation of the claim because Gladish does not disclose causing
negative current II in inductor 102 to decrease during DCM in response to
an indication generated by hysteresis comparator circuitry 136. Id. at 8-9;
Reply Br. 7-8.
Appellant also argues that Gladish does not disclose that during
mode 2, the zero crossing control signal 135 or 139 "causes a negative
current in the power train circuit ... to decrease in response to an indication
generated by the hysteretic comparison circuit," as recited in the claim.
Appeal Br. 10; Reply Br. 8-9. Appellant also contends that power supply
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system 100 shown in Figure 1 of Gladish does not disclose this element of
the claim. Appeal Br. 9.
We do not find Appellant's arguments persuasive of reversible error
in the Examiner's rejection based on the fact-finding and for the reasons
provided by the Examiner at pages 2 and 4--9 of the Answer and pages 2-3
of the Final Action. In particular, on the record before us, we find that a
preponderance of evidence supports the Examiner's analysis and
determination that Gladish discloses all of the elements of claim 1, including
"a hysteretic comparison circuit that compares the indication of the current
through the power train circuit to a negative current limit" and the "wherein
the power converter circuit causes a negative current ... to decrease in
response to an indication generated by the hysteretic comparison circuit"
recitations of the claim. Gladish ,r,r 15-22, 25, 26, 28, Figs. 1--4, 8.
Contrary to what Appellant argues (Appeal Br. 7-8; Reply Br. 2--4), a
preponderance of the evidence does support the Examiner's finding that
Gladish discloses "a hysteretic comparison circuit that compares the
indication of the current through the power train circuit to a negative current
limit," as recited in the claim. As the Examiner finds (Ans. 2, 4), Gladish
discloses a hysteretic comparison circuit (Gladish, Fig. 1 (elements
118-122), ,r,r 15-17) that compares the indication of the current through the
power train circuit to a negative current limit "during mode 2" (id. ,r 26,
Figs. 2, 4b ). In particular, as the Examiner explains (Ans. 4), paragraph 26
of Gladish discloses that "during mode 2" the inductor current (II) is
allowed to go negative, which is clearly shown in both Figure 2 (graph 206,
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"CCM3 with negative inductor current") and Figure 4B (graph 454, "CCM
with negative inductor current") of the reference. See also id. ,r 26 ("In
operation, during mode 2 CCM, the system 100 operates in a condition
where II may be positive and/or negative."), ,r 16 (disclosing that "[d]uring
mode 2, the power supply may sink power from the load, and II may
therefore be permitted to go negative").
Appellant's contention that Gladish's "hysteresis comparator
circuitry 136 compares the inductor current II to a zero current level during
DCM, not to a 'negative current limit"' (Appeal Br. 7-8) is misplaced and
not persuasive of reversible error in the Examiner's rejection because it is
based on how Appellant alleges Gladish's circuitry operates during mode 1.
The Examiner's rejection, however, is based on Gladish's circuitry's
operation "during mode 2." See Ans. 2, 4 (finding "Gladish discloses in
paragraph 26 that during mode 2 the inductor current is allowed to go
negative").
As the Examiner explains (Ans. 4, 6), although Gladish discloses an
embodiment where the inductor current may not be allowed to go negative
during mode 1 (Gladish ,r 25), which is when the discontinuous conduction
mode (DCM) occurs, the reference also discloses that the inductor current is
allowed to go negative "during mode 2" (id. ,r 26, Figs. 2, 4B). Cf In re
Bode, 550 F.2d 656,661 (CCPA 1977) (stating a "reference must be
evaluated for all it teaches and is not limited to its specific embodiments").
Appellant's contentions regarding the inductor current clipping at
approximately zero and that Gladish does not disclose causing negative
3 "CCM" refers to "continuous conduction mode." See Gladish ,r 2.
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current II to decrease during DCM (Appeal Br. 8-9; Reply Br. 7-8) are not
persuasive because they, too, are based on how Appellant contends
Gladish's circuit operates during mode 1, and not during mode 2, as set forth
in the Examiner's rejection. For example, as the Examiner correctly points
out (Ans. 4), the "clipping" of the inductor current only occurs during
mode 1 as shown in Figure 2 (graph 208, "Discontinuous Conduction Mode
(DCM)") of Gladish.
We find unpersuasive Appellant's contentions regarding the power
supply system 100 of Figure 1 of Gladish (Appeal Br. 9-10) and the
argument Gladish does not disclose that, during mode 2, the zero crossing
control signal 135 or 139 "causes a negative current in the power train
circuit ... to decrease in response to an indication generated by the
hysteretic comparison circuit" (id. at 10-11). Those arguments are
unpersuasive of reversible error in the rejection based on the fact-finding and
explanation provided by the Examiner at pages 7-9 of the Answer.
In particular, as the Examiner finds (Ans. 7, 9), Gladish discloses that,
after the zero crossing detector signals 139 and 135 (ZCD signal) transition
to "High," indicating that the current is going negative, the circuit enters
mode 2, i.e., "CCM with negative inductor current" (as indicated by the
horizontal arrows shown in Figure 4B). Id. ,r 26 (disclosing that "[i]f Il
begins to go negative, the zero crossing control signal 139 will transition
from Low to High and ... zero crossing control signal 135 will transition
from Low to High").
As the Examiner further finds (Ans. 9) and illustrated in Figure 4B,
Gladish discloses that the ZCD signal detects the negative peak and
ultimately changes its output signal, but this change is not immediately
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reflected in the graph due to the delay 138 (Gladish, Fig. 1 ). Id. ,r 26; see
also id. ,r 28 ( disclosing "when II 454 begins to cross from positive to
negative (zero crossing and PWM4 signal 115 Low ... ), the zero crossing
control signal 139 transitions from Low to High while I 1 remains negative
and PWM remains Low"), ,r 17 ("Circuitry 118 may also include latch delay
circuitry ... configured to delay a latch state of the latch circuitry 138, based
on the PWM signal 115.").
As the Examiner explains (Ans. 9), because it is not until the ZCD
signal is actuated that the PWM signal 115 is generated, this means that the
PWM signal 115 is dependent on the output of the hysteresis
comparator 136, which is used to generate the ZCD signal. Gladish ,r 17
("The zero crossing detector circuitry 118 is configured to generate a zero
crossing control signal 139 (ZCD) indicative of the state of II."), ,r 26,
Fig. 4B. Thus, as the Examiner finds (Ans. 9), the PWM signal 115 is,
indeed, dependent on the output of the hysteresis comparator 136 because it
is the component of circuitry 118 that creates control signals 139 and 135,
which disable the driver 126 to control the sinking of current through the
operation of the low side switch 108, and ultimately causes the current to
decrease in the manner claimed. Id. ,r 17 (disclosing that "[z]ero crossing
detector circuitry 118 may include hysteresis comparator circuitry 136"),
,r 26 ( disclosing "when the zero crossing control signal 139 and the latched
zero crossing control signal 135 are High, the second gate driver circuit 126
is disabled"), ,r 28 ( disclosing "when II 454 begins to cross from positive to
4 "PWM" refers to a "pulse switch modulation" signal. See Gladish ,r 15.
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negative ... the zero crossing control signal 139 transitions from Low to
High).
Thus, we find a preponderance of the evidence does support the
Examiner's finding that, during mode 2, Gladish's circuit, including
operation of zero crossing control signals 139 and 135, "causes a negative
current in the power train circuit ... to decrease in response to an indication
generated by the hysteretic comparison circuit," as recited in the claim.
Appellant's arguments do not reveal reversible error in the
Examiner's factual findings and analysis in this regard.
Appellant's assertions that "FIG. 4B of Gladish does not disclose or
suggest that the negative inductor current I 1 decreases in response to
changes in the zero crossing control signal 139 ZCD (graph 456) generated
by zero crossing detector circuitry 118 and hysteresis comparator circuitry
136" (Appeal Br. 10) and "clearly shows that power supply system 100 does
not cause the negative inductor current II to decrease in response to an
output of hysteresis comparator circuitry 13 6 ... during mode 2 CCM" (id.
at 10) are not persuasive because they are conclusory and unsupported by
persuasive evidence in the record. Attorney argument is not evidence. In re
De Blauwe, 736 F.2d 699, 705 (Fed. Cir. 1984); see also In re Geisler, 116
F.3d 1465, 1470 (Fed. Cir. 1997) (explaining that mere lawyer's arguments
or conclusory statements, which are unsupported by concrete factual
evidence, are entitled to little probative value).
Appellant's assertion that "zero crossing control signals 135 and 139
of Gladish do not indicate 'that the negative current in the power train circuit
has reached the negative current limit' as recited in claim 1" (Appeal Br. 11)
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is equally unpersuasive because it, too, is conclusory and based on attorney
argument. Geisler, 116 F.3d at 1470.
Moreover, Appellant's disagreement as to the Examiner's factual
findings regarding what Gladish discloses, without more, is insufficient to
establish reversible error. Cf SmithKline Beecham Corp. v. Apotex Corp.,
439 F.3d 1312, 1320 (Fed. Cir. 2006) ("[M]ere statements of disagreement .
. . as to the existence of factual disputes do not amount to a developed
argument.").
We, therefore, sustain the Examiner's rejection of claim 1.
Claim 10
Claim 10 recites a power converter circuit comprising:
a power train circuit comprising a first switching
transistor, wherein the power converter circuit turns the first
switching transistor on and off in response to a pulse width
modulation signal in a pulse width modulation mode to control a
current in the power train circuit;
a hysteretic comparison circuit that causes the power
converter circuit to control the current in the power train circuit
in a first current limit mode in response to the current in the
power train circuit reaching a first current limit; and
a gate circuit that prevents the power converter circuit
from controlling the current in the power train circuit using the
pulse width modulation signal during the first current limit
mode in response to the hysteretic comparison circuit
indicating that the current in the power train circuit has
reached the first current limit.
Appeal Br. 18 (key disputed claim language italicized and bolded).
The Examiner determines that Gladish discloses all of the limitations
of claim 10 and, therefore, anticipates the claim. Ans. 3-10 ( citing Gladish
,r,r 15-22, 24--26, 32 Figs. 1--4, 8); Final Act. 5.
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Appellant argues that the Examiner's rejection of claim 10 should be
reversed because Gladish does not disclose "a gate circuit that prevents the
power converter circuit from controlling the current in the power train
circuit," as recited in the claim. Appeal Br. 11-13; Reply Br. 9-11. In
particular, Appellant contends
Gladish does not disclose or suggest that high side driver
circuitry 110, low side driver circuitry 112, driver circuit 124, or
driver circuit 126 prevent "the power converter circuit from
controlling the current in the power train circuit using the pulse
width modulation signal during the first current limit mode in
response to the hysteretic comparison circuit indicating that the
current in the power train circuit has reached the first current
limit" as recited in claim 10 of the present application.
Id. at 12.
Appellant also contends Gladish does not disclose that "the zero
crossing control signals 135 and 139 are provided to a gate circuit that
prevents power supply system 100 of FIG. 1 from controlling the current
through high side switch 106 and inductor 102 using PWM signal 115
during a current limit mode." Id. at 13.
We do not find Appellant's argument persuasive of reversible error in
the Examiner's rejection based on the fact-finding and for the reasons
provided by the Examiner at pages 3-10 of the Answer and page 5 of the
Final Action. We find that a preponderance of evidence in this appeal
record supports the Examiner's findings and determination that Gladish
discloses all of the limitations of claim 10, including "a gate circuit that
prevents the power converter circuit from controlling the current in the
power train circuit." Gladish ,r,r 15-22, 24--26, Figs. 1--4, 8.
As the Examiner finds (Ans. 3), Gladish discloses a gate circuit
(Gladish, Fig. 1 ( elements 110-112, 124)) that prevents the power converter
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circuit 100 from controlling the current in the power train circuit using pulse
width modulation signal 114 during the first current limit mode (mode 2) in
response to the hysteretic comparison circuit (hysteresis comparator circuitry
136) indicating that the current in the power train circuit has reached the first
current limit. Id. ,r,r 15, 17, 20, 26, 32, Fig. 8.
As the Examiner finds (Ans. 10), Gladish teaches that during the
operation of sinking current/voltage from the load, the PWM operation is
prevented via gate control signals. Gladish, Fig. 8, ,r 32 ( disclosing that
under certain operating modes "the load may require that the power
supply ... sinks current (such that current through an output inductor may
be negative)" and using "gate control signals to delay a switch transition of
the high side switch"). In particular, as the Examiner finds (Ans. 10),
Gladish teaches that when the high side switching operation is delayed so
the sinking of current from the load can occur, the PWM for the high side
switch is disabled. Id. ,r 32 ("Operations of this embodiment ... include
controlling a high side switch with a gate signal to delay a switch transition
of the high side switch.").
As the Examiner further finds (Ans. 10), paragraph 20 of Gladish
teaches that during the PWM control of the low side switch, both driver
circuits 124 and 126 are enabled; but when the circuitry is in "mode 2,"
control signals 131 and 129 disable the driver circuit 126 for operation, and
driver circuit 124 sends a weak signal to the low side switch 108 to provide
the sinking function. Id. ,r 20 ( disclosing that "when the second driver
circuit 126 is disabled in mode 2, the rise and fall times of the switch
transitions of the low side switch 108 is about 1.5-3 times slower than
compared to when both driver circuits 124/126 are enabled in mode 1 ").
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Appellant's arguments do not reveal reversible error in the
Examiner's analysis and factual findings in this regard.
Appellant's contention that "Gladish discloses during mode 1
Discontinuous Conduction Mode (DCM) the AND gates 128 and 130 ... do
not prevent power supply system 100 from controlling the inductor
current II using the PWM signals 115/117 during a first current limit mode
in response to the zero crossing control signals 135 and 139 going High" is
unpersuasive of reversible error (Appeal Br. 12-13) because, as previously
discussed above with respect to claim 1, it is based on how Appellant alleges
Gladish's circuit operates during mode 1, and not mode 2, as set forth in the
Examiner's rejection. Cf Bode, 550 F.2d at 661.
Appellant's further contention that "Gladish does not disclose or
suggest that the zero crossing control signals 135 and 139 are provided to a
gate circuit that prevents power supply system 100 of FIG. 1 from
controlling the current through high side switch 106 and inductor 102 using
PWM signal 115 during a current limit mode" (Appeal Br. 13) is not
persuasive of reversible error because it is conclusory and based on
limitations that do not appear in the claim. See In re Van Geuns, 988 F.2d
1181, 1184--85 (Fed. Cir. 1993); see also In re Self, 671 F.2d 1344, 1348
( CCP A 19 82) ("Many of appellant's arguments fail from the outset because .
. . they are not based on limitations appearing in the claims.").
Also, as previously discussed above in affirming the Examiner's
rejection of claim 1, Appellant's mere disagreement with the Examiner's
factual findings as to what Gladish discloses, without more, is insufficient to
establish reversible error in the Examiner's rejection. SmithKline, 439 F.3d
at 1320.
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We, therefore, sustain the Examiner's rejection of claim 10.
Claim 17
Claim 17 recites a method comprising:
generating an indication that a positive current in a
power train circuit has reached a positive current limit using a
hysteretic comparison circuit;
decreasing the positive current in the power train circuit
in a positive current limit mode using a driver circuit in response
to the indication that the positive current in the power train circuit
has reached the positive current limit;
generating an indication that a negative current in the
power train circuit has reached a negative current limit using the
hysteretic comparison circuit; and
decreasing the negative current in the power train circuit
in a negative current limit mode using the driver circuit in
response to the indication that the negative current in the power
train circuit has reached the negative current limit, wherein the
driver circuit and the hysteretic comparison circuit are part of a
power converter circuit.
Appeal Br. 20 (Claims Appendix).
The Examiner determines that Gladish discloses all of the limitations
of claim 17 and, therefore, anticipates the claim. Ans. 3-12 (citing Gladish
,r,r 15-22, 24--26, Figs. 1--4, 8); Final Act. 8.
Appellant argues that the Examiner's rejection of claim 17 should be
reversed because Gladish does not disclose the steps of "generating an
indication that a positive current in a power train circuit has reached a
positive current limit" and "decreasing the positive current in the power train
circuit," as recited in the claim. Appeal Br. 14. Appellant contends that, in
contrast to the claimed method, Gladish discloses that the zero crossing
detector circuitry 118 including the hysteresis comparator circuitry 136
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generates an indication that the inductor current 11 has reached a zero
current during DCM, and not a "positive current limit," as required by the
claim. Id. at 14; Reply Br. 11-13.
We do not find Appellant's argument persuasive of reversible error in
the Examiner's rejection based on the fact-finding and for the reasons
provided by the Examiner at pages 3-12 of the Answer and page 8 of the
Final Action. Rather, on the record before us, we find that a preponderance
of evidence supports the Examiner's analysis and determination that Gladish
discloses all of the steps of claim 17, including the steps of "generating an
indication that a positive current in a power train circuit has reached a
positive current limit" and "decreasing the positive current in the power train
circuit," as recited in the claim. Gladish ,r,r 15-22, 24--26, Figs. 1--4, 8.
As the Examiner finds (Ans. 3), Gladish discloses the step of
generating an indication that a positive current in a power train circuit has
reached a positive current limit during "mode 1" using a hysteretic
comparison circuit (Gladish, Fig. 1, (elements 118-122, 136)). As the
Examiner further finds (Ans. 3), Gladish also discloses the step of
decreasing the positive current in the power train circuit in a positive current
limit mode (mode 1) using a driver circuit (Gladish, Fig. 1 ( elements
110-112, 124)) in response to the indication that the positive current in the
power train circuit has reached the positive current limit (id. at Fig. 2
(graph 202)). See also id. ,r 17 (disclosing that "[i]n mode 1, current through
the inductor 102 is positive ( or zero)"), ,r 24 ("If II remains positive, the
zero crossing control signal 139 and the latched zero crossing control signal
135 will remain Low, and thus the first driver control signal 129 and the
second driver control signal will remain Low.").
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As the Examiner also finds (Ans. 3), and as previously discussed
above in connection with claim 1, Gladish discloses the step of decreasing
the negative current in the power train circuit in a negative current limit
mode "during mode 2" using the driver circuit in response to the indication
that the negative current in the power train circuit has reached the negative
current limit (Gladish, Figs. 2, 4B, ,r 26), wherein the driver circuit and the
hysteretic comparison circuit are part of a power converter circuit (id. at
Fig. 1).
As the Examiner explains (Ans. 11 ), Figure 2 of Gladish (graph 202)
shows how the inductor current is limited during the first mode (mode 1) and
during the second mode (graph 206), which shows the values of the inductor
current staying between two ranges of values, and is very similar to
Applicant's Figure 4 in the Specification and its description of the inductor
current. Compare Figures 4A and 4B of the Specification with, Figure 2 of
Gladish (graph 202); see also Gladish ,r 18 ( disclosing that "[ s ]ignal graph
202 depicts the inductor current I 1 during CCM mode when the inductor
current is always positive" and the "modes when the inductor current is
always positive ( or approximately zero) shall be referred to ... as
'mode 1 "').
As the Examiner further explains (Ans. 11 ), Gladish also teaches that
the hysteresis comparator circuitry 136 provides two reference voltages and
because the input to the negative terminal of comparator is ground, the
hysteresis will create both a positive and a negative threshold. See Gladish,
Figs. 2, 3A, ,r,r 24, 25. Moreover, as the Examiner also explains (Ans.
11-12), when the inductor current exceeds the positive threshold, the ZCD
signal sent to the control logic will be a logic 0, and when the inductor
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current reaches the negative threshold, the ZCD signal will provide a logic 1
to the control logic, which is how the comparator 136 actually compares the
inductor current with a positive and a negative threshold. See Gladish ,r 25
("If Il remains positive, the zero crossing control signal 139 and the latched
zero crossing control signal 135 will remain Low, and thus the first driver
control signal 129 and the second driver control signal will remain Low.
Thus, both driver circuits 124 and 126 are enabled, and the total drive
control signal 125 is sufficient to control the low side switch 108 for fast
switch transitions.").
Appellant's arguments do not reveal reversible error in the
Examiner's analysis and factual findings in this regard.
In particular, Appellant's arguments at page 14 of the Appeal Brief
and pages 11-13 of the Reply Brief are not persuasive of reversible error in
the Examiner's rejection because they are largely conclusory and based on
attorney argument. De Blauwe, 736 F.2d 699 at 705; Geisler, 116 F.3d at
1470.
We, therefore, sustain the Examiner's rejection of claim 1 7.
Accordingly, we affirm the Examiner's rejection of claims 1-5 and 9-
20 under 35 U.S.C. § 102(a)(l) as being anticipated by Gladish.
Rejection 2
In response to the Examiner's § 103 rejection of claims 6-8 as
obvious over the combination of Gladish and Houston (Rejection 2, stated
above), Appellant does not present any new or additional substantive
arguments and relies on principally the same arguments previously presented
and discussed above in response to the Examiner's rejection of claim 1 as
being anticipated by Gladish (Rejection 1, stated above). See Appeal Br. 11.
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Accordingly, based on the findings and technical reasoning provided
by the Examiner and for principally the same reasons discussed above for
affirming Rejection 1, we affirm Rejection 2.
DECISION/ORDER
The Examiner's rejections of claims 1-20 are affirmed.
It is ordered that the Examiner's decision is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
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