Ex Parte Topacio et alDownload PDFPatent Trials and Appeals BoardMay 8, 201914529859 - (D) (P.T.A.B. May. 8, 2019) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 14/529,859 10/31/2014 16501 7590 Timothy M. Honeycutt Attorney at Law 37713 Parkway Oaks Ln. Magnolia, TX 77355 05/10/2019 FIRST NAMED INVENTOR Roden Topacio UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. AMDI:305\HON 9571 EXAMINER KEBEDE, BROOK ART UNIT PAPER NUMBER 2894 NOTIFICATION DATE DELIVERY MODE 05/10/2019 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): timhoney@sprynet.com timhoneycutt@earthlink.net elizabethahoneycutt@earthlink.net PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte RODEN TOPACIO and ANDREW K.W. LEUNG Appeal2018-005439 Application 14/529,859 Technology Center 2800 Before MARK NAGUMO, BRIAND. RANGE, and DEBRA L. DENNETT, Administrative Patent Judges. DENNETT, Administrative Patent Judge. DECISION ON APPEAL 1 STATEMENT OF THE CASE Appellants2 appeal under 35 U.S.C. § 134(a) from a final rejection of claims 1-20. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. 1 In our Decision, we refer to the Specification filed October 31, 2014 ("Spec."); the Final Office Action dated August 24, 2017 ("Final Act."); the Appeal Brief filed December 21, 2017 ("Appeal Br."); the Examiner's Answer dated March 9, 2108 ("Ans."); and the Reply Brief filed April 30, 2018 ("Reply Br."). 2 Appellants identify ATI Technologies ULC as the real party in interest. Appeal Br. 1. Appeal2018-005439 Application 14/529,859 The claims are directed to circuit boards with constrained solder interconnect pads and methods of manufacturing the same. Spec. ,r 1. Claim 1, reproduced below from the Claims Appendix with the key limitation italicized, illustrates the claimed subject matter: 1. A method of manufacturing, comprising: forming a solder mask on a circuit board with a first opening having a sidewall; and forming a solder interconnect pad in the first opening, the sidewall setting the lateral extent of the solder interconnect pad. REFERENCES The Examiner relies on the following prior art in rejecting the claims on appeal: Pahl et al. ("Pahl") Leung us 6,057,222 US 2011/0110061 Al REJECTIONS May 2, 2000 May 12, 2011 The Examiner maintains the rejection of claims 1-20 under 35 U.S.C. § 103 as obvious over Leung in view of Pahl. Final Act. 2-7. OPINION We begin our analysis with interpretation of the claim term "the sidewall setting the lateral extent of the solder interconnect pad," on which our Opinion ultimately rests. During prosecution, we give the language of the proposed claims "the broadest reasonable meaning of the words in their ordinary usage as they would be understood by one of ordinary skill in the art, taking into account 2 Appeal2018-005439 Application 14/529,859 whatever enlightenment by way of definitions or otherwise that may be afforded by the written description contained in the applicant's specification." In re Morris, 127 F.3d 1048, 1054--55 (Fed. Cir. 1997). "Under a broadest reasonable interpretation, words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification and prosecution history." TriVascular, Inc. v. Samuels, 812 F.3d 1056, 1062 (Fed. Cir. 2016). In the present case, the Specification provides no precise meaning to the term, "the sidewall setting the lateral extent of the solder interconnect pad." The broadest reasonable interpretation of the term is, considering a sectional view through a portion of a circuit board, "the sidewall, or vertical portion of the opening [220] 3 is the farthest sideways extent of the solder interconnect pad [65]," as shown in the embodiment illustrated in Figure 2, below. 3 Labels to elements are presented in bold font, regardless of their presentation in the original document. 3 Appeal2018-005439 Application 14/529,859 Figure 2 shows a sectional view of a chip 15 connected to circuit board 20. Note solder interconnect pad 65 in opening 220. For each independent claim ( claims 1, 9, and 16), the Examiner finds that Leung discloses forming a solder mask on a circuit board or semiconductor chip package substrate and forming a first opening to expose the solder pad. Final Act. 2 and 6 ( citing Leung Figure 3 and ,r,r 30-38). The Examiner finds that Leung does not disclose "forming a solder interconnect in the first opening, the sidewall setting the lateral extent of the solder interconnect pad." Id. However, the Examiner finds that Pahl discloses a method of manufacturing, comprising: forming a solder mask (2) (i.e., cover layer 2 is commonly known as solder mask) on a substrate (1) with a first opening (6) having a sidewall (i.e., window is claimed opening); forming a solder interconnect pad (4) (i.e., solderable layer 4 is solder interconnect pad) in the first opening (6): and whereby the sidewall sets the lateral extent of the solder interconnect pad ( 4) during the formation of the solder 4 Appeal2018-005439 Application 14/529,859 interconnect pad in order to protect the underlying device structure when solder interconnect pad formed." Id. at 2-3 ( citing Pahl Figure 1 and (see Fig. 1 and col. 2, 1. 58---col. 3, 1. 45). Pahl Figure 1 is reproduced below: FIG 1 7 2 1 Figure 1 is a "diagrammatic side view" of a SAW (surface acoustic wave) component produced by the method according to Pahl' s invention. Pahl col. 2, 11. 51-52. The SAW component generally comprises piezoelectric substrate 1 and conductive structures 3 provided thereon. Id. col. 2, 11. 59---62. Electrically conductive structures 3 are covered by cap 2, which protects the structures against environmental influences. Id. col. 2, 1. 66-col. 3, 1. 1. "The component can be directly used in further applications with the cover 2 and the substrate 1 forming its 'housing'." Id. col. 3, 11. 1- 3. Window 6 is provided in cover 2, through which solderable layer 4 is applied "which is in contact with a non-illustrated pad of[] electrically conductive structures 3." Id. col. 3, 11. 7-10. Solderable layer 4 may be, e.g., a chromium/chromium copper/copper/gold layer. Id. col. 3, 11. 10-13. The Examiner maps elements of Pahl to limitations of claim 1 as follows: cover layer 2 represents a solder mask, substrate 1 is the substrate or circuit board; solderable layer 4 is the solder interconnect pad, and window 6 is the first opening. Final Act. 2. The Examiner reasons that it would have been obvious to one of ordinary skill in the art considering 5 Appeal2018-005439 Application 14/529,859 Leung to have formed a solder interconnect in a first opening "whereby the sidewall sets the lateral extent of the solder interconnect pad in order to protect the underlying device structure when [the] solder interconnect pad is formed." Id. at 3. For claim 1, Appellants limit their arguments to Pahl. Appeal Br. 14-- 26; Reply Br. 2. Appellants argue that independent claims 9 and 16 are patentable for the same reasons as argued for independent claim 1. Appeal Br. 25. Appellants' most persuasive argument is that the lateral extent of the solderable layer 4 of Pahl is not set by window 6. Id. at 19-24. Appellants' argument is based on interpretation of Pahl' s figures and text describing them. Id. Pahl Figure 2 is reproduced below: FIG 2 7 I 4 Figure 2 is a partial diagrammatic plan [top] view of the component shown in Figure 1. Pahl col. 2, 11. 53-54. Cover 2, solderable layer 4, and bump 7 are identified. Appellants emphasize Pahl' s disclosure that "the solderable layer 4 also lies on parts of cover 2, as is evident from FIG. 2." Id. at 20 ( emphasis added). Comparing Figure 2 with Figure 1, it appears that layer 4, identified 6 Appeal2018-005439 Application 14/529,859 by the Examiner as corresponding to the solder interconnect pad, is larger than window 6, in conflict the critical claim requirement. In response to Appellants' arguments, the Examiner merely points to Pahl Figure 1 and argues "the solder pad (4) touches the lateral sidewall of the opening." Ans. 10 ( emphasis added). The claim language, however, requires more. Specifically, solderable layer 4 must not only touch the sidewalls, but also cannot extend beyond them. The Examiner fails to adequately explain how Pahl describes this limitation. For the reasons above, Appellants show reversible error in the Examiner's rejection of independent claims 1, 9, and 16. The dependent claims stand together with the independent claims. See 37 C.F.R. § 4L37(c)(l)(iv). DECISION For the above reasons, the Examiner's rejection of claims 1-20 is reversed. REVERSED 7 Copy with citationCopy as parenthetical citation