Ex Parte Thomsen

Patent Trial and Appeal Board

Jun 15, 2017

13905260 (P.T.A.B. Jun. 15, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/905,260 05/30/2013 Axel Thomsen SIL.0214US (D-13-700-03) 8377
21906 7590 06/19/2017
TROP, PRUNER & HU, P.C.
1616 S. VOSS ROAD, SUITE 750
HOUSTON, TX 77057-2631
EXAMINER
HILTUNEN, THOMAS J
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
06/19/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
tphpto@tphm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte AXEL THOMSEN
Appeal 2016-004012
Application 13/905,260
Technology Center 2800
Before LINDA M. GAUDETTE, CHRISTOPHER L. OGDEN, and
MICHAEL G. McMANUS, Administrative Patent Judges.
McMANUS, Administrative Patent Judge.
DECISION ON APPEAL
The Examiner finally rejected claims 9, 10, 12, 13, 16, and 21 of
Application 13/905,260 under 35 U.S.C. § 102(a)(1), and claims 14, 19, and
20 under 35 U.S.C. § 103(a). Final Act. (April 7, 2015) 3—10. Appellant1
seeks reversal of these rejections pursuant to 35 U.S.C. § 134(a). We have
jurisdiction under 35 U.S.C. § 6.
For the reasons set forth below, we AFFIRM.
1 Silicon Laboratories, Inc. is the Applicant/Appellant, and is identified as
the real party in interest. Appeal Br. 3.
Appeal 2016-004012
Application 13/905,260
BACKGROUND
The present application generally describes systems and techniques
for generating one or more supply voltages from a lower supply voltage that
is provided to an electrical system for purposes of operating the system's
transistors. Spec. 122.
Claim 9 is representative of the pending claims and is reproduced
below with the portion at issue italicized:
9. An apparatus comprising:
a first charge pump adapted to provide a first voltage;
a second charge pump adapted to provide a second voltage and
provide a current; and
a supply voltage circuit comprising an output stage circuit to
provide an output voltage for the supply voltage circuit, the
supply voltage circuit adapted to bias the output stage circuit in
response to the first voltage, use the current provided by the
second charge pump for an output current for the output stage
circuit, and be coupled to the second voltage such that the
output voltage follows the second voltage.
Appeal Br. 12 (Claims App’x.) (italics added).
REJECTIONS
On appeal, the Examiner maintains the following rejections:
1. Claims 9, 10, 12, 13, 16, and 21 are rejected under 35 U.S.C.
§ 102(a)(1) as anticipated by US 2013/0027120 Al, pub. Jan. 31, 2013
(hereinafter “Lo”).2 Final Act. 3—7.
2 Claims 1, 4, 5, and 8 were canceled by amendment dated June 8, 2015, and
entered by the Examiner June 16, 2015. Accordingly, any rejections of these
claims are now moot.
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Application 13/905,260
2. Claim 19 is rejected under 35 U.S.C. § 103(a) as obvious over
Lo in view of US 7,190,211 B2, iss. Mar. 13, 2007 (hereinafter
“Nakagawa”). Id. at 7—9.
3. Claims 14 and 20 are rejected under 35 U.S.C. § 103(a) as
obvious over Lo in view of US 2006/0114721 Al, pub. June 1, 2006
(hereinafter “Frulio”). Id. at 9—10.
DISCUSSION
Rejection 1. The Examiner rejected claims 9, 10, 12, 13, 16, and 21
as anticipated by Lo. Id. at 3—7. Appellant presents argument regarding
independent claim 9 and states that the rejection of independent claim 16
should be reversed “for at least the same reasons as independent claim 9.”
Appeal Br. 10. Claims 10, 12, and 13 depend from claim 9 while claim 21
depends from claim 16. Accordingly, the rejection of claims 10, 12, 13, 16,
and 21 will stand or fall with the rejection of claim 9. See 37 C.F.R.
§ 41.37(c)(iv) (2015).
Claim 9 requires, inter alia, “a supply voltage circuit” where “the
output voltage follows the second voltage.” The Examiner finds that Lo
teaches such limitation in that its output voltage “RDPWR” follows second
voltage “PD.” Final Act. 5 (“PUMP2 is coupled to M41 such that M41
operates as a source follower and the output of the circuit, RDPWR, follows
PD.”). Figure 1 of Lo is reproduced below for reference.
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Application 13/905,260
Figure 1 of Lo is a block diagram of a charge pump system providing read
power for a memory array. Lot 38.
Appellant argues that the output of Lo (RDPWR) does not “follow”
voltage PD because Lo teaches that transistor M41 is to be operated in the
saturation region. Appeal Br. 10. The Examiner explains “saturation” as
follows:
As is known the saturation region of a MOSFET transistor occurs
when the MOSFET provides the maximum amount of drain
current it is capable of outputting (e.g., there is essentially very
little to no increase in the drain current with respect to increase
in the drain/source voltage). Therefore, there is a point where
the output of a MOSFET will stop increasing (or increase at a
very slow rate) as the voltage upon the drain increases. Thus, the
MOSFET transistor will output a voltage that is fully dependent
upon the drain voltage until the MOSFET reaches saturation.
This is the case with M41.
Final Act. 12.
Appellant contends that, because Lo teaches that transistor M41 is
placed in the saturation region, “M41 does not act as a source follower.”
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Application 13/905,260
Appeal Br. 10. Appellant cites to 1 51 of Lo which provides that “[t]he
voltage at the RDPWR node is relatively unaffected by voltage variation at
the PD node, so long as the transistor M41 remains in the saturation region
of operation.” Appeal Br. 10 (citing Lo 151). Lo further provides that
“[s]ince node RDPWR is approximately VVG-VTN if transistor M41 is kept
in saturation, the VPD sawtooth waveform is unimportant.” Lo 1107
(where “VVG” refers to the voltage at node VG and “VTN” refers to the
transistor threshold voltage).
The Examiner responds that follower transistors are known to be
dependent upon the source and drain voltages as well as the gate and
threshold voltage. Answer 9. In support, the Examiner quotes from a prior
art patent (Busse et al., US 6,653,636 B2, iss. Nov. 25, 2003 (hereinafter
“Busse”)) which provides as follows:
[T]he source follower transistor 21 as well as the active
load 23 should preferably operate in the saturation range of the
relevant transistor characteristic, that is, the condition
Vds > Vos-Vt must be satisfied, where Vds is the drain source
voltage, Vgs is the gate source voltage and Vt is the actual
threshold voltage of the relevant transistor. The voltage transfer
of the source follower transistor can then be described by the
equation Vs=VG-Vthr, where Vthr is the effective threshold
voltage which is dependent on the actual threshold voltage Vt
and the drain current ID. Vs is the voltage present at the source
and Vg is the voltage present at the gate of the source follower
transistor 21.
Answer 10 (quoting Busse 7:6—17) (emphasis omitted). Thus, the Examiner
concludes that operation in the saturation region does not prevent transistor
M41 of Lo from following source voltage PD. Answer 10.
Appellant’s argument rests on the meaning of the term “follows” in
claim 9. Appellant, however, does not propose any particular construction
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Application 13/905,260
for this limitation. We find in the Specification only one sentence that may
bear upon such term: “[i]n this regard, the VOUT1 and VOUT2 voltages are
provided by corresponding pMOS transistor followers, which are formed
from pMOS transistors 982 and 988, respectively.” Spec. 1 59 (emphasis
added). Thus, the Specification teaches an output voltage coupled to the
second voltage by pMOS transistor followers.
The Specification teaches as follows regarding the operation of
MOSFETs (including p-MOS transistors):
When conducting, the MOSFET may be placed either in
an Ohmic mode in which the voltage across the drain-source
current path generally resistively varies with the magnitude of
the current in the path; or in an active, or saturation mode, in
which the voltage across the drain source current is generally
independent of the magnitude of the current in the drain-source
path.
The magnitude of the drain-source voltage of the
MOSFET relative to the magnitude of its gate-source voltage
determines whether the MOSFET is in the saturation mode or
in the Ohmic mode. More specifically, for the nMOS transistor
to be in the saturation mode (as opposed to the Ohmic mode),
the Vds drain-to-source voltage of the nMOS transistor exceeds
a certain threshold defined by the gate-to-source and threshold
voltages, as described below:
Vds > Vgs -Vtn, Eq. 1
For the pMOS transistor to be in the saturation mode, the
Vsd source-to-drain voltage exceeds a certain threshold, as
described below:
Vsd > Vsg-Vtp, Eq. 2
where the "Vsg" represents the source-to-gate voltage.
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Application 13/905,260
Spec. 18—20. Thus, the Specification does not provide any particular
definition of the term “follows” but does indicate that the output voltages are
provided by MOSFET transistors that may operate in saturation mode or in
Ohmic mode.
This is similar to the disclosure of Lo which provides that “[i]n one
embodiment, the transistor operates in a saturation region.” Lo 126. In the
same way, Lo includes a dependent claim providing for an apparatus
“wherein the transistor operates in a saturation region,” Lo 1117 (claim 11),
suggesting that the circuit of Lo may operate in either an Ohmic or
saturation mode. Thus, both Lo and the device described in the
Specification teach a transmitter that may operate in Ohmic or saturation
mode with corresponding output. This is consistent with the Examiner’s
findings that “Lo’s source follower output stage operates in the exact same
manner as Appellant’s” and “Lo is connected in the exact same fashion and
therefore must operate in the same way as Appellant's circuit.” Answer 13.
Further, there seems to be no dispute that the output (RDPWR) of Lo would
“follow” PD voltage at least when in Ohmic mode. Appeal Br. 9—10
(Argument section generally); Answer 15.
In view of the Appellant’s failure to rebut the Examiner’s finding that
Lo operates in the same way as taught by the Specification and Appellant’s
failure to offer any construction of the term “follows,” we are not persuaded
of error in the Examiner’s finding of anticipation.
Rejection 2. The Examiner rejected claim 19 as obvious over Lo in
view of Nakagawa. Final Act. 7—9 (claim 8 was withdrawn by Amendment
dated June 8, 2015). Appellant does not provide separate argument
regarding the rejection of claim 19 (which depends from claim 16).
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Application 13/905,260
Accordingly, the Examiner’s rejection of claim 19 is affirmed for the same
reasons as set forth above in regard to claims 9 and 16.
Rejection 3. The Examiner rejected claims 14 and 20 as obvious over
Lo in view of Frulio. Id. at 9-10. Appellant argues that the rejection is
overcome “for at least the same reasons as claims 9 and 16.” Appeal Br. 11.
Accordingly, the Examiner’s rejection of claims 14 and 20 is affirmed for
the same reasons as set forth above in regard to claims 9 and 16.
CONCLUSION
The rejection of claims 9, 10, 12, 13, 16, and 21 as anticipated is
affirmed. The rejections of claims 14, 19 and 20 as obvious are affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
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