Ex Parte ThomasDownload PDFBoard of Patent Appeals and InterferencesSep 5, 200309300757 (B.P.A.I. Sep. 5, 2003) Copy Citation The opinion in support of the decision being entered today was not written for publication and is not binding precedent of the Board. Paper No. 17 UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte THOMAS P. THOMAS ____________ Appeal No. 2002-0156 Application No. 09/300,757 ____________ ON BRIEF ____________ Before KRASS, BARRY, and SAADAT, Administrative Patent Judges. KRASS, Administrative Patent Judge. DECISION ON APPEAL This is a decision on appeal from the final rejection of claims 1-3. Rejections of claims 6-10 and 22-25 have been withdrawn by the examiner and are no longer on appeal before us. The invention is directed to a phase frequency detector and is best illustrated by reference to independent claim 1 reproduced as follows: Appeal No. 2002-0156 Application No. 09/300,757 Page 2 1. An integrated circuit comprising: a phase-frequency detector (PFD) including two clock input ports, an up signal port and a down signal port; said PFD comprising digital circuitry including transistors coupled in a configuration to adjust an amount of overlap of an up output signal pulse and a down output signal pulse based, at least in part, upon the magnitude of an amount of phase delay between two respective clock signal pulses applied to the two input ports. The examiner relies on the following reference: Noguchi 5,592,110 Jan. 7 1997 Claims 1-3 stand rejected under 35 U.S.C. §102 (e) as anticipated by Noguchi. Reference is made to the briefs and answer for the respective positions of appellant and the examiner. OPINION Appeal No. 2002-0156 Application No. 09/300,757 Page 3 The examiner indicates that Noguchi anticipates the instant claimed invention because Figures 1 and 2 of Noguchi show a phase comparator (100) used in a phase locked loop comprising two clock input ports for receiving clock signals (1 and 2) and two output ports for providing up and down signal pulses, the phase comparator comprising digital circuitry (figure 1 inherently includes transistors) coupled in a configuration to adjust the amount of overlap of up and down output signal pulses based, at least in part, upon the magnitude of an amount of phase delay between two respective clock signal pulses (figures 2A-2B, 2F-2G) where the overlapping portion of the up and down signals (figures 2F and 2G) varies accordingly to the phase differences of the two received clock signals (1 and 2) as called for in claim 1 (see answer-page 3). It is appellant’s view that the illustration in Figures 2F and 2G of Noguchi shows that the pulse width of the first output signal does not change regardless of the phase delay between the two applied signals, the input signal and the reference signal. Rather, according to appellant, Noguchi teaches the first and second output signal to rise and fall based on the input signal, inverted signal, or the narrow width pulse, referring to column 2, line 63 through column 3, line 5. Appellant points out that the second output signal in Noguchi has a greater pulse width than the first output signal and that if the phase delay between the input signal and the reference signal were Appeal No. 2002-0156 Application No. 09/300,757 Page 4 increased, the pulse width of the first output signal would not increase, but the pulse width of the second output signal would (principal brief-page 15). Appellant concludes that ...although the magnitude of the phase delay between the two signals may be increased, the amount of overlap between the first output signal and the second output signal would not increase (principal brief-pages 15-16, bold emphasis in the original). We find that the examiner has established a prima facie case of anticipation which has not been successfully rebutted by appellant’s argument. With regard to Noguchi, Figure 2A is a waveform representative of the input signal at terminal 1 in Figure 1; Figure 2B is a waveform representative of the reference signal at terminal 2 in Figure 1; Figure 2F is a waveform representative of a first output signal at (f) DOWN in Figure 1; and Figure 2G is a waveform representative of a second output signal at (g) UP in Figure 1. As seen in Figures 2F and 2G, the waveforms of the first and second output signals, or the UP and DOWN signal pulses, overlap different amounts. For example, starting from the left and moving toward the right, initially the pulse of the first output signal overlaps about 2/3 of the second output signal pulse, then both pulses are substantially equal, and, finally, the first output signal pulse overlaps the second output Appeal No. 2002-0156 Application No. 09/300,757 Page 5 signal pulse completely, being approximately twice the width of the second output signal pulse. Moreover, as we view these first and second output signal pulses with respect to the two clock signal pulses, input signal at Figure 2A and reference signal at Figure 2B, it appears clear that when the reference signal pulse lags behind the input signal pulse by a certain magnitude, we get the condition that the first output signal pulse overlaps the second output signal pulse by about 2/3 of the second output signal pulse width. When the reference signal pulse is in phase with the input signal pulse, the first and second output signal pulses also seem to exactly overlap each other. Finally, when the input signal pulse lags behind the reference signal pulse, then the first output signal pulse overlaps the second output signal pulse completely, approximately twice the width of the second output signal pulse. Clearly, then, the waveforms in Figures 2A, 2B, 2F and 2G of Noguchi show an adjustment of an amount of overlap of an up output signal pulse and a down signal pulse based, at least in part, upon the magnitude of an amount of phase delay between two respective clock signal pulses applied to the two input ports, as claimed. Appellant’s argument regarding the pulse width of the first output signal not changing regardless of the phase delay between the two applied signals is not persuasive because the argument is not based on claimed limitations. In accordance Appeal No. 2002-0156 Application No. 09/300,757 Page 6 with claim 1, it is not necessary that the pulse width of the first output signal (DOWN) change in response to the phase delay between the two applied signals. The claim only requires that the “amount of overlap” between the up and down signal pulses be adjusted based, at least in part, upon the magnitude of the phase delay between the two applied signals. As discussed supra, Noguchi clearly discloses the claimed relationship. Likewise, appellant’s argument that the first and second output signals of Noguchi have different pulse widths is not persuasive because the claim language says nothing about the actual pulse widths of these signals; it is concerned only with the “amount of overlap” of these signals and the adjustment of that overlap based, at least in part, upon the magnitude of the phase delay between the two applied signals. Since none of appellant’s arguments are persuasive of error in the examiner’s position, and claims 2 and 3 will stand or fall with claim 1, in accordance with the grouping of claims at page 6 of the principal brief, we will sustain the examiner’s rejection of claims 1-3 under 35 U.S.C. §102 (e). The examiner’s decision is affirmed. Appeal No. 2002-0156 Application No. 09/300,757 Page 7 No period for taking any subsequent action in connection with this appeal may be extended under 37 CFR § 1.136(a). AFFIRMED ERROL A. KRASS ) Administrative Patent Judge ) ) ) ) BOARD OF PATENT LANCE LEONARD BARRY ) APPEALS Administrative Patent Judge ) AND ) INTERFERENCES ) ) MAHSHID D. SAADAT ) Administrative Patent Judge ) EAK/yrt Appeal No. 2002-0156 Application No. 09/300,757 Page 8 Michael Nesheiwat, Esq. BLAKELY, SOKOLOFF, TAYLOR & ZAFMAN 12400 Wilshire Boulevard, Seventh Floor Los Angeles, CA 90025-1026 Tel: 408-720-8598 Copy with citationCopy as parenthetical citation