Ex Parte TeeneDownload PDFBoard of Patent Appeals and InterferencesSep 24, 200208650248 (B.P.A.I. Sep. 24, 2002) Copy Citation -1– The opinion in support of the decision being entered today was not written for publication in a law journal and is not binding precedent of the Board. Paper No. 24 UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES Ex parte ANDRES R. TEENE Appeal No. 2001-0632 Application No. 08/650,248 ON BRIEF Before THOMAS, KRASS and SAADAT, Administrative Patent Judges. KRASS, Administrative Patent Judge. DECISION ON APPEAL This is a decision on appeal from the final rejection of claims 1-12, all of the pending claims. The invention is directed to various embodiments for eliminating scan hold time failures of a scan chain. Representative independent claim 1 is reproduced as follows: 1. A method for eliminating scan hold time failures of a scan chain comprising the steps of: Appeal No. 2001-0632 Application No. 08/650,248 1A supplemental brief was filed on October 16, 2000, merely to comply with 37 CFR 1.192 (c)(1)(2) by listing the real party of interest and any related appeals. -2– distributing a clock signal; and ordering the scan chain according to the distribution of the clock signal. The examiner relies on the following references: Lim et al. [Lim] 5,481,209 Jan. 02, 1996 Meltzer 5,502,731 Mar. 26, 1996 Claims 1-12 stand rejected under 35 U.S.C. 103 as unpatentable over Lim in view of Meltzer. Reference is made to the briefs1 and answer for the respective positions of appellant and the examiner. OPINION The initial burden is on the examiner to establish a prima facie case of obviousness, when rejecting a claim under 35 U.S.C. 103. This is done by establishing the level of skill of the skilled artisan, determining the differences between the instant claimed subject matter and the prior art references and providing a convincing rationale as to why the instant claimed subject Appeal No. 2001-0632 Application No. 08/650,248 -3– matter as a whole would have been obvious to the artisan in view of the applied references. In the instant case, while the instant claimed subject matter appears rather broad in scope, the examiner has simply not established such a prima facie case of obviousness. Taking claim 1 as exemplary, the examiner has stated that Lim teaches a clock distribution with reduced clock skew but recognizes that Lim fails to disclose the ordering of a scan chain according to the distribution of the clock signal. The examiner turns to Meltzer for a teaching of shift register latches interconnected into scan chains, wherein the shift register latches are ordered in accordance with the amount of circuit outputs controlled. While this much appears to be true, the examiner then concludes that it would have been obvious to “modify the method of Lim that minimize clock skew, and reduces the length of clock signal tributaries to include SRL latches as taught by Meltzer in place of local buffers and ordering the latches according to the distribution of the clock signal†[answer-page 4]. The examiner has given absolutely no basis for substituting SRL latches in place of local buffers in Lim and then ordering the latches according to the distribution of the clock signal in Lim. Merely because Lim teaches a clock Appeal No. 2001-0632 Application No. 08/650,248 -4– distribution for reducing clock skew and Meltzer teaches ordering of SRLs in a scan chain, that is no reason to take only so much from each reference as needed for a particular claim and forcibly combine the two teachings to reach the instant claimed subject matter. There must be some suggestion in the prior art, or some reason for the artisan, to make the modification, other than what is taught by appellant. The examiner further explains that Lim provides motivation by teaching advantages that include reduction in delay between buffers and reduction in tributary length “which are highly advantageous to the scan based test design taught by Meltzer†and that Meltzer “expresses desirability to achieve maximum delay fault coverage while Lim’s invention provides reduced delay between buffers thus providing motivation...†[answer-pages 4-5]. We disagree. There is no suggestion in Lim that the invention described therein would have any utility in a scan based test design or in the ordering of scan chains. There is no suggestion that Lim’s distribution of a clock signal would have any utility in a scan chain of SRLs as taught by Meltzer. Accordingly, we cannot accept the examiner’s reasoning as a convincing rationale for making the combination in such a manner as to establish obviousness in accordance with 35 U.S.C. 103. Appeal No. 2001-0632 Application No. 08/650,248 -5– There are similar problems with the examiner’s rationale as applied to the other independent claims. Accordingly, we will not sustain the rejection of claims 1-12 under 35 U.S.C. 103. Our decision herein should not be taken as an affirmation of the patentability of the rather broad instant claimed subject matter, but, rather, only that the examiner has not made a proper rejection of the claimed subject matter under 35 U.S.C. 103. To deny a patent on the broadest instant claimed subject matter, the examiner would need to show no more than a disclosure or a suggestion in the prior art of merely ordering a scan chain according to, or, in some way, related to, the distribution of a clock signal. This the examiner has not done. Appeal No. 2001-0632 Application No. 08/650,248 -6– The examiner’s decision rejecting claims 1-12 under 35 U.S.C. 103 is reversed. REVERSED JAMES D. THOMAS ) Administrative Patent Judge ) ) ) ) ) ERROL A. KRASS ) BOARD OF PATENT Administrative Patent Judge ) APPEALS AND ) INTERFERENCES ) ) ) MAHSHID D. SAADAT ) Administrative Patent Judge ) Appeal No. 2001-0632 Application No. 08/650,248 -7– EK/RWK LSI LOGIC CORPORATION 1551 MCCARTHY BLVD. M/S: D-106 PATENT DEPARTMENT MILPITAS, CA 95035 Copy with citationCopy as parenthetical citation