Ex Parte Tasler

Patent Trial and Appeal Board

May 29, 2015

11467092 (P.T.A.B. May. 29, 2015)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/467,092 08/24/2006 Michael Tasler 0256.0002.NPUS01 3038
69995 7590 06/01/2015
The Meola Firm, PLLC
2500 Westchester Avenue, Suite 210
Purchase, NY 10577
EXAMINER
LEE, CHUN KUAN
ART UNIT PAPER NUMBER
2181
MAIL DATE DELIVERY MODE
06/01/2015 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte MICHAEL TASLER
___________

Appeal 2013-000397
Application 11/467,092
Technology Center 2100
____________

Before ELENI MANTIS MERCADER, CARL W. WHITEHEAD JR. and
BETH Z. SHAW, Administrative Patent Judges.

WHITEHEAD JR., Administrative Patent Judge.

DECISION ON APPEAL1

STATEMENT OF THE CASE
Appellant is appealing the final rejection of claims 239 and 333–376
under 35 U.S.C. § 134(a). Appeal Brief 5. We have jurisdiction under 35
U.S.C. § 6(b) (2012).
We reverse.
Introduction
“The present invention relates to the transfer of data and in particular
to interface devices for communication between a computer or host device
and a data transmit/receive device from which data is to be acquired or with
which two-way communication is to take place.” Specification [2].

1 An Oral Hearing was held on April 16, 2015.
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Application 11/467,092
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Representative Claim (disputed limitations emphasized)
239. An analog data generating and processing device
(ADGPD),
comprising:
an input/output (i/o) port;
a program memory;
a data storage memory;
a processor operatively interfaced with the i/o port, the
program memory and the ata [sic] storage memory;
wherein the processor is adapted to implement a data generation
process by which analog data is acquired from each respective
analog acquisition channel of a plurality of independent analog
acquisition channels, the analog data from each respective
channel is digitized, coupled into the processor, and is
processed by the processor, and the processed and digitized
analog data is stored in the data storage memory as at least one
file of digitized analog data;
wherein the processor also is adapted to be involved in
an automatic recognition process of a host computer in which,
when the i/o port is operatively interfaced with a multi-purpose
interface of the host computer, the processor executes at least
one instruction set stored in the
program memory and thereby causes at least one parameter
identifying the analog data generating and processing device,
independent of analog data source, as a digital storage device
instead of as an analog data generating and processing device
to be automatically' sent through the i/o port and to the multi-
purpose interface of the computer (a) without requiring any end
user to load any software onto the computer at any time and (b)
without requiring any end user to interact with the computer to
set up a file system in the ADGPD at any time;
wherein the at least one parameter provides information
to the computer about file transfer characteristics of the
ADGPD; and
wherein the processor is further adapted to be involved in
an automatic file transfer process in which, when the i/o port is
operatively interfaced with the multi-purpose interface of the
computer, and after the at least one parameter has been sent
from the i/o port to the multipurpose interface of the computer,
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Application 11/467,092
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the processor executes at least one other instruction set stored in
the program memory to thereby cause the at least one file of
digitized analog data acquired from at least one of the plurality
of analog acquisition channels to be transferred to the computer
using a device driver for the digital storage device while
causing the analog data generating and processing device to
appear to the computer as if it were the digital storage device
without
requiring any user-loaded file transfer enabling software
to be loaded on or installed in the computer at any time; [sic].

Rejections on Appeal
Claims 239, 333–339, 341–362, 364–367 and 369–376 stand rejected
as being unpatentable under 35 U.S.C. § 103(a) over Hashimoto (US Patent
Number 6,111,604; issued August 29, 2000), Smith, (US Patent Number
5,634,075; issued May 27, 1997), Ristelhueber (Robert Ristelhueber, Plug
and play is almost here, ELECTRONIC BUSINESS BUYER, vol. 29, no. 5, pg.
43, May 1994), and Shinohara (US Patent Number 5,742,934; issued April
21, 1998). Answer 6–33.
Claims 340 and 368 stand rejected as being unpatentable under 35
U.S.C. § 103(a) over Hashimoto, Smith, Ristelhueber, Shinohara and Endo
(US Patent Number 4,652,928; issued March 24, 1987). Answer 33–34.
Claim 363 stands rejected as being unpatentable under 35 U.S.C.
§ 103(a) over Hashimoto, Smith, Ristelhueber, Shinohara and Roberts (US
Patent Number 5,576,757; issued November 19, 1996). Answer 35.

ANALYSIS
Rather than reiterate the arguments of Appellant and the Examiner,
we refer to the Appeal Brief (filed May 7, 2012), the Answer (mailed July
25, 2012) and the Reply Brief (filed September 25, 2012) for the respective
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Application 11/467,092
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details. We have considered in this decision only those arguments Appellant
timely raised in the Briefs.
Appellants argue the Examiner failed to establish a prima facie case of
obviousness because the Ristelhueber reference is non-technical magazine
article that generally describes the coming of Plug and Play. Appeal Brief
22.
The Examiner finds:
Ristelhueber did conceive the idea for the need to allow “users
to simply insert a card or peripheral into a desktop system and
have it start running immediately, without a lot of fussing and
fuming” (on page 1) such as “reliving the end user of any need
to fumble with floppy disks and user manuals to get the device
up and running” (on page 2, 5th paragraph); therefore, the Plug
and Play protocol enable[s] the user to simply insert/install the
peripheral device into the desktop system and use the peripheral
device immediately without fumbling with floppy disks to
install the proper device driver.
Answer 57.
Appellants argue Ristelhueber does not provide an enabling disclosure
about how the peripheral components are attached and recognized in a Plug
and Play protocol. Appeal Brief 22–23. We find Appellant’s arguments
persuasive because we agree that Ristelhueber fails to discuss or even
mention device drivers or what consequently occurs once the peripheral
components are connected. See Appeal Brief 23. Ristelhueber discloses the
idea of a Plug and Play protocol but fails to disclose the technical knowledge
that would enable one of ordinary skill in the art to duplicate or modify the
Plug and Play protocol. Therefore, we reverse the Examiner’s obviousness
rejections of claims 239, and claims 333–376 for the same reasons.

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DECISION
The Examiner’s 35 U.S.C. § 103(a) rejections of claims 239 and 333-
376 are reversed.

REVERSED

ELD