Ex Parte Symes

Patent Trial and Appeal Board

Nov 2, 2016

13137126 (P.T.A.B. Nov. 2, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/137, 126 07 /21/2011
23117 7590 11/04/2016
NIXON & V ANDERHYE, PC
901 NORTH GLEBE ROAD, 11 TH FLOOR
ARLINGTON, VA 22203
FIRST NAMED INVENTOR
Dominic H Symes
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
SCS-550-1410 2022
EXAMINER
TRUONG, NGUYEN T
ART UNIT PAPER NUMBER
2486
NOTIFICATION DATE DELIVERY MODE
11/04/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
PTOMAIL@nixonvan.com
pair_nixon@firsttofile.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte DOMINIC H SYMES
Appeal2015-008211
Application 13/137,126
Technology Center 2400
Before ST. JOHN COURTENAY III, JENNIFER L. McKEOWN, and
SCOTT B. HOWARD, Administrative Patent Judges.
HOW ARD, Administrative Patent Judge.
DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1-33, which constitute all of the claims pending in this application.
We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.
1 Appellant identifies ARM Limited as the real party in interest. App. Br. 3.
We take Official Notice that Softbank Group Corp. acquired ARM Holdings
PLC in September 2016.
Appeal2015-008211
Application 13/137,126
THE INVENTION
The disclosed and claimed invention is directed to a video decoder
with a programmable inverse transform unit. Abstract; Spec. 1 :3-5.
Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. A data processing apparatus configured to perform video
decoding operations on blocks of video data, the data processing
apparatus comprising:
a programmable inverse transform unit configured to
perform an inverse transform operation on a set of input values
in response to a sequence of instructions,
said programmable inverse transform unit comprising a
first execution path and a second execution path arranged to
perform data operations to implement said inverse transform
operation, wherein said data operations performed by said first
and second execution path are configured in dependence on said
sequence of instructions,
wherein said programmable inverse transform unit is
configured to operate in a first mode in which each instn1ction in
said sequence of instructions is interpreted using a first
instruction length and to cause said first execution path and said
second execution path to be configured independently of each
other,
and said programmable inverse transform unit is
configured to operate in a second mode in which each instruction
in said sequence of instructions is interpreted using a second
instruction length, said second instruction length is shorter than
said first instruction length, and to cause said second execution
path to be configured in dependence on a configuration of said
first execution path.
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Appeal2015-008211
Application 13/137,126
REFERENCES
The prior art relied upon by the Examiner as evidence in rejecting the
claims on appeal is:
Nakagawa
Ku
Hsiun
us 5,737,256
US 2004/0024992 A 1
US 2006/02803 7 4 A 1
REJECTIONS
Apr. 7, 1998
Feb. 5,2004
Dec. 14, 2006
A. Claims 1, 6-17, 20, and 23-33 stand rejected under pre-AIA 35
U.S.C. § 102(b) as being anticipated by Hsiun. Final Act. 4--11.
B. Claims 2-5, 18, and 19 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Hsiun and Nakagawa. Final Act. 12-15.
C. Claims 21 and 22 stand rejected under pre-AIA 35 U.S.C.
§ 103(a) as being unpatentable over Hsiun and Ku. Final Act. 15-16.
ANALYSIS
We have reviewed the Examiner's rejection in light of Appellant's
arguments that the Examiner erred. In reaching this decision, we have
considered all evidence presented and all arguments made by Appellant. We
are persuaded by Appellant's arguments that the Examiner erred.
Appellant argues the Examiner erred in finding Hsiun teaches "a first
mode in which each instruction in said sequence of instructions is interpreted
using a first instruction length" and "a second mode in which each
instruction in said sequence of instructions is interpreted using a second
instruction length" where the "second instruction length is shorter than said
first instruction length" as recited in claim 1 :
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Appeal2015-008211
Application 13/137,126
Central to the Final Rejection is the unsupported
conclusion that an 8-point algorithm "implicitly has an
instruction length" and that "the 4-point algorithm 718 implicitly
has an instruction length (second instruction length) ... being
shorter than [the instruction length of the 8-point algorithm]."
(See page 5 of the Final Rejection). The algorithms in the Hsiun
reference may have different numbers of instructions, but there
is no disclosure in Hsiun that there is any variation in instruction
length. This is an important distinction and a key deficiency of
Hsiun as a reference.
The Examiner refers to [0056-60] in Hsiun. In the context
of Hsiun, a person of ordinary skill in the art (POSA) would
understand that data corresponds to operand values to be
manipulated and that instructions are not the same thing as data.
An 8x8 block and 4x4 block are different size input data
operands, but a POSA would certainly not view the 8x8 block
and 4x4 block as different length instructions. Nor does the
Examiner provide any evidence to support that the different size
data blocks in Hsiun are instructions. Having different modes of
operation that require different size input data blocks is not a
disclosure of different length instructions.
App. Br. 8; see also Reply Br. 2--4.
The Examiner finds Hsiun discloses a "second instruction length
[that] is shorter than said first instruction length." As recited in claim 1.
Final Act. 5 (citing Hsiun i-fi-1 56-60, Fig. 7). More particularly, the
Examiner finds that "the 4-point operations (instruction) requires less data
than the 8-point operations, therefore it has shorter instruction length." Id.;
see also Ans. 16 ("[T]he 4-point algorithm (instruction) requires less data
than the 8-point algorithm, therefore it has a shorter instruction length to be
executed by a processor in order to speed up the process in the speed-up
mode.").
We have reviewed the sections of Hsiun relied on by the Examiner
(Hsiun i-fi-156-60, Fig. 7) and determine that the Examiner's finding is not
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Appeal2015-008211
Application 13/137,126
supported by Hsiun for the reasons set forth by Appellant at Appeal Brief 8-
9 and Reply Br. 2--4. On this record, we find speculation would be required
to affirm the Examiner's findings. We decline to engage in speculation.
Because we agree with at least one of the dispositive arguments
advanced by Appellant, we need not reach the merits of Appellant's other
arguments.
Accordingly, we reverse the Examiner's rejection of claim 1, along
with the rejection of claims 32 and 33, which recite limitations
commensurate in scope to the disputed limitations discussed above, and
dependent claims 6-17, 20, and 23-31. Regarding the§ 103 rejections
(rejections Band C), the Examiner has not shown that either of the
secondary references (Nakagawa (rejection B) and Ku (rejection C))
overcomes the aforementioned deficiency of Hsiun. Therefore, we reverse
rejection B of dependent claims 2-5, 18, and 19 and rejection C of
dependent claims 21 and 22.
DECISION
For the above reasons, we reverse the Examiner's decision rejecting
claims 1, 6-17, 20, and 23-33 under§ 102.
For the above reasons, we reverse the Examiner's decisions rejecting
claims 2-5, 18, 19, 21, and 22 under§ 103.
REVERSED
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