Ex parte SERY

Board of Patent Appeals and Interferences

Mar 28, 2000

08087140 (B.P.A.I. Mar. 28, 2000)

1
Paper No. 31
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered today
(1) was not written for publication in a law journal and
(2) is not binding precedent of the Board.
UNITED STATES PATENT AND TRADEMARK OFFICE
_______________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
_______________
Ex parte GEORGE E. SERY
and JAN A. SMUDSKI
______________
Appeal No. 1996-1431
Application 08/087,140
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ON BRIEF
_______________
Before JERRY SMITH, FLEMING and RUGGIERO, Administrative Patent
Judges.
JERRY SMITH, Administrative Patent Judge.

DECISION ON APPEAL
This is a decision on the appeal under 35 U.S.C. § 134
from the examiner’s rejection of claims 76-94, which constitute
all the claims remaining in the application.
The disclosed invention pertains to the manufacture of
circuits which include memory cells and peripheral transistors.
Typically, the gate oxide of the memory cells is formed at a
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Application 08/087,140
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different time from the gate oxide of the peripheral transistors.
The disclosed invention provides a circuit in which the gate
oxide thicknesses of the memory cells, the peripheral transistors
and additional high voltage transistors are all made different
from each other.
Representative claim 76 is reproduced as follows:
76. A memory circuit comprising:
a) a high voltage transistor, said high voltage transistor
comprising:
a first set of first and second spaced-apart regions
formed in a silicon substrate, said first set of first and
second spaced-apart regions substantially forming a first
channel in said substrate therebetween;
a first gate insulator comprising a first oxide layer,
said first gate insulator disposed on said first channel;
a high voltage transistor control gate disposed on said
first gate insulator;
b) a peripheral transistor comprising:
a second set of first and second spaced-apart regions
formed in said silicon substrate, said second set of first
and second spaced-apart regions substantially forming a
second channel therebetween;
a second gate insulator comprising a second oxide
layer, said second oxide layer being a different layer from said
first oxide layer and having a different thickness than said
first oxide layer, said second gate insulator disposed on
said second channel;
a peripheral transistor control gate disposed on said
second gate insulator; and
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Application 08/087,140
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c) a floating gate memory device comprising:
a third set of first and second spaced apart regions
formed in said silicon substrate, said third set of
first and second spaced-apart regions substantially forming
a third channel therebetween;
a third gate insulator disposed on said third channel;
a floating gate;
an intergate insulator disposed on said floating gate;
and,
a memory device control gate disposed on said intergate
insulator.
The examiner relies on the following references:
Oshima 5,034,798 July 23, 1991
Arakawa 5,291,043 Mar. 01, 1994
(filed Nov. 14, 1990)
Claims 76-94 stand rejected under 35 U.S.C. § 103. As
evidence of obviousness the examiner offers Oshima in view of
Arakawa.
Rather than repeat the arguments of appellants or the
examiner, we make reference to the brief and the answer for the
respective details thereof.
OPINION
We have carefully considered the subject matter on
appeal, the rejection advanced by the examiner and the evidence
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Application 08/087,140
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of obviousness relied upon by the examiner as support for the
rejection. We have, likewise, reviewed and taken into
consideration, in reaching our decision, the appellants’
arguments set forth in the brief along with the examiner’s
rationale in support of the rejection and arguments in rebuttal
set forth in the examiner’s answer.
It is our view, after consideration of the record before
us, that the evidence relied upon and the analysis provided by
the examiner would not have suggested to one of ordinary skill in
the art the obviousness of the invention as set forth in claims
76-94. Accordingly, we reverse.
Appellants have indicated that for purposes of this
appeal the claims will stand or fall together in the following
two groups: Group I has claims 76-84, and Group II has claims 85-
94 [brief, page 8]. Consistent with this indication appellants
have made no separate arguments with respect to any of the claims
within each group. Accordingly, all the claims within each group
will stand or fall together. Note In re King, 801 F.2d 1324,
1325, 231 USPQ 136, 137 (Fed. Cir. 1986); In re Sernaker, 702
F.2d 989, 991, 217 USPQ 1, 3 (Fed. Cir. 1983). Therefore, we
will only consider the rejection against claims 76 and 85 as
representative of all the claims on appeal.
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In rejecting claims under 35 U.S.C. § 103, it is
incumbent upon the examiner to establish a factual basis to
support the legal conclusion of obviousness. See In re Fine, 837
F.2d 1071, 1073, 5 USPQ2d 1596, 1598 (Fed. Cir. 1988). In so
doing, the examiner is expected to make the factual
determinations set forth in Graham v. John Deere Co., 383 U.S. 1,
17, 148 USPQ 459, 467 (1966), and to provide a reason why one
having ordinary skill in the pertinent art would have been led to
modify the prior art or to combine prior art references to arrive
at the claimed invention. Such reason must stem from some
teaching, suggestion or implication in the prior art as a whole
or knowledge generally available to one having ordinary skill in
the art. Uniroyal, Inc. v. Rudkin-Wiley Corp., 837 F.2d 1044,
1051, 5 USPQ2d 1434, 1438 (Fed. Cir.), cert. denied, 488 U.S. 825
(1988); Ashland Oil, Inc. v. Delta Resins & Refractories, Inc.,
776 F.2d 281, 293, 227 USPQ 657, 664 (Fed. Cir. 1985), cert.
denied, 475 U.S. 1017 (1986); ACS Hosp. Sys., Inc. v. Montefiore
Hosp.,
732 F.2d 1572, 1577, 221 USPQ 929, 933 (Fed. Cir. 1984). These
showings by the examiner are an essential part of complying with
the burden of presenting a prima facie case of obviousness. Note
In re Oetiker, 977 F.2d 1443, 1445, 24 USPQ2d 1443, 1444 (Fed.
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Cir. 1992). If that burden is met, the burden then shifts to the
applicant to overcome the prima facie case with argument and/or
evidence. Obviousness is then determined on the basis of the
evidence as a whole and the relative persuasiveness of the
arguments. See Id.;
In re Hedges, 783 F.2d 1038, 1039, 228 USPQ 685, 686 (Fed. Cir.
1986); In re Piasecki, 745 F.2d 1468, 1472, 223 USPQ 785, 788
(Fed. Cir. 1984); and In re Rinehart, 531 F.2d 1048, 1052, 189
USPQ 143, 147 (CCPA 1976). Only those arguments actually made by
appellants have been considered in this decision. Arguments
which appellants could have made but chose not to make in the
brief have not been considered [see 37 CFR § 1.192(a)].
With respect to representative, independent claim 76, the
examiner points to Oshima as teaching the integration of a memory
cell and a peripheral transistor in which the gate oxide of each
device is different. Oshima discloses nothing about additional
high voltage elements being integrated with the above-noted
components. The examiner cites Arakawa as teaching that high
voltage transistors are conventionally integrated with memory
cells. Since Oshima teaches a difference between the gate oxides
of the memory cells and the peripheral transistors, the examiner
concludes that the obvious addition of a high voltage transistor
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Application 08/087,140
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to the Oshima memory circuit would have resulted in the claimed
invention [answer, pages 3-4].
Appellants argue that the combination of Oshima and
Arakawa does not teach or suggest that the gate oxide layer of a
peripheral transistor should be different from the gate oxide
layer of a high voltage transistor as recited in claim 76 [brief,
pages 9-10]. We agree with appellants.
The examiner’s position that each device on the
peripheral region of a memory circuit would be constructed
separately and have a different gate oxide layer than the other
devices on the peripheral region is based on pure speculation.
Oshima teaches a different oxide layer for only the memory cell
and a peripheral transistor. Arakawa offers no suggestion with
respect to the oxide layers of any of the components disclosed
therein. The only suggestion to make the oxide layer of a
peripheral transistor different from the oxide layer of a high
voltage transistor comes from appellants’ own disclosure.
The mere fact that the prior art may be modified in the
manner suggested by the examiner does not make the modification
obvious unless the prior art suggested the desirability of the
modification. In re Fritch, 972 F.2d 1260, 1266, 23 USPQ2d 1780,
1783-84 (Fed. Cir. 1992); In re Gordon, 733 F.2d 900, 902, 221
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Application 08/087,140
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USPQ 1125, 1127 (Fed. Cir. 1984). The examiner has not pointed
to any teachings within the applied prior art which supports the
three different oxide layers as recited in claim 76. Therefore,
we do not sustain the rejection of claims 76-84.
With respect to representative, dependent claim 85, since
this claim depends from claim 76 as discussed above, the examiner
clearly has failed to demonstrate the obviousness of such
dependent claims. We also note that the examiner has completely
failed to address the limitations of claim 85 or to respond to
appellants’ arguments that the examiner has ignored the
limitations of this claim. The examiner’s failure to address on
this record the specific limitations of claims 85-94 constitutes
a complete failure to establish a prima facie case of the
obviousness of these claims. Therefore, we also do not sustain
the rejection of claims 85-94.
In summary, we have not sustained the examiner’s
rejection of claims 76-94. Therefore, the decision of the
examiner rejecting claims 76-94 is reversed.
REVERSED
Appeal No. 1996-1431
Application 08/087,140
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Jerry Smith )
Administrative Patent Judge )
)
)
)
Michael R. Fleming ) BOARD OF PATENT
Administrative Patent Judge ) APPEALS AND
) INTERFERENCES
)
)
Joseph F. Ruggiero )
Administrative Patent Judge )
JS/cam
Appeal No. 1996-1431
Application 08/087,140
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