Ex Parte Serghi et al

Patent Trial and Appeal Board

Nov 15, 2017

11274302 (P.T.A.B. Nov. 15, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/274,302 11/16/2005 Laura Mihaela Serghi ALC 3209 5385
76614 7590
Terry W. Kramer, Esq.
Kramer & Amado, P.C.
330 John Carlyle Street
3rd Floor
Alexandria, VA 22314
EXAMINER
MILLS, PAUL V
ART UNIT PAPER NUMBER
2196
NOTIFICATION DATE DELIVERY MODE
11/17/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
mail@krameramado.com
ipsnarocp @ nokia. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte LAURA MIHAELA SERGHI, BRIAN MCBRIDE,
DAVID JAMES WILSON and GORDON HANES
Appeal 2015-006396
Application 11/274,302
Technology Center 2100
Before THU A. DANG, CARL W. WHITEHEAD JR and
JEFFREY S. SMITH, Administrative Patent Judges.
WHITEHEAD JR., Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Appellants are appealing the Final Rejection of claims 1—14, 16, 19,
and 20 under 35 U.S.C. § 134(a). Appeal Brief 4—10. We have jurisdiction
under 35 U.S.C. § 6(b) (2012).
We affirm.
Introduction
The invention is directed to “a small, kernel-based, operating system
for performing parallel processing of fundamental functions in multi­
processors.” Specification, paragraph 1.
Appeal 2015-006396
Application 11/274,302
Illustrative Claim (disputed limitations emphasized)
1. A processing system comprising:
an array of microprocessors on an integrated circuit, each of said
microprocessors having a kernel-based operating system, the kernel-based
operating system performing fundamental functions;
a memory, in each microprocessor of the array, configured to identify,
through messaging to at least one peer processor, a task completion time for
a processing task, wherein the at least one peer processor is configured to
continue the processing task and accept a stack for current data; and
an interface, in each microprocessor of the array, configured to listen
for messages from the at least one peer processor that identify a next task
and load a new application code by requesting a code block from a library.
Rejections on Appeal1
Claims 1, 6, 12, 13, 16, 19, and 20 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Hinsley (U.S. Patent 6,078,945; issued
June 20, 2000), Efe {Minimizing Control Overheads in Adaptive Load
Sharing 307—315 (1989)), and Rogers {Supporting Dynamic Data Structures
1 In the Advisory Action mailed January 29, 2015, the Examiner
acknowledges the cancellation of claim 15 by Appellants in the 37 C.F.R.
§ 1.116 Amendment filed January 2, 2015. Also in response to the
37 C.F.R. § 1.116 Amendment, the Examiner withdrew the 35 U.S.C. § 112
rejection of claims 1 and 16. Further, the Examiner modified the 35 U.S.C.
§ 103 rejections of claims 1—14, 16, 19, and 20 by replacing Zhang
{Dynamic and Static Load Scheduling Performance on a NUMA Shared
Memory Multiprocessor, 128—135 (1991)) with Rogers (Supporting
Dynamic Data Distributed-Memory Machines). This modification
supersedes the previous 35 U.S.C. § 103 rejection of claims 1—14, 16, 19,
and 20 originally found in the Final Rejection mailed November 20, 2014.
2
Appeal 2015-006396
Application 11/274,302
on Distributed-Memory Machines, 17 ACM Transactions on Programming
Languages and Systems 233—263 (1995)). Advisory Action 2—5.
Claims 2, 4, 5, and 7—11 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Hinsley, Efe, Rogers, and Zuberi (EMERALDS: A
Small-Memory Real-Time Microkernel, 27 IEEE Transactions on Software
Engineering 909—928 (2001)). Advisory Action 5—6.
Claim 3 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Hinsley, Efe, Rogers, and Engler (Exokernel: An
Operating System Architecture for Application-Level Resource
Management, 251—266 (1995)). Advisory Action 6—7.
Claim 14 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Hinsley, Efe, Rogers, Zuberi, and Ward (Medical
Applications in the TANDEM-16 Multiple Computer System Environment, 3
J. Medical Systems 7—18 (1979)). Advisory Action 7—8.
ANALYSIS
Rather than reiterate the arguments of Appellants and the Examiner,
we refer to the Appeal Brief (filed February 19, 2015), the Reply Brief (June
18, 2015), the Answer (mailed June 3, 2015), the Advisory Action (mailed
January 29, 2015) and the Final Rejection (mailed November 20, 2014) for
the respective details.
35 U.S.C. $ 103 Rejection
Appellants argue the obviousness rejection of independent claims 1
and 16 is erroneous because Efe fails to address the deficiency of Hinsley.
Appeal Brief 5. Both claims 1 and 16 recite the limitation “a task
3
Appeal 2015-006396
Application 11/274,302
completion time for a processing task.” Appellants argue that Efe does not
disclose the claimed task completion time as the Examiner finds:
Instead, Efe recomputes k whenever n, “changes due to
increments or decrements.” Instead of being equivalent to the
claimed task completion time. Appellant respectfully submits
that k is actually “multiples of a threshold value
mathematically defined by Efe as a rounded number based upon
m divided by *. Efe’s example lists k as 3 when m is 9 and * is 4.
Thus, 9/4 has been rounded up to 3. Accordingly, k is not a task
completion time.
Appeal Brief 5; see Efe section 2, paragraphs 1 and 2.
However, the Examiner finds, and we agree, “Hinsley does not
describe that the load information represents the number of tasks or that it is
propagated when tasks finish, and accordingly does not specifically disclose
the processors identify, through messaging to at least one peer processor, a
task completion time for a processing task.” Advisory Action 3. The
Examiner relies upon Efe to address Hinsley’s deficiency:
Efe, however, discloses a sender-initiated load balancing scheme
wherein servers/nodes/processors (terms used interchangeably in
Efe) exchange load information which is tracked in respective
load tables, analogous to Hinsley’s load balancing, and wherein
nodes identify, through messaging to at least one peer processor
(i.e. server/node/processor), a task completion time (i.e. task has
finished execution) for a processing task. . . .
“When a task is admitted to the service queue at a node i, the
node increments its value of m. Similarly, n, is decremented
when a task finishes execution. Whenever m changes due to
increments or decrements, the value of k is recomputed. If the
new value of k is different from the old value, then the new value
is broadcast to all other servers”
Advisory Action 3 (citing Efe, section 2, paragraphs 1 and 2).
4
Appeal 2015-006396
Application 11/274,302
Although Appellants indicate that support for the task completion
time for a processing task limitation is found in paragraph 23 of the
Specification (See Appeal Brief 2), the Examiner finds the Specification
does not employ the “completion time” terminology nor does the
Specification define the terminology in a manner that distinguishes it from
the Efe’s decrementing the number of tasks when a task finishes execution.
Answer 3.
Here, we find the Examiner’s interpretation of claims 1 and 16 “task
completion time for a processing task” limitations to be reasonable in light
of the Specification.2 On this record, we sustain the Examiner’s obviousness
rejection of independent claims 1 and 16, as well as, the obviousness
rejections of dependent claims 2—14, 19, and 20 not separately argued. See
Appeal Brief 7—10.
DECISION
The Examiner’s obviousness rejections of claims 1—14, 16, 19, and 20
are affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1). See 37 C.F.R.
§ 1.136(a)(l)(v).
AFFIRMED
2 During examination of a patent application, a claim is given its
broadest reasonable construction “in light of the specification as it would be
interpreted by one of ordinary skill in the art.” In re Am. Acad, of Sci. Tech.
Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004) (citations omitted) (internal
quotation marks omitted). “[T]he words of a claim ‘are generally given their
ordinary and customary meaning.’” Phillips v. AWH Corp., 415 F.3d 1303,
1312 (Fed. Cir. 2005) (enbanc) (internal citations omitted).
5