Ex Parte Samadi et al

Patent Trial and Appeal Board

Aug 27, 2018

13753193 (P.T.A.B. Aug. 27, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/753, 193 01/29/2013
115309 7590 08/29/2018
W &T/Qualcomm
106 Pinedale Springs Way
Cary, NC 27511
FIRST NAMED INVENTOR
Kambiz Samadi
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
123093/1173-518 5274
EXAMINER
ZARNEKE, DAVID A
ART UNIT PAPER NUMBER
2891
NOTIFICATION DATE DELIVERY MODE
08/29/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patents@wt-ip.com
us-docketing@qualcomm.com
ocpat_uspto@qualcomm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte KAMBIZ SAMAD I, SHREEP AD A. P ANTH,
YANG DU, and ROBERT P. GILMORE
Appeal 2018-001394
Application 13/753,193
Technology Center 2800
Before BEYERL YA. FRANKLIN, N. WHITNEY WILSON, and
CHRISTOPHER C. KENNEDY, Administrative Patent Judges.
WILSON, Administrative Patent Judge.
DECISION ON APPEAL
Pursuant to 35 U.S.C. § 134(a), Appellants 1 appeal from the
Examiner's November 14, 2016 decision finally rejecting claims 1, 3, 5-7,
10, 11, 16, 18-20, 24, 26, 27, and 34--3 6. We have jurisdiction over the
appeal under 35 U.S.C. § 6(b ).
We reverse.
1 Appellants identify the real party in interest as QUALCOMM Incorporated
(Appeal Br. 3).
Appeal 2018-001394
Application 13/753,193
CLAIMED SUBJECT MATTER
Appellants' invention is directed generally to hard macros, which are
said to be functional circuit elements that may be used by chip fabricators to
create an application specific integrated circuit (ASIC) or a field
programmable gate array (FPGA) (Spec. ,r 3). The disclosure describes a
hard macro which includes a periphery defining a hard macro area and
having a top and a bottom and a hard macro thickness from the top to the
bottom (Abstract). The hard macro includes a plurality of vias extending
through the hard macro thickness from the top to the bottom (id.). The
Specification discloses an integrated circuit having a top layer, a bottom
layer and at least one middle layer, the top layer including a top layer
conductive trace, the middle layer including a hard macro and the bottom
layer including a bottom layer conductive trace, wherein the top layer
conductive trace is connected to the bottom layer conductive trace by a via
extending through the hard macro (id.).
Details of the claimed invention are set forth in representative claim 1,
which is reproduced below from the Claims Appendix of the Brief
(emphasis added):
1. A hard macro having a periphery defining a hard macro area
and having a top and a bottom and a hard macro thickness from
the top to the bottom, the hard macro including a plurality of
vias extending through the hard macro from the top to the
bottom and including an array of blockage sites extending
through the hard macro, wherein the plurality of vias are
formed in at least some of the array of blockage sites and
wherein at least one via is configured to connect a first element
to a second element, the first element in a first layer different
from a layer that includes the hard macro, the first element
positioned in a first direction from a line that passes through the
at least one via, the second element in a second layer different
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Appeal 2018-001394
Application 13/753,193
from the layer that includes the hard macro, the second element
positioned in a second direction from the line that passes
through the at least one via, and wherein, between the top and
the bottom of the hard macro, the line is entirely contained
within the hard macro.
REJECTIONS
1. Claims 1, 3, 5-7, 10-11, 16, 18-20, 24, 26, 27, 34--36 are
rejected under 35 U.S.C. § I03(a) as unpatentable over Bednar2 in view
of Applicant's Admitted Prior Art (AAP A).
2. Claims 16, 18, 19, and 20 are rejected under 35 U.S.C.
§I03(a) as unpatentable over AAPA in view of Bednar.
DISCUSSION
Appellants' arguments are solely directed to limitations recited in
independent claim 1 (see generally Appeal Br. 8-13; Reply Br. 2-3).
Accordingly, our discussion will focus on Rejection (1) of claim 1 over
Bednar in view of AAPA. 37 C.F.R. § 4I.37(c)(l)(iv) (2013).
The Examiner finds that Bednar's wirings 118 correspond to the
claimed vias (Final Act. 3). The Examiner finds that even though those
wirings run from side to side, rather than vertically from the top to the
bottom, the terms "top" and "bottom" are relative terms which don't
patentably distinguish the claimed subject matter from Bednar, particularly
because "merely rotating the structure of Bednar would meet the limitation
of [the vias running] 'from the top to the bottom"' of the hard macro (Ans.
2).
2 Bednar et al., US 6,543,040 Bl, issued April 1, 2003.
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Application 13/753,193
Appellants argue that the term "via" is an abbreviation for "Vertical
Interconnect Access," and therefore necessarily means a vertical orientation
(Appeal Br. 8). Appellants further argue that the term "via," as used in the
claims, means a route to connect different layers (id.). Appellants argue that
Bednar's wirings 118 are directed through a single layer (i.e. in a horizontal
direction) and, therefore, are not "vias" running from the top to the bottom
of the macro as set forth in the claims.
Appellants' arguments are persuasive. It is well established that "the
PTO must give claims their broadest reasonable construction consistent with
the specification ... Therefore, we look to the specification to see if it
provides a definition for claim terms, but otherwise apply a broad
interpretation." In re ICON Health & Fitness, Inc., 496 F.3d 1374, 1379
(Fed. Cir. 2007). In this instance, the Specification and claim language are
consistent with Appellants' arguments that the term "via" means a route
which connects different layers. Specifically, the Specification indicates that
"[ t ]he top layer conductive trace is connected to the bottom layer conductive
trace by a via extending through the hard macro" and that an integrated
circuit created according to the disclosure has top, middle, and bottom
layers, and that the top and bottom layers are connected through a via
extending through the hard macro (Spec. ,r,r 12, 13). Similarly, each of
Figures 2--4 and 7 shows or describes a multilayer arrangement where the
via connects the different layers.
Thus, we conclude that the broadest reasonable interpretation of the
term "via" as used in the claims, is a passageway for vertical electrical
interconnection between different layers.
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Appeal 2018-001394
Application 13/753,193
With that interpretation in mind, we agree with Appellants that even if
Bednar's device were rotated so that the wirings 118 were vertically
oriented, they would still not correspond to the claimed vias, because they
do not connect different layers.
The Examiner has the initial burden of establishing a prima facie case
of obviousness based on an inherent or explicit disclosure of the claimed
subject matter under 35 U.S.C. § 103. In re Oetiker, 977 F.2d 1443, 1445
(Fed. Cir. 1992) ("[T]he [E]xaminer bears the initial burden, on review of
the prior art or on any other ground, of presenting a prima facie case of
unpatentability."). To establish a prima facie case of obviousness, the
Examiner must show that each and every limitation of the claim is described
or suggested by the prior art or would have been obvious based on the
knowledge of those of ordinary skill in the art. In re Fine, 837 F.2d 1071,
1074 (Fed. Cir. 1988). In this instance, the evidence of record does not
adequately establish that the cited art would have made obvious the
limitation that vias extend through the hard macro from the top to the bottom
of the macro. Accordingly, we reverse the rejection of claim 1. As each of
the independent claims contains similar limitations, we reverse the rejections
of those claims, as well as the dependent claims, as well.
CONCLUSION
We REVERSE the rejection of claims 1, 3, 5-7, 10-11, 16, 18-
20, 24, 26, 27, 34--36 under 35 U.S.C. § 103(a) as unpatentable over
Bednar in view of Applicant's Admitted Prior Art (AAP A).
We REVERSE the rejection of claims 16, 18, 19, and 20 under
35 U.S.C. §103(a) as unpatentable over AAPA in view of Bednar.
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Appeal 2018-001394
Application 13/753,193
REVERSED
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