Ex Parte Saloio

Board of Patent Appeals and Interferences

May 27, 2009

10397396 (B.P.A.I. May. 27, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte JAMES SALOIO
____________________

Appeal 2009-0797
Application 10/397,3961
Technology Center 2800
____________________

Decided:2 May 27, 2009
____________________

Before KENNETH W. HAIRSTON, MAHSHID D. SAADAT,
and MARC S. HOFF, Administrative Patent Judges.

HOFF, Administrative Patent Judge.

DECISION ON APPEAL

1 The real party in interest is Hamilton Sundstrand Corporation.
2 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, begins to run from the decided date
shown on this page of the decision. The time period does not run from the
Mail Date (paper delivery) or Notification Date (electronic delivery).

Appeal 2009-0797
Application 10/397,396

2
STATEMENT OF CASE
Appellant appeals under 35 U.S.C. § 134 from a Final Rejection of
claims 1 and 3-17.3 We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
The present invention is directed to a sensing system that includes a
fault detection circuit for detecting an open and/or short circuit fault at a
sensor input, wherein the fault detection circuit includes the sensor in its
feedback path. The sensor has two input paths, one carrying the sensor
signal itself and the other carrying current from the fault detection circuit.
The fault detection circuit includes a current source that maintains a nominal
bias current through the sensor. The bias current is driven by an offset
voltage and travels along a closed loop formed by the sensor and is
maintained at a predetermined level established by the closed loop system
and the bias current. If an open or short input condition occurs at the sensor
input, the offset voltage will rise to maintain the level of the bias current.
When the offset voltage increases above a selected tripping threshold, a fault
signal is output to a processor, indicating the occurrence of the fault. (Spec.
paras. [11-19]).
Claim 1 is exemplary:
1. A sensing system, comprising:
a sensor that generates a sensor output, wherein the sensor has a least
one output lead; and
a fault detection circuit connected to the output lead, wherein the fault
detection circuit includes a current source that sends a bias current to the
sensor to detect the occurrence of a fault condition, wherein the current

3 Claim 2 has been cancelled.
Appeal 2009-0797
Application 10/397,396

3
source is driven by an offset voltage that maintains the bias current at a
predetermined level, and wherein the fault detection circuit further
comprises a fault comparator that monitors the offset voltage to detect the
occurrence of the fault condition.
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Kashimura US 4,425,891 Jan. 17, 1984
Blossfeld US 6,424,143 B1 Jul. 23, 2002
Sampson US 6,664,793 B1 Dec. 16, 2003
Tucker US 6,794,880 B2 Sep. 21, 2004

Claims 1, 3, 4, 6, 12, 13, 15, and 17 stand rejected under 35 U.S.C.
§ 102(b) as being anticipated by Kashimura.
Claims 5, 14, and 16 stand rejected under 35 USC § 103(a) as being
obvious over Kashimura in view of Tucker.
Claims 7-10 stand rejected under 35 USC § 103(a) as being obvious
over Kashimura in view of Blossfeld.
Claim 11 stands rejected under 35 USC § 103(a) as being obvious
over Kashimura in view of Blossfeld and further in view of Sampson.
Rather than repeat the arguments of Appellant or the Examiner, we
make reference to the Appeal Brief (filed Jun. 21, 2007) and the Examiner’s
Answer (mailed Nov. 15, 2007) for their respective details.

ISSUES
Regarding representative claim 1, the Examiner finds that Kashimura
discloses a sensing system comprising a sensor and a fault detection circuit
connected to the sensor, wherein the fault detection circuit includes a current
source that sends a bias current to the sensor to detect the occurrence of a
Appeal 2009-0797
Application 10/397,396

4
fault condition and wherein the current source is driven by an offset voltage
that maintains the bias current at a predetermined level (Ans. 7).
Appellant argues that Kashimura does not teach maintaining the bias
current at a predetermined level as required by claim 1 (App. Br. 7- 9).
Further, Appellant contests the Examiner’s asserted motivation for
combining Blossfeld, Sampson and Tucker with Kashimura to include
differential amplifiers to convert the fault sensor output from a sign-wave to
a square wave. Moreover, Appellant argues that the combination of
Blossfeld, Sampson and Tucker with Kashimura would not yield a sensing
system that includes differential amplifiers having high input impedance
(App. Br. 10-11).
Appellant’s contentions present us with the following four issues:
1. Did Appellant show that the Examiner erred in finding that
Kashimura teaches a sensing system, comprising a sensor coupled to a fault
detection circuit, wherein the fault detection circuit includes a current source
that sends a bias current to the sensor to detect the occurrence of a fault
condition, and wherein the current source is driven by an offset voltage that
maintains the bias current at a predetermined level?
2. Did Appellant show that the Examiner erred in finding that
Kashimura teaches a sensing system, wherein a fault condition limits flow of
the bias current through the sensor and causes the offset voltage to rise to
maintain the bias current?
3. Did Appellant show that the Examiner erred in finding that
Kashimura in combination with Blossfeld teaches a sensing interface that
includes an output terminal for outside connection, a differential amplifier
for converting the input signals to a single-ended sine signal, and a
Appeal 2009-0797
Application 10/397,396

5
comparator circuit coupled to the differential amplifier that converts the sine
signal to a square wave?
4. Did Appellant show that the Examiner erred in finding that
Kashimura in combination with Blossfeld and Sampson teaches a sensing
system that includes a sensor interface comprising a differential amplifier
having a high input resistance?

FINDINGS OF FACT
The following Findings of Fact (FF) are shown by a preponderance of
the evidence.
The Invention
1. According to Appellant, the invention concerns a sensing
system that includes a fault detection circuit for detecting an open and/or
short circuit fault at a sensor input (Spec. para. [11]).
2. The sensor, having two leads, couples to a fault detection
circuit having a current source that maintains a nominal bias current through
the sensor (Spec. para. [12]).
3. The sensor signal is received by a sensor interface that includes
a differential amplifier, having a high input resistance, to convert the sine
wave into a single-ended signal (Spec. paras. [12 and 13]). The sensor
interface further includes a comparator that converts the single-ended signal
into a logic square wave (Spec. para. [12]). The sensor interface is generally
included in the known sensing systems (Spec. para. [2]).
4. The bias current is driven by an offset voltage and travels along
a closed loop formed by the sensor and the fault detection circuit (Spec.
paras. [15 and 16]). The bias current is maintained at a predetermined level
Appeal 2009-0797
Application 10/397,396

6
established by the closed loop system (Spec. para. [15]). If an open or short
input condition occurs at the sensor input, the offset voltage will rise to
maintain the level of the bias current (Spec. para. [16]). When the offset
voltage increases above a selected tripping threshold, a fault signal is
generated by the fault detection circuit and output to a processor (Spec. para.
[17]).
Kashimura
5. Kashimura teaches sensing systems comprising a sensor 100
connected to a fault detection circuit 102 having a constant current circuit
107 for providing a d.c. bias current to the sensor (Fig. 1 and 3; col. 2, l. 65-
col. 3, l. 1; col. 3, ll. 13-15, ll. 56-61).
6. Kashimura teaches that fault detection circuit 102 includes a
constant current source 107, having high input impedance, that sends a bias
current to the sensor for detecting the fault of the sensor (col. 6, ll. 11-16;
col. 3, ll. 13-15). The fault detection circuit 102 further includes a sensor
short circuit detector 108 and a sensor open circuit detector 109 for
respectively detecting a short or an open circuit condition of at least one
output lead of the sensor (Fig. 1 and 3; col. 4, ll. 21-24).
7. Kashimura teaches an offset voltage at point a of the fault
detection circuit 102 that maintains the bias current at a predetermined level
to detect the occurrence of the fault condition by setting the fault signal at a
predetermined level if the offset voltage exceeds a tripping threshold (Fig. 3;
col. 6, ll. 11-16; col. 8, ll. 28-55).
Blossfeld
8. Blossfeld teaches a magnetic field sensor connected to a
measuring amplifier that converts the sensor signal into a single-ended
Appeal 2009-0797
Application 10/397,396

7
signal. A Schmitt trigger connects to the measuring amplifier for converting
the sinusoidal signal into a square wave (col. 4, ll. 1-9).
Sampson
9. Sampson teaches a differential amplifier having high input
resistance to minimize external current flows (col. 4, ll. 22-24).
Tucker
10. Tucker teaches a low-pass filter that filters out transient noise
spikes (col. 2, ll. 61-64).

PRINCIPLES OF LAW
Anticipation pursuant to 35 U.S.C § 102 is established when a single
prior art reference discloses expressly or under the principles of inherency
each and every limitation of the claimed invention. Atlas Powder Co. v.
IRECO, Inc., 190 F.3d 1342, 1347 (Fed. Cir. 1999); In re Paulsen, 30 F.3d
1475, 1478-79 (Fed. Cir. 1994).
Analysis of whether a claim is patentable over the prior art under 35
U.S.C. § 102 begins with a determination of the scope of the claim. We
determine the scope of the claims in patent applications not solely on the
basis of the claim language, but upon giving claims their broadest reasonable
construction in light of the specification as it would be interpreted by one of
ordinary skill in the art. In re Am. Acad. of Sci. Tech. Ctr., 367 F.3d 1359,
1364 (Fed. Cir. 2004). The properly interpreted claim must then be
compared with the prior art.
In an appeal from a rejection for anticipation, the Appellant must
explain which limitations are not found in the reference. See Gechter v.
Davidson, 116 F.3d 1454, 1460 (Fed. Cir. 1997) ("[W]e expect that the
Appeal 2009-0797
Application 10/397,396

8
Board's anticipation analysis be conducted on a limitation by limitation
basis, with specific fact findings for each contested limitation and
satisfactory explanations for such findings.")(emphasis added). See also In
re Kahn, 441 F.3d 977, 985-86 (Fed. Cir. 2006) (“On appeal to the Board, an
applicant can overcome a rejection [under § 103] by showing insufficient
evidence of prima facie obviousness or by rebutting the prima facie case
with evidence of secondary indicia of nonobviousness.”) (quoting In re
Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)).
Section 103 forbids issuance of a patent when “the
differences between the subject matter sought to be patented
and the prior art are such that the subject matter as a whole
would have been obvious at the time the invention was made to
a person having ordinary skill in the art to which said subject
matter pertains.”

KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 405 (2007). The question of
obviousness is resolved on the basis of underlying factual determinations
including (1) the scope and content of the prior art, (2) any differences
between the claimed subject matter and the prior art, (3) the level of skill in
the art, and (4) where in evidence, so-called secondary considerations.
Graham v. John Deere Co., 383 U.S. 1, 17-18 (1966). See also KSR, 550
U.S. at 407 (“While the sequence of these questions might be reordered in
any particular case, the [Graham] factors continue to define the inquiry that
controls.”)
In KSR, the Supreme Court emphasized “the need for caution in
granting a patent based on the combination of elements found in the prior
art,” id. at 415, and discussed circumstances in which a patent might be
determined to be obvious. In particular, the Supreme Court emphasized that
Appeal 2009-0797
Application 10/397,396

9
“the principles laid down in Graham reaffirmed the ‘functional approach’ of
Hotchkiss, 11 How. 248.” KSR, 550 U.S. at 415 (citing Graham, 383 U.S. at
12), and reaffirmed principles based on its precedent that “[t]he combination
of familiar elements according to known methods is likely to be obvious
when it does no more than yield predictable results.” Id. at 416. The Court
explained:
When a work is available in one field of endeavor, design
incentives and other market forces can prompt variations of it,
either in the same field or a different one. If a person of
ordinary skill can implement a predictable variation, § 103
likely bars its patentability. For the same reason, if a technique
has been used to improve one device, and a person of ordinary
skill in the art would recognize that it would improve similar
devices in the same way, using the technique is obvious unless
its actual application is beyond his or her skill.

Id. at 417. The operative question in this “functional approach” is thus
“whether the improvement is more than the predictable use of prior art
elements according to their established functions.” Id.

ANALYSIS
Claims 1, 3, 4, 6, 12, 13, and 17
We select claim 1 as representative of this group of claims, pursuant
to our authority under 37 C.F.R. § 41.37(c)(1)(vii).
Appellant argues that the Examiner erred in finding that Kashimura
teaches a sensing system, comprising a sensor coupled to a fault detection
circuit, wherein the fault detection circuit includes a current source that
sends a bias current to the sensor to detect the occurrence of a fault
Appeal 2009-0797
Application 10/397,396

10
condition, and wherein the current source is driven by an offset voltage that
maintains the bias current at a predetermined level (App. Br. 9).
Specifically, Appellant argues that the voltage at point a in
Kashimura’s fault detection circuit 102 does not “maintain the bias current at
a predetermined level” as required by claim 1 (App. Br. 9; Reply Br. 1-2).
In Appellant’s view, when the voltage at point a increases due to a fault
condition, the bias current may change. Hence, Appellant argues that the
offset voltage at point a does not maintain the bias current at a
predetermined level (App. Br. 9).
We are not persuaded by Appellant’s arguments. The Examiner finds
that Kashimura teaches a constant current source that supplies constant
current to point a (FF 5 and 6, Ans. 8). The Examiner finds that since the dc
bias current across resistor 3 in the constant current source 107 must remain
constant, the voltage across the resistor 3 must also remain constant (Ans. 8).
Thus, when the voltage at point a changes due to a fault condition, the
collector voltage of transistor 27 must adjust to supply the constant bias
current (FF 7, Ans. 8). Accordingly, the voltage at point a serves to
maintain the bias current at a predetermined level, as claim 1 requires.
We therefore find no error in the Examiner’s rejection of claim 1
under 35 U.S.C. § 102, nor that of dependent claims 3, 4, 6, 12, 13, and 17
not separately argued with particularity.
Claim 15
Appellant argues that the Examiner erred in finding that Kashimura
teaches a sensing system, wherein a fault condition limits flow of the bias
current through the sensor and causes the offset voltage to rise “to maintain
the bias current” (App. Br. 10). Specifically, Appellant argues that claim 15
Appeal 2009-0797
Application 10/397,396

11
requires that the offset voltage must rise “to maintain the bias current” (App.
Br. 10; Reply Br. 3). When a fault occurs in Kashimura, Appellant argues
that even though the voltage does rise, it does not rise “to maintain the bias
current” as required by claim 15 (FF 7, App. Br. 10).
As noted supra with respect to claim 1, we agree with the Examiner’s
position that the voltage at point a serves to maintain the bias current at a
predetermine level.
Accordingly, we find no error in the Examiner’s rejection of claim 15
under 35 U.S.C. § 102, and we will sustain the rejection.
Claims 5, 14 and 16
Appellant argues that claims 5, 14, and 16 are allowable for the
reasons presented with regard to respective independent claims 1 and 15
(App. Br. 10). As noted supra, we affirm the rejection of claims 1 and 15.
Appellant has not presented any argument as to why these claims should be
separately patentable. Thus, because Appellant has failed to identify any
error in the Examiner’s rejection of claims 5, 14, and 16, we sustain the
Examiner’s rejection of claims 5, 14, and 16, under 35 U.S.C. § 103 over
Kashimura in view of Tucker.
Claims 7-10
We select claim 8 as representative of this group of claims, pursuant
to our authority under 37 C.F.R. § 41.37(c)(1)(vii).
Appellant argues that the Examiner erred in finding that Kashimura in
combination with Blossfeld teaches a sensing interface that includes an
output terminal for outside connection, a differential amplifier for converting
the input signals to a single-ended sine signal, and a comparator circuit
Appeal 2009-0797
Application 10/397,396

12
coupled to the differential amplifier that converts the sine signal to a square
wave (App. Br. 10).
Specifically, Appellant argues that no motivation exists for adding the
sensor interface of Blossfeld, which includes a differential amplifier that
converts the sine wave into a single-ended signal, to the sensing system
taught in Kashimura (FF 8, App. Br. 10). In Appellant’s view, those skilled
in the art would not have been motivated to combine the teachings of
Blossfeld with that of Kashimura since the sensing system of Kashimura is
an engine knock sensor (App. Br. 10).
The Examiner finds that the limitations of claims 7-10 are merely
steps by which to process and digitize a measured signal, which is well
known in the art of measuring and testing (Ans. 8). The Examiner concludes
that it would have been obvious to combine Kashimura and Blossfeld
because it would have been easier to further process digital data for
calculation, storage and data evaluation, as opposed to continuous analog
data (Ans. 9; emphasis added).
We do not find Appellant’s argument persuasive of Examiner error.
We agree with the Examiner’s finding that the method of digitizing data is
well known in the art. We further note that the sensor interface is generally
included in known sensing systems as indicated in the Background section
of the Appellant’s Specification (FF 3). Thus, there exists substantial
motivation to combine the references of Kashimura and Blossfeld.
Appellant has not established error in the Examiner’s rejection.
Therefore, we will affirm the Examiner’s rejection of claims 7-10 under
35 U.S.C. § 103 over Kashimura in view of Blossfeld.

Appeal 2009-0797
Application 10/397,396

13
Claim 11
Appellant argues that the Examiner erred in finding that Kashimura in
combination with Blossfeld and Sampson teaches a sensing system that
includes a sensor interface comprising a differential amplifier having a high
(“approximately infinity”) input resistance (App. Br. 11). Appellant argues
that Kashimura already discloses the use of a high input impedance for the
d.c. bias circuit 107; as such, there would be no motivation for adding high
input impedance to the differential amplifier of the sensing interface circuit
(FF 6 and 9, App. Br. 11).
The Examiner finds that the other components of the circuit can
benefit from the addition of high input impedance, which increases
efficiency of the circuit in its entirety (Ans. 9).
We agree with the Examiner’s finding that the other components of
the circuit can benefit from the addition of high input impedance.
Accordingly, we find that the high input impedance of the d.c. bias circuit
107 does not preclude the addition of high input impedance to any of the
differential amplifiers in the sensing system disclosed by the combination of
Kashimura and Blossfeld.
We, therefore, affirm the Examiner’s rejection of claim 11 under 35
U.S.C. § 103 over Kashimura in view of Blossfeld and further in view of
Sampson.

CONCLUSIONS OF LAW
Appellant has not shown that the Examiner erred in finding that
Kashimura teaches a sensing system, comprising a sensor coupled to a fault
detection circuit, wherein the fault detection circuit includes a current source
Appeal 2009-0797
Application 10/397,396

14
that sends a bias current to the sensor to detect the occurrence of a fault
condition, and wherein the current source is driven by an offset voltage that
maintains the bias current at a predetermined level.
Appellant has not shown that the Examiner erred in finding that
Kashimura teaches a sensing system, wherein a fault condition limits flow of
the bias current through the sensor and causes the offset voltage to rise to
maintain the bias current.
Appellant has not shown that the Examiner erred in finding that
Kashimura in combination with Blossfeld teaches a sensing interface that
includes an output terminal for outside connection, a differential amplifier
for converting the input signals to a single-ended sine signal, and a
comparator circuit coupled to the differential amplifier that converts the sine
signal to a square wave.
Appellant has not shown that the Examiner erred in finding that
Kashimura in combination with Blossfeld and Sampson teaches a sensing
system that includes a sensor interface comprising a differential amplifier
having a high input resistance.

ORDER
The Examiner’s rejection of claims 1 and 3-17 is affirmed.

Appeal 2009-0797
Application 10/397,396

15
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

KIS

Carlson, Gaskey & Olds, P.C.
400 West Maple Road
Suite 350
Birmingham, Michigan 48009