Ex parte Rodder

Board of Patent Appeals and Interferences

Dec 8, 1998

08481900 (B.P.A.I. Dec. 8, 1998)

Application for patent filed June 7, 1995. According to appellant,1
this application is a division of Application 08/342,400, filed November 18,
1994, now Patent No. 5,475,266, issued December 12, 1995; which is a
continuation of Application 08/149,147, filed November 5, 1993.
1

Paper No. 14
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered today
(1) was not written for publication in a law journal and
(2) is not binding precedent of the Board.
UNITED STATES PATENT AND TRADEMARK OFFICE
_______________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
_______________
Ex parte MARK S. RODDER
______________
Appeal No. 97-3299
Application 08/481,9001
_______________
ON BRIEF
_______________
Before THOMAS, BARRETT and LEE, Administrative Patent Judges.
THOMAS, Administrative Patent Judge.

DECISION ON APPEAL
Appellant has appealed to the Board from the examiner’s
Appeal No. 97-3299
Application 08/481,900
2
final rejection of claims 26, 28-30, 32-37 and 39.
Representative claim 26 is reproduced below:
26. A method of forming a microelectronic device, said
device incorporating connecting structures between regions,
the method comprising:
a. providing a substrate having a first region;
b. forming a first insulating layer over said substrate;
c. removing selected portions of said first insulating
layer so as to at least partially expose said region, forming
a cavity above said exposed region;
d. forming a layer of semiconductor material on said
first insulating layer and said cavity so as to make contact
with said first region, said layer of semiconductor material
being formed with a thickness sufficient to partially fill
said cavity and to prevent dopants from subsequent doping
operations from penetrating to said first region;
e. forming a second insulating layer over said
semiconductor layer;
f. removing selected portions of said second insulating
layer so as to at least partially expose said semiconductor
layer; and
g. forming an interconnective layer over said second
insulating layer and in electrical communication with said
exposed semiconductor layer.
There are no references relied on by the examiner.
Appeal No. 97-3299
Application 08/481,900
3
Claims 26, 28-30, 32-37 and 39 stand rejected under the
written description portion of 35 U.S.C. § 112, first
paragraph.
The examiner alleges that the present disclosure does not
reasonably convey to the artisan that the inventor had
possession of the presently claimed invention at the time the
application was filed in that, in the examiner’s view, there
is no support for claiming the formation of a semiconductor
“on” a first insulating layer since the figures indicate that
the semi-conductor layer is formed “over” the insulating
layer, as expressed in the final rejection.
Rather than repeat the positions of the appellant and the
examiner, reference is made to the brief and the answer for
the respective details thereof.
OPINION
We reverse the outstanding rejection of the claims on
appeal.
Appeal No. 97-3299
Application 08/481,900
4
Our study of the corresponding portions of the disclosed
invention in the written description portion of the speci-
fication, as well as the figures, lead us to conclude our
agreement with appellant’s position set forth at page 3 of the
brief on appeal that the formation of a layer of semiconductor
material “on” a first insulating layer as recited in clause
(d) of claim 26 on appeal is supported from an artisan’s
perspective in the specification as filed. The examiner’s
arguments in the answer appear to be divorced from a
consideration of the disclosed invention in the specification
and figures. Although the conventional dictionary meaning of
the word “on” may in some context mean in contact with, the
general meaning also includes a relative position with respect
to something such as on top of or over or covering. As
indicated by appellant at page 3 of the brief, the feature as
recited in dependent claim 28 indicates that there is an
intermediate layer between the semiconductor layer and the
first insulating layer, which feature is consistent with
figure 4(d) as disclosed. The term “on” in independent claim
Appeal No. 97-3299
Application 08/481,900
5
26 does not necessarily require it to be construed, in the
context of the whole disclosure of the claimed invention, as
“directly on.”
Appeal No. 97-3299
Application 08/481,900
6
In view of the foregoing, the decision of the examiner
rejecting claims 26, 28-30, 32-37 and 39 under 35 U.S.C. §
112, first paragraph, is reversed.
REVERSED
JAMES D. THOMAS )
Administrative Patent Judge )
)
)
)
LEE E. BARRETT ) BOARD OF
PATENT
Administrative Patent Judge ) APPEALS AND
) INTERFERENCES
)
)
JAMESON LEE )
Administrative Patent Judge )

Appeal No. 97-3299
Application 08/481,900
7
JDT/cam
Appeal No. 97-3299
Application 08/481,900
8
Brian C. McCormack
Texas Instruments Incorporated
P. O. Box 655474 M/S 219
Dallas, TX 75265