Ex Parte Raines

Board of Patent Appeals and Interferences

Jul 18, 2011

11385438 (B.P.A.I. Jul. 18, 2011)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte GARY RAINES
____________

Appeal 2009-009507
Application 11/385,438
Technology Center 2100
____________

Before HOWARD B. BLANKENSHIP, THU A. DANG, and
JEFFREY S. SMITH, Administrative Patent Judges.

SMITH, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1-20, which are all the claims in the application. We
have jurisdiction under 35 U.S.C. § 6(b).
We affirm.

Appeal 2009-009507
Application 11/385,438

2
Invention
Appellant’s invention relates to a method for graphically presenting
test results of a circuit device under test. Test results of a circuit device
under test are acquired. Graphical diagrams comprising representations of at
least a portion of the circuit device under test and having circuit components
and associated circuit component terminals are generated with test results for
nodes of the circuit device under test mapped to circuit component terminals
of the displayed diagrams. Abstract.

Representative Claim
1. A method for graphically presenting test results of a
circuit device under test, the method comprising:

acquiring test results for corresponding circuit device
nodes of the circuit device under test, the circuit device nodes
of the circuit device under test identified by corresponding
circuit device node names;

accessing a graphical diagram comprising a
representation of at least a portion of the circuit device under
test, the representation comprising a circuit component having
associated circuit component terminals identified by
corresponding circuit component terminal names, at least one of
the circuit component terminals corresponding to a respective
circuit device node in the represented portion of the circuit
device under test and having an associated circuit component
terminal name different than the corresponding circuit device
node name of the respective corresponding circuit device node
in the represented portion of the circuit device under test;

mapping the respective circuit device node names of the
circuit device nodes in the represented portion of the circuit
device under test which are different than the respective circuit
component terminal names of the corresponding circuit
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component terminals corresponding to the respective at least
one circuit device nodes in the represented portion of the circuit
device under test; and

displaying the graphical diagram, enabling display of the
test results corresponding to the circuit device nodes mapped to
the corresponding circuit component terminals represented in
the graphical diagram, the displayed graphical diagram labeling
the respective circuit component terminals having
corresponding test results with the circuit terminal names
associated with the respective circuit component terminals.

Examiner’s Rejections
Claims 1-20 stand rejected under 35 U.S.C. § 102(e) as being
anticipated by Folea (US 6,988,229 B1).

Claim Groupings
In view of Appellant’s arguments in the Appeal Brief, we will decide
the appeal on the basis of claim 1. See 37 C.F.R. § 41.37(c)(1)(vii).

ISSUE
Has the Examiner erred in finding that Folea describes “mapping the
respective circuit device node names of the circuit device nodes in the
represented portion of the circuit device under test which are different than
the respective circuit component terminal names of the corresponding circuit
component terminals corresponding to the respective at least one circuit
device nodes in the represented portion of the circuit device under test” as
recited in claim 1?

Appeal 2009-009507
Application 11/385,438

4
FINDINGS OF FACT
We rely on the findings of fact made by the Examiner in the Final
Rejection and the Examiner’s Answer.

PRINCIPLES OF LAW
Claim Interpretation
The content of non-functional descriptive material is not entitled to
weight in the patentability analysis. See In re Lowry, 32 F.3d 1579, 1583
(Fed. Cir. 1994) (“Lowry does not claim merely the information content of a
memory. . . . Nor does he seek to patent the content of information resident
in a database.”). See also Ex parte Nehls, 88 USPQ2d 1883 (BPAI 2008)
(precedential).

ANALYSIS
Appellant contends that extracting and displaying pin names and
numbers from a file as described by Folea does not describe mapping node
names in a circuit device to circuit component terminal names in a graphical
diagram. App. Br. 12. The Examiner finds that the node names and the
circuit names are nonfunctional descriptive material that is not entitled to
patentable weight. Ans. 5-6. Appellant has not addressed the Examiner’s
finding.
The different names as set forth in Appellant’s invention, such as the
node names and terminal names recited in claim 1, are not functionally
involved in the steps recited, because the recited method steps would be
performed the same regardless of the specific names attached to the nodes
and circuits. Further, the structural elements of the graphical diagram
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remain the same regardless of the specific names of the nodes and circuits
that are labeled in the graphical diagram. The differences between the
graphical diagram recited in the claim and the graphical diagram in the prior
art are only found in the labels of the graphical diagram, which are
nonfunctional descriptive material. Thus, the descriptive material will not
distinguish the claimed invention from the prior art in terms of patentability.
Therefore we find that the “mapping” and “displaying” limitations recited in
claim 1 encompass extracting pin names and numbers from a file and
displaying the pin names and numbers on a graphical display as described by
Folea.
The Examiner finds that Folea describes changing the name of a
device or pin in a file to a desired name. The Examiner further finds that
mapping node names in a circuit device to circuit component terminal names
in a graphical diagram encompasses changing the name of a device or pin in
a file to a desired name. Ans. 7. Appellant has not provided evidence or
persuasive argument to rebut the Examiner’s findings.
We sustain the rejection of claim 1 under 35 U.S.C. § 102. Appellant
has not provided argument for separate patentability of claims 2-20, which
thus fall with claim 1.

CONCLUSION OF LAW
The Examiner did not err in finding that Folea describes “mapping the
respective circuit device node names of the circuit device nodes in the
represented portion of the circuit device under test which are different than
the respective circuit component terminal names of the corresponding circuit
component terminals corresponding to the respective at least one circuit
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device nodes in the represented portion of the circuit device under test” as
recited in claim 1.

DECISION
The rejection of claims 1-20 under 35 U.S.C. §102(e) as being
anticipated by Folea is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(f).

AFFIRMED

msc