Ex Parte Racanelli et al

Board of Patent Appeals and Interferences

Aug 23, 2001

08508874 (B.P.A.I. Aug. 23, 2001)

The opinion in support of the decision being entered today was not written for
publication and is not binding precedent of the Board.
Paper No. 16
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte MARCO RACANELLI, HYUNGCHEOL SHIN, and
HEEMYONG PARK
____________
Appeal No. 1998-2918
Application No. 08/508,874
____________
ON BRIEF
____________
Before JERRY SMITH, BLANKENSHIP, and JEFFREY T. SMITH, Administrative
Patent Judges.
BLANKENSHIP, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134 from the examiner's final
rejection of claims 1-16.
We reverse, and enter a new ground of rejection in accordance with 37 CFR
§ 1.196(b).
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Application No. 08/508,874
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BACKGROUND
The invention is directed to a method for forming an isolation structure on a SOI
(Silicon on Insulator) substrate. Claim 1 is reproduced below.
1. A method for fabricating a reduced stress isolation structure for a SOI
device comprising the steps of:
providing a semiconductor substrate having a buried region of silicon
dioxide below a major surface and a silicon layer below the major surface and
above the buried region of silicon dioxide, wherein the silicon layer has an edge;
disposing a first layer on the major surface;
disposing a second layer overlying the first layer, wherein the second
layer has a first portion and a second portion;
disposing a third layer overlying the second layer, wherein the third layer
has a first portion and a second portion;
removing the first portion of the third layer;
removing the first portion of the second layer;
oxidizing the semiconductor substrate to form an isolation structure, a
portion of the isolation structure protrudes above the major surface of the
semiconductor substrate and is overlying the edge of the silicon layer;
removing the second portion of the third layer; and
removing the second portion of the second layer.
Appeal No. 1998-2918
Application No. 08/508,874
1 The USPTO Translation Branch has provided an English translation, a copy of which should mail
with this decision.
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The examiner relies on the following references:
Namura 5-152427 Jun. 18, 1993
(Japanese published patent application)1
Stanley Wolf (Wolf), A Review of IC Isolation Technologies -- Part 6, Solid State
Technology, Dec. 1992, pp. 39-41.
Claims 1-16 stand rejected under 35 U.S.C. § 103 as being unpatentable over
Namura and Wolf.
Claims 17-20 have been withdrawn from consideration.
We refer to the Final Rejection (Paper No. 5) and the Examiner's Answer (Paper
No. 11) for a statement of the examiner's position and to the Brief (Paper No. 10) and
the Reply Brief (Paper No. 12) for appellants' position with respect to the claims which
stand rejected.
OPINION
Section 103 rejection
The section 103 rejection of Claims 1-16 is set forth on pages 5-7 of the Answer.
However, we must reverse, pro forma, the examiner’s rejection of the claims, because
we consider the scope of the claims to be indefinite. If certain claim language is not
understood, then any attempt to apply art against that claim can only be based on
speculation. Rejections of claims over prior art should not be based on speculation as
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Application No. 08/508,874
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to the meaning of terms employed and assumptions as to the scope of the claims. In re
Steele, 305 F.2d 859, 862, 134 USPQ 292, 295 (CCPA 1962). We enter a new ground
of rejection against the claims under 37 CFR § 1.196(b), infra.
Although we have not considered the merits of the section 103 rejection, we
observe that the statement of the rejection lacks sufficient detail to set out a prima facie
case of obviousness. In the event of further prosecution and subsequent appeal, a
rejection over the prior art in any Examiner's Answer must compare each limitation of
the claims with the prior art. See MPEP § 1208 (Seventh Edition, Rev. 1, Feb. 2000).
This is particularly important where, as in the instant case, the rejection relies on the
doctrine of inherency.
We further note that, in meeting the Office's burden in establishing inherency,
extrinsic evidence (e.g., an additional, explanatory reference) to establish that the
missing descriptive matter is necessarily present is preferred.
To establish inherency, the extrinsic evidence "must make clear that the
missing descriptive matter is necessarily present in the thing described in
the reference, and that it would be so recognized by persons of ordinary
skill." "Inherency, however, may not be established by probabilities or
possibilities. The mere fact that a certain thing may result from a given
set of circumstances is not sufficient."
In re Robertson, 169 F.3d 743, 745, 49 USPQ2d 1949, 1950-51 (Fed. Cir. 1999)
(citations omitted).
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Application No. 08/508,874
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Finally, we note that, at the time of rejection, the examiner worked without benefit
of a complete English translation of the foreign language document. An English
translation is now present in the file wrapper.
New Ground of Rejection -- 37 CFR 1.196(b)
We enter the following new ground of rejection against the claims in accordance
with 37 CFR § 1.196(b): Claims 1-16 are rejected under 35 U.S.C. § 112, second
paragraph, as being indefinite for failing to particularly point out and distinctly claim the
subject matter which applicants regard as the invention.
The function of claims is (1) to point out what the invention is in such a way as to
distinguish it from the prior art; and (2) to define the scope of protection afforded by the
patent. In re Vamco Mach., Inc., 752 F.2d 1564, 1577 n.5, 224 USPQ 617, 635 n.5
(Fed. Cir. 1985). The legal standard for definiteness is whether a claim reasonably
apprises those of skill in the art of its scope. In re Warmerdam, 33 F.3d 1354, 1361, 31
USPQ2d 1754, 1759 (Fed. Cir. 1994). The inquiry is merely to determine whether the
claims do, in fact, set out and circumscribe a particular area with a reasonable degree
of precision and particularity. In re Moore, 439 F.2d 1232, 1235, 169 USPQ 236, 238
(CCPA 1971). The definiteness of the language employed must be analyzed -- not in a
vacuum, but in light of the teachings of the prior art and of the particular application
disclosure as it would be interpreted by one possessing the ordinary level of skill in the
pertinent art. Id.
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With these guidelines in mind, we consider the scope of the claims to be
indeterminate. In light of the disclosure, and with reference numerals as shown in the
drawings, claim 1 recites the step (emphasis added) of "providing a semiconductor
substrate having a buried region of silicon dioxide (12) below a major surface (14) and a
silicon layer (13) below the major surface (14) and above the buried region of silicon
dioxide (12), wherein the silicon layer (13) has an edge...."
The claim later recites (emphasis added), "oxidizing the semiconductor substrate
to form an isolation structure (22), a portion of the isolation structure (22) protrudes
above the major surface (14) of the semiconductor substrate and is overlying the edge
of the silicon layer (13)...."
The "edge" of the silicon layer that a portion of the isolation structure overlies is
described in the specification. "Bird's head region 21 provides a silicon oxide
layer...above the edge of active area 13 which will improve the control of the threshold
voltage along the edge of active area 13." (Specification, page 7, li. 22-27.)
The "edge" is formed during the oxidation step, according to page 7 of the
specification.
FIG. 3 illustrates an enlarged cross-sectional view of isolation
structure 22 after oxidation. The oxidation consumes silicon layer 13
under the exposed portions of etchant barrier layer 16. In this
embodiment, silicon layer 13 is converted to silicon dioxide and combines
with etchant barrier layer 16 and buried isolation region 12 both of which
are made of silicon dioxide. The combination of these three layers forms
a single region of silicon dioxide such that isolation structure 22 will grow
to be...above surface 14.
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(Id. at li. 6-15.)
Claim 1 is thus inconsistent with the disclosed invention. The "edge" of silicon
layer 13 is not present at the step of "providing a semiconductor substrate" (Fig. 1).
The "edge" is formed during the later step of oxidation (results shown in Figs. 3 and 4).
While the scope of the claim might be reasonably clear when read "in a vacuum," when
the terms are interpreted in light of the specification, as they must, a latent ambiguity
renders the scope of the claim indeterminate. See Moore, 439 F.2d at 1255 n.2, 169
USPQ at 238 n.2 (discussing latent ambiguity in claims). We also note that appellants
point to the specification at page 7, lines 21-27 as “support” for the amendment filed
August 12, 1996 (Paper No. 4), according to the Remarks accompanying said
amendment. We further note that appellants, in the Brief's "Summary of the Invention,"
refers to the "edge" of silicon layer 13 as the same structure we have pointed out in
instant Figure 4.
Instant claim 10, the only other independent claim on appeal, also fails to
describe appellants' disclosed process. The "edge" of the silicon layer that the "bird's
head encroachment region" is "above" is recited as being present during the first step,
that of "providing a substrate." Claims 1-16 thus fail to pass muster under 35 U.S.C. §
112, second paragraph.
CONCLUSION
The section 103 rejection of claims 1-16 is reversed.
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Application No. 08/508,874
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Claims 1-16 are newly rejected by us under 35 U.S.C. § 112, second paragraph.
This decision contains a new ground of rejection pursuant to 37 CFR
§ 1.196(b)(amended effective Dec. 1, 1997, by final rule notice, 62 Fed. Reg. 53,131,
53,197 (Oct. 10, 1997), 1203 Off. Gaz. Pat. & Trademark Office 63, 122 (Oct. 21,
1997)). 37 CFR § 1.196(b) provides that, "A new ground of rejection shall not be
considered final for purposes of judicial review."
37 CFR § 1.196(b) also provides that the appellant, WITHIN TWO MONTHS
FROM THE DATE OF THE DECISION, must exercise one of the following two options
with respect to the new ground of rejection to avoid termination of proceedings
(§ 1.197(c)) as to the rejected claim:
(1) Submit an appropriate amendment of the claim so rejected or a
showing of facts relating to the claim so rejected, or both, and have the
matter reconsidered by the examiner, in which event the application will
be remanded to the examiner
. . . .
(2) Request that the application be reheard under § 1.197(b) by the Board
of Patent Appeals and Interferences upon the same record. . . .
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No time period for taking any subsequent action in connection with this appeal
may be extended under 37 CFR § 1.136(a).
REVERSED -- 37 CFR § 1.196(b)
JERRY SMITH )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
HOWARD B. BLANKENSHIP ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
JEFFREY T. SMITH )
Administrative Patent Judge )
Appeal No. 1998-2918
Application No. 08/508,874
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