Ex parte POPAT

Board of Patent Appeals and Interferences

Nov 14, 2000

08315792 (B.P.A.I. Nov. 14, 2000)

The opinion in support of the decision being entered today was not written for
publication and is not binding precedent of the Board

Paper No. 14

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
_____________

Ex parte KAUSHIK POPAT
_____________

Appeal No. 1998-3424
Application 08/315,792
_____________

ON BRIEF
_____________

Before THOMAS, KRASS, and LALL, Administrative Patent Judges.

KRASS, Administrative Patent Judge.

DECISION ON APPEAL

This is a decision on appeal from the final rejection of claims 1, 5-17 and 20-22.
Claims 2-4, 18, 19 and 23 have been indicated by the examiner as being directed to
patentable subject matter.
The invention is directed to first in- first out (FIFO) storage devices in general. In
particular, the output transitions of the device are inhibited when the last cell of the
device is read or when the FIFO is erased. This is said to be an improvement over the
prior art since transitions at the output of conventional devices consume considerable

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amounts of power, which has an adverse effect on the length of time a portable device
comprising the FIFO can operate without recharging.
Representative independent claim 1 is reproduced as follows:
1. A method of operating a first in- first out computer device having N storage
stages capable of storing N entries between an input and output, the computer device
responding to read and write commands for entries to be read from and written into the
computer device, the method comprising the step of: controlling the output so no
transition occurs thereon after a last one of said stages having an unread value stored
therein is read when a read command is supplied to the device without a write command
being supplied to the device.

The examiner relies on the following references:
Ward et al. (Ward) 4,864,543 Sep. 05, 1989
McClure 5,502,655 Mar. 26, 1996
(filed Apr. 1, 1994)
Claims 1, 5-17 and 20-22 stand rejected under 35 U.S.C. 102(b) as anticipated by
either one of Ward or McClure.
Reference is made to the brief and answer for the respective positions of appellant
and the examiner.

OPINION
Independent claim 1 is directed to the situation where the output is controlled so
that no transition occurs after a last one of the stages having an unread value stored
therein is read when a read command is supplied to the device without a write command
being supplied to the device. Independent claim 5 is directed to the situation where the
output is controlled so no transition occurs thereon in response to a command for erasing
all entries in the device. Independent claim 8 is directed to the situation wherein
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transitions are prevented under either of the two circumstances discussed in claims 1 and
5. Independent claim 13 is basically an apparatus counterpart to method claim 8 wherein
transitions are prevented under either of the two recited circumstances. Independent
claim 17 is similar to claim 1 in that it requires setting a write pointer value equal to the
stored reader pointer value after reading a last unread value in response to reception of a
read command if the read command is received without a corresponding reception of the
write command. Independent claim 22 requires the controller changing the write pointer
value to equal the read pointer value after execution of a first read signal if the number of
entries equals one and a corresponding write signal is not received during reception of the
first read signal.
Thus, the instant claimed subject matter is directed to controlling the output of the
FIFO so no transitions occur at the output of the device under various conditions. The
examiner has pointed to sections within Ward and McClure which the examiner alleges
meet the various control portions of the instant claims. In Ward, the examiner points to
column 1, lines 41-48 and column 8, lines 55-57. With regard to McClure, the examiner
identifies column 2, lines 42-54 , column 3, lines 54-63 and column 5, lines 9-12.
Appellant argues that neither Ward nor McClure recognizes the problems solved
by appellant and that neither of the references prevents transitions on the output under the
circumstances specified in the claims.
We agree with the examiner and refer to the reasoning set forth at pages 2-9 of
Paper No 9. Clearly, Ward is concerned with a similar problem as is appellant. Column
2, lines 19-23 of Ward recites that a disadvantage of the prior art is the large amount of
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power consumption because cell locations are continuously powered up and enabled for
read or write operation.
Further, regardless of appellant’s arguments regarding dissimilar problems and no
disclosure by the references of the “affirmative steps taken to prevent the transitions” in
the instant invention, Ward clearly discloses the invention as broadly set forth by the
instant claims. For example, claim 1 calls for controlling the output “so no transition
occurs…when a read command is supplied to the device without a write command being
supplied to the device.” Ward, at the identified portion of column 8, clearly meets this
claim language in that the read clock generator 82 is disabled until at least one write
operation occurs. This portion of Ward similarly meets the language of instant claim 5
since no transition occurs at the output in response to a command for erasing all entries
in the device [Note lines 52-54 of column 8 of Ward which discloses that the empty
condition prevents further read./write pulses.]. In a similar manner, since independent
claim 8 recites an output control responsive to either one of the conditions of claims 1
and 5, claim 8 is met by Ward. Claim 13 is also met for similar reasons.
With regard to claim 17. Appellant argues [brief-page 11] that neither of the
references talks about setting the write pointer value to equal the stored reader pointer
value after reading a last unread value in response to reception of a read command if the
read command is received without a corresponding reception of the write command.
However, Ward, for example, recites that the reset signal sets both pointers to the same
address [column 8, lines 55-56] and this is apparently done after reading the last unread
value, i.e., an empty condition.
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Similarly, with regard to McClure as it applies to independent claims 1, 5, 8, 13
and 17, the examiner has indicated portions of this reference which are considered to
meet the claim limitations. For example, the examiner points to column 2, lines 42-45,
reciting that
The empty and full flags are somewhat easier to generate because
once the matching condition is met, signifying empty for example,
all subsequent reads are disabled until a valid write is completed.

This recitation appears to meet the output control limitations set forth in the
instant claims.
With regard to independent claim 22, the examiner explains the applicability of
Ward at pages 2-3 of Paper No. 9 and the applicability of McClure at page 9 of Paper No.
9. Yet, appellant’s response [page 12 of the brief] is merely to reiterate what is recited by
the claim and then to merely state that this “is not shown by either of the references.”
This is not a persuasive or an adequate argument since it does not point out the alleged
errors in the examiner’s position. Similarly, while appellant has chosen to have each
claim stand on its own merits, the only “arguments” presented against the rejection of the
claims is to reiterate the claim language and repetitively state that the references do not
show the particular feature recited without pointing out the alleged errors in the
examiner’s position. Since the examiner has presented a prima facie case of anticipation,
in our view, the mere statement by appellant that the references do not disclose or show
the recited limitations is not a persuasive argument to overcome the prima facie case.
At pages 5-6 of the brief, appellant describes the operation of Ward and then
contends that the operations of Ward are “normal FIFO registers” operations under empty
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and full conditions and “do not address the improvements claimed.” However, appellant
does not point out the perceived “improvements claimed” nor does appellant recite
specific claim language on which the argument relies. Still further, even if Ward does,
indeed, disclose what appellant contends as “the operation of normal FIFO registers,”
appellant has not explained how or why those “normal” operations fail to read on the
broad claim language.
With regard to the erasing operation, appellant agrees [brie f-page 6] that when a
FIFO is erased, it is appropriate that the read and write pointers point to the same address,
as in Ward, for example. Appellant queries, however, as to “How do you get there”?
While appellant strenuously contends that setting the pointers to the same address is “not
sufficient” and that there “must be affirmative steps taken to prevent the transitions,”
appellant never identifies the particular claim language on which he relies for these
“affirmative steps.” Where, for example, are these “affirmative steps” in claim 1 which
distinguish over that disclosed by either of the references?
Appellant contends [brief-page 7] that neither Ward nor McClure contains “the
structure need [sic, needed] to achieve the functions claimed. But, aga in, appellant fails
to identify the claimed structure relied upon for patentability.
Since, in our view, the examiner has set forth a prima facie case of anticipation
which has not been successfully rebutted by appellant, the examiner’s rejection of claims
1, 5-17 and 20-22 under 35 U.S.C. 102(b) as anticipated by either one of Ward or
McClure is sustained.

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No time period for taking any subsequent action in connection with this appeal
may be extended under 37 CFR � 1.136 (a).
AFFIRMED

JAMES D. THOMAS )
Administrative Patent Judge )
)
)
) BOARD OF PATENT
ERROL A. KRASS ) APPEAL AND
Administrative Patent Judge ) INTERFERENCES
)
)
)
PARSHOTAM S. LALL )
Administrative Patent Judge )

EAK:rwk

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