Ex Parte Pauletti et al

Patent Trial and Appeal Board

Mar 21, 2014

10926916 (P.T.A.B. Mar. 21, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL
AND APPEAL BOARD

____________

Ex parte TIMOTHY PATRICK PAULETTI,
SAMEER PENDHARKAR, WAYNE TIEN-FENG CHEN,
JONATHAN BRODSKY, and ROBERT STEINHOFF
__________

Appeal 2011-013011
Application 10/926,916
Technology Center 2800
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Before CHARLES F. WARREN, MICHAEL P. COLAIANNI, and
N. WHITNEY WILSON, Administrative Patent Judges.

COLAIANNI, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134 the final rejection of claims
1, 2, 7, 8, and 24-29. We have jurisdiction over the appeal pursuant to
35 U.S.C. § 6(b).
We REVERSE.
Appellants’ invention is directed to bi-directional electrostatic
discharge (ESD) protection circuits (Spec. para. [0001]).
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Application 10/926,916

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Claim 1 is illustrative:
1. An electrostatic discharge (ESD) device for protecting an
input/output terminal of a circuit, the device comprising:
a first transistor with an integral silicon-controlled rectifier (SCR)
coupled between the input/output (I/O) terminal of the circuit and a node;
and
a second transistor with an integral silicon-controlled rectifier coupled
between the node and a negative terminal of a supply voltage, wherein the
silicon-controlled rectifier of the first transistor triggers in response to a
negative ESD voltage and the silicon-controlled rectifier of the second
transistor triggers in response to a positive ESD voltage.

Appellants appeal the following rejections:
1. Claims 1 and 2 are rejected under 35 U.S.C. § 102(b) as being
unpatentable over Ker ’381 (US 5,754,381, patented May 19, 1998).
2. Claim 7 is rejected under 35 U.S.C. § 103(a) as being unpatentable
over Ker ’381 in view of Pendharkar et al. (SCR-LDMOS - A NOVEL
LDMOS DEVICE WITH ESD ROBUSTNESS, IEEE 341-344, May 22-25
2000).
3. Claim 8 is rejected under 35 U.S.C. § 103(a) as being unpatentable
over Ker ’381 in view of Ker ’793 et al. (US 5,631,793, patented May
20, 1997).
4. Claims 24-27 are rejected under 35 U.S.C. § 103(a) as being
unpatentable over Ker ’381 in view of Kitagawa (US 2003/0214773
A1, published Nov. 20, 2003).
5. Claims 28 and 29 are rejected under 35 U.S.C. § 103(a) as being
unpatentable over Ker ’381 in view of Pendharkar and Kitagawa.

Appeal 2011-013011
Application 10/926,916

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ISSUE
Did the Examiner reversibly err in construing the claim phrase “a first
transistor with an integral silicon-controlled rectifier (SCR)” (emphasis
added) in claim 1 to include Ker ’381’s transistors 46 and 54 connected in
parallel with modified PTLSCR 42 and NTLSCR 44? We decide this issue
in the affirmative.

FINDINGS OF FACT & ANALYSIS
The Examiner’s findings regarding Ker ’381 are located on page 4 of
the Answer. The Examiner finds that Ker ’381 teaches first transistor 46
with an integral silicon-controlled rectifier (SCR) 42. Id. The Examiner
finds that Ker ’381 discloses a second transistor 54 with an integral silicon-
controlled rectifier 44. Id.
Appellants argue that Ker ’381 fails to teach or suggest an “integral”
silicon-controlled rectifier (SCR) (App. Br. 6-7). Appellants contend that
the first and second transistors of Ker ‘381 do not have integral SCRs. Id.
Appellants contend that Ker ’381 teaches that the PTLSCR and NTLSCR
are connected in parallel with the transistors (i.e., PMOS and NMOS
devices) (Reply Br. 3). Appellants argue that since the SCRs are connected
in parallel, the SCRs are separate devices and, thus, are not “integral” with
the transistors. Id.
Claim 1 recites “a first transistor with an integral silicon-controlled
rectifier” and “a second transistor with an integral silicon-controlled
rectifier.” We understand the term “integral” to mean that the silicon-
controlled rectifier is formed within the transistors. In other words, the
transistors are structured such that the transistors themselves function as
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Application 10/926,916

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silicon-controlled rectifiers. Our understanding is supported by the
Specification, which discloses that “[b]y arranging these wells [i.e., the P-
type and N-type semiconductor wells] in a certain way, the parasitic bipolar
transistors can be formed in such a way as to create an integral SCR within
the structure of the transistor” (emphasis added) (Spec. para. [0016]). The
Specification further describes that the “the ESD [electrostatic discharge]
device comprises two such transistors, each acting as diode coupled
transistors, such that each contains an integral body diode capable of
forward and reverse bias” (Spec. para. [0015]). Paragraph 23 of the
Specification describes that the integral SCR 78 is an “electrically coupled
pair of bipolar junction transistors (BJTs) superimposed on the body of the
LDMOS transistor 50 with its electrical terminals located to form a SCR.”
In light of our claim construction, we fail to see how Ker ’381
anticipates the electrostatic charge discharge device having transistors with
integral SCRs. The Examiner’s broad interpretation of the claim term
“integral” is not supported by the Specification. Ker ’381’s PTLSCR and
NTLSCR are connected in parallel with the transistors 46 and 54 according
to column 7, lines 14-45. As Appellants argue, PTLSCR and NTLSCR
connected in parallel are not within the transistor as is required by the
claims. On this record, we reverse the Examiner’s § 102 rejection of claims
1 and 2. Because the Examiner does not rely on the any of the secondary
references to cure the deficiency of the Ker ’381, we reverse the Examiner’s
§ 103 rejections for the same reasons.

DECISION
The Examiner’s decision is reversed.
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ORDER
REVERSED

cdc