Ex Parte ParkinsonDownload PDFPatent Trial and Appeal BoardFeb 28, 201311300819 (P.T.A.B. Feb. 28, 2013) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/300,819 12/15/2005 Ward D. Parkinson OVX.0002US 4400 21906 7590 02/28/2013 TROP, PRUNER & HU, P.C. 1616 S. VOSS ROAD, SUITE 750 HOUSTON, TX 77057-2631 EXAMINER YANG, HAN ART UNIT PAPER NUMBER 2824 MAIL DATE DELIVERY MODE 02/28/2013 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte WARD D. PARKINSON ____________________ Appeal 2011-002873 Application 11/300,819 Technology Center 2800 ____________________ Before CARL W. WHITEHEAD, JR., ERIC S. FRAHM, and ANDREW J. DILLON, Administrative Patent Judges. FRAHM, Administrative Patent Judge. DECISION ON APPEAL Appeal 2011-002873 Application 11/300,819 2 STATEMENT OF CASE Introduction Appellant appeals under 35 U.S.C. § 134(a) from a final rejection of claims 1-25. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Appellant’s Disclosed Invention Appellant’s disclosed invention pertains to semiconductor memories, and more specifically, phase change memory devices that use materials that may be electrically switched between amorphous and crystalline states (Spec. 1:2-7). More specifically, Appellant discloses and claims a method (claim 1), system (claim 19), and phase change memory (claim 13) in which a phase change memory element is programmed to a reset state using a current which is less than the saturated current of the phase change memory element (claims 1, 13, and 19; Abs.). Exemplary Claim Exemplary independent claim 1 under appeal, with emphases added, reads as follows: 1. A method comprising: programming a phase change memory element to a reset state with a current less than the saturated current of the memory element. Examiner’s Rejections (1) The Examiner rejected claims 1, 2, 5, 6, 10-12 under 35 U.S.C. § 102(b) as being anticipated by Lee (US 2004/0202017 A1).1 Ans. 4-6. 1 Although the Examiner indicates that Lee (US 2005/0275433 A1) is relied upon in rejecting claims 1-25 (Ans. 4, 6, 9, and 10), and cites Lee (US 2005/0275433 A1) in the “Evidence Relied Upon” section of the Answer Appeal 2011-002873 Application 11/300,819 3 (2) The Examiner rejected dependent claims 3, 4, 8, and 9 as being unpatentable under 35 U.S.C. § 103(a) over Lee and Dodge (US 7,099,180 B1). Ans. 6-9. (3) The Examiner rejected dependent claim 7 as being unpatentable under 35 U.S.C. § 103(a) over Lee and Lowrey (US 6,625,054 B2).2 Ans. 9- 10. (Ans. 3-4), the PTO-892 mailed to Appellant on mailed on April 10, 2007 cites Lee (US 2004/0202017 A1) and no citation has been made in the record of the prosecution of this case other than Lee (US 2004/0202017 A1). The citations to Lee in the Answer are correct as to Lee (US 2004/0202017 A1, and we note that both the Examiner and Appellant mistakenly refer to Lee (US 2004/0202017 A1) as Lee (US 2004/02202017 A1) (Ans. 4, 7, 9, and 10; App. Br. 9-10). In view of the fact that (i) Lee (US 2004/02202017 A1) cannot exist due to the length of the numerical value of the citation; (ii) the citations to the reference are correct as to Lee (US 2004/0202017 A1); (iii) both the Final Rejection (Final Rej. 2-3), and the Answer (Ans. 4-5), rely upon Lee (US 2004/0202017 A1) in rejecting claim 1; and (iv) Lee (US 2004/0202017 A1) is a proper reference under § 102(b), while Lee (US 2005/0275433 A1) has never been made of record before the Answer (see Ans. 3-4) and is only proper as a reference under § 102(e), we consider this to be harmless error and treat the anticipation and obviousness rejections over Lee to rely on Lee (US 2004/0202017 A1). In addition, we note that Lee (US 2005/0275433 A1) has priority to divisional application no. 10/807,077, filed on March 23, 2004, and that divisional application no. 10/807,077 was published on October 14, 2004 as Lee (US 2004/0202017 A1). Furthermore, Lee (US 2005/0275433 A1) contains the same disclosures (see e.g., Fig. 5A; ¶ [0055]) as Lee (US 2004/0202017 A1), and would support similar rejections as before us on appeal with regard to Lee (US 2004/0202017 A1), but under § 102(e) and not § 102(b) based on the filing date of August 16, 2005 for Lee (US 2005/0275433 A1). 2 The Examiner relies upon Lowrey in making the rejection in both the Final Rejection (Final Rej. 7-8) and the Answer (Ans. 9-10), however, Lowrey is not listed in the “Evidence Relied Upon” section of the Answer (Ans. 3-4). Appeal 2011-002873 Application 11/300,819 4 (4) The Examiner rejected claims 13-25 as being unpatentable under 35 U.S.C. § 103(a) over Dodge and Lee. Ans. 10-13. Appellant’s Contentions3 Appellant contends that the Examiner erred in rejecting claims 1, 2, 5, 6, and 10-12 under 35 U.S.C. § 102(b), and claims 3, 4, 7-9, and 13-25 under § 103(a) for numerous reasons, including: (1) even though Lee states that the transition to the reset state may occur at a lower current than the saturated current, Lee teaches a saturated current of 100µA (App. Br. 10); (2) Lee discloses that the reset state may be set at 100µA (App. Br. 10); (3) Lee teaches away from Appellant’s invention (App. Br. 10; Reply Br. 2); (4) Lee never says to use a reset current below the saturated current of 100µA, and merely states that the reset current can be 60µA or higher (App. Br. 10); We treat this as harmless error, and consider Lowrey to be applied in combination with Lee (US 2004/0202017 A1) in making the obviousness rejection of claim 7. 3 Separate patentability is not argued for claims 2, 5, 6, and 10-12 (App. Br. 10-11; Reply Br. 1-2), and Appellant only provides specific arguments as to claim 1 (App. Br. 10-11). Appellant relies on the arguments presented as to claim 1 for the patentability of claims 3, 4, 7-9, and 13-25 (App. Br. 11). Accordingly, we consider claim 1 to be representative of the group of claims consisting of claims 1, 2, 5, 6, and 10-12, and we will decide the appeal of claims 3, 4, 7-9, and 13-25 on the same basis as claim 1. Our analysis will only address the merits of representative claim 1, and claims 2-25 will not be further addressed other than our ultimate conclusions. Appeal 2011-002873 Application 11/300,819 5 (5) Lee’s paragraph [0055] infers that using a reset current below the saturated current would be unstable and therefore undesirable (App. Br. 10; Reply Br. 2); and (6) Lee does not program to a reset state using a current that is below the saturation current over a suitable time to achieve the reset state (Reply Br. 1-3). Principal Issue on Appeal Did the Examiner err in rejecting claims 1, 2, 5, 6, and 10-12 as being anticipated, and claims 3, 4, 7-9, and 13-25 as being obvious, because Lee fails to disclose “programming a phase change memory element to a reset state with a current less than the saturated current of the memory element,” as set forth in representative claim 1? ANALYSIS We have reviewed the Examiner’s rejections in light of Appellant’s arguments in the Appeal Brief (App. Br. 10-11) and Reply Brief (Reply Br. 1-3) that the Examiner has erred. We disagree with Appellant’s conclusions. We adopt as our own (1) the findings and reasons set forth by the Examiner in the action from which this appeal is taken, and (2) the reasons set forth by the Examiner in the Examiner’s Answer (Ans. 4-14) in response to Appellant’s Appeal Brief. We concur with the conclusions reached by the Examiner, and highlight and emphasize certain arguments and findings with regard to Lee as follows. Lee’s paragraphs [0054] and [0055] describe the operation of a phase change memory element as follows: [0054] Initially, (a) started from the reset state (where an initial resistance was about 10.86 kΩ) by applying a current Appeal 2011-002873 Application 11/300,819 6 of 100 µA for a period of about 50 nanoseconds. In the current range of 30 µA to 50 µA, the resistance markedly decreased to 4 kΩ or lower. Thus, the phase-change memory cell transited from the reset state to the set state in the current range of 30 µA to 50 µA. That is, the set current Iset can be selected in the range of 30 µA to 50 µA. [0055] Also, (b) represents a phase-change memory cell, which was initially in the set state (where the resistance was slightly higher than 4 kΩ). As the current increased above 60 µA, the resistance increased. When the current reached about 100 µA, the resistance was saturated. Accordingly, the phase-change memory cell transited from the set state to the reset state when the current was about 60 µA or higher, and a stable reset current Ireset of about 100 µA can be selected. (Lee, ¶¶ [0054] and [0055] (underlined emphasis added)). Lee’s paragraph [0055] clearly discloses the subject matter of representative claim 1, including the feature of programming a phase change memory element to a reset state using a current (in Lee, the reset current is 60µA or higher) which is less than the saturated current of the memory element (in Lee, ¶ [0055] discloses that the saturated current is 100µA). Appellant’s attempt to assert that Lee uses a 100µA reset current is not persuasive in view of Lee’s disclosure in paragraph [0055]. Appellant’s arguments that Lee teaches away from the claimed invention (App. Br. 10; Reply Br. 2) have no merit because “‘teaching away’ is irrelevant to anticipation.” Leggett & Platt, Inc. v. VUTEk, Inc., 537 F.3d 1349, 1356 (Fed. Cir. 2008) (citation omitted). Although a teaching away argument would be relevant to an obviousness analysis, “whether a reference ‘teaches away’ from [an] invention is inapplicable to an anticipation Appeal 2011-002873 Application 11/300,819 7 analysis.” Celeritas Techs., Ltd. v. Rockwell Int’l Corp., 150 F.3d 1354, 1361 (Fed. Cir. 1998) (citation omitted). In view of the foregoing, Appellant’s arguments that Lee does not teach “programming a phase change memory element to a reset state with a current less than the saturated current of the memory element,” as set forth in representative claim 1 are not convincing. In light of the Examiner’s findings and reasoning, as set forth in the Answer, Appellant’s remaining arguments regarding claims 2-25 are no more persuasive than the arguments addressed above with respect to claim 1. Because we agree with the Examiner (Ans. 4-5 and 13-14) that Lee discloses “programming a phase change memory element to a reset state with a current less than the saturated current of the memory element,” as set forth in representative claim 1, and similarly recited in independent claims 13 and 19, we sustain the Examiner’s anticipation and obviousness rejections of claims 1-25 relying on Lee (US 2004/0202071 A1). CONCLUSIONS (1) The Examiner did not err in rejecting claims 1, 2, 5, 6, and 10-12 as being anticipated under 35 U.S.C. § 102(b) as anticipated by Lee (US 2004/0202017 A1). (2) The Examiner did not err in rejecting claims 3, 4, 7-9, and 13-25 as being unpatentable under 35 U.S.C. § 103(a). (3) Claims 1-25 are not patentable. DECISION The Examiner’s rejections of claims 1-25 are affirmed. Appeal 2011-002873 Application 11/300,819 8 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). 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