Ex Parte Park et alDownload PDFPatent Trial and Appeal BoardDec 6, 201613241419 (P.T.A.B. Dec. 6, 2016) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 13/241,419 09/23/2011 Dong-Won PARK P4449US00 7459 58027 7590 12/08/2016 H.C. PARK & ASSOCIATES, PLC 1894 PRESTON WHITE DRIVE RESTON, VA 20191 EXAMINER LIN, HANG ART UNIT PAPER NUMBER 2696 NOTIFICATION DATE DELIVERY MODE 12/08/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): PATENT@PARK-LAW.COM PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte DONG-WON PARK, BONG-HYUN YOU, JAE-SUNG BAE, and JAI-HYUN KOH Appeal 2016-001975 Application 13/241,419 Technology Center 2600 Before ALLEN R. MacDONALD, JOHN P. PINKERTON, and GARTH D. BAER, Administrative Patent Judges. MacDONALD, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF CASE Appellants appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 1—21. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Appeal 2016-001975 Application 13/241,419 Exemplary Claim Exemplary claim 1 under appeal reads as follows (emphasis added): 1. A method of driving a display panel, the method comprising: providing a first dock signal having a first frequency based on a master clock signal; providing a data signal of an N-th frame image to the display panel using the first clock signal, wherein N is a natural number; providing a second clock signal having a second frequency, the second frequency being different from the first frequency, and providing a data signal of an (N+l)-th frame image to the display panel using the second clock signal, wherein one of the first and second frequencies is greater than a frequency of the master clock signal, and the other of the first and second frequencies is smaller than the frequency of the master clock signal. Rejection on Appeal The Examiner rejected claims 1—21 under 35 U.S.C. § 103(a) as being unpatentable over the combination of Chao (US 2012/0019514 Al; pub. Jan. 26, 2012), Yoshida (US 2007/0279359 Al; pub. Dec. 6, 2007), Hartog (US 6,184,905 Bl; pub. Feb. 6, 2001), and Murray (US 2011/0234287 Al; Sept. 29, 2011).* 1 1 The patentability of claims 2—21 is not separately argued from that of claim 1. See Appeal Br. 6—9. Except for our ultimate decision, claims 2—21 are not discussed further herein. 2 Appeal 2016-001975 Application 13/241,419 Appellants ’ Contentions 1. Appellants contend that the Examiner erred in rejecting claim 1 under 35 U.S.C. § 103(a) because: Chao merely discloses a black period DP2 and a normal period DPI that is shorter than the black period DP2. Paragraph [0102] of Yoshida merely states that “the shorter the length of one frame period is, the higher the operating frequency of a peripheral driving circuit becomes.” . . .[T]here is nothing in Yoshida suggesting data signals associated with the N-th and (N+l)-th frames are provided using different clock signals having different frequencies. Paragraph [0102] of Yoshida goes on to state that, “it is preferable that the length of one frame period be in a range of 1/120 sec to 1/60 sec.” Thus, Yoshida merely provides a suggested frame length range. Yoshida does not teach or suggest frame lengths for N-th and (N+l)-th frames. Yoshida does not teach or suggest first and second frequencies. Yoshida does not teach first and second clock signals having first and second frequencies that are different. Additionally, in paragraph [0102], it is clear that Yoshida is referring to “one frame period” (“length of one frame period . . . the shorter the length of one frame period... length of one frame period be in a range of... ”).. . . FIGS. 1 and 2 of Yoshida show a single frame divided into two subframes SF. If a frame is shortened, it has the consequence of shortening both the subframes SF, but the lengths of the subframes relative to each other remain the same. Therefore, the frequency in Yoshida is applied to frames as a unit and not subframes individually. Thus, Yoshida cannot possibly teach a first and a second clock signal, each having a different frequency, as claimed by the Applicants, since their length is determined by a single frequency, that of the entire frame. It is further noted that Yoshida is completely silent regarding differences in the periods of overall frames. Therefore, if the teachings of Yoshida were applied to Chao, the result would be that both frame periods PF1 and PF2 would be shortened. This would not create the effect that the Office 3 Appeal 2016-001975 Application 13/241,419 Action cites as motivating the combination of Chao and Yoshida. Since the entirety of frame periods PF1 and PF2 is shorter, the display time of the black frame would be shorter, but this would not increase write-in time, since the display time would also be a shorter period. In any case, because PF1 of Chao is an undefined length (merely a frame period), dividing the length in half would have no effect, let alone a beneficial one, on the operating principal of Chao. [In Chao’s] first display period DPI, the pixels are driven row- by-row. In the second display period DP2 of Chao, however, since the shortest writing-in time is essential, multiple rows of pixels are simultaneously turned on or all of the pixels are turned on at the same time. In this manner, Chao discloses how the second display period DP2 is significantly reduced compared to the first display period DP 1; that is, by turning on multiple rows of pixels simultaneously or all of the pixels at the same time. Even given Yoshida’s paragraph [0102], Chao explicitly teaches a preferred method to accomplish the shortest writing- in time. Assuming arguendo, Yoshida teaches a clock frequency, a person having skill in the art would have no motivation to use a clock frequency since there is no indication of how to integrate it and there is no reason disclosed to do so in order to reach Applicant’s claimed feature. That is, Yoshida and Chao do not disclose, suggest, or render obvious a data signal of an N-th frame image and a data signal of an (N+l)- th frame image generated using first and second clock signals having different frequencies so that a duration of the N-th frame and a duration of the (N+l)-th frame may be different from each other, as claimed in claim 1 and similarly in claim 11. Appeal Br. 7—9, Appellants’ emphasis and citations omitted, panel’s emphasis added. 2. In the Reply Brief, further as to above contention 1, Appellants also contend that the Examiner erred in rejecting claim 1 under 35 U.S.C. § 103(a) because: 4 Appeal 2016-001975 Application 13/241,419 The entirety of the Examiner’s argument is based on Yoshida's disclosure in paragraph [0102] that “the shorter the length of one frame period is, the higher the operating frequency” being combined with the disclosure of Chao. However, the Examiner has erred since it is impermissibly conclusory to state that Yoshida’s disclosure, when combined with Chao, would lead one having skill in the art to the claimed subject matter. That is, there is nothing in Chao or Yoshida, to support the Examiner’s conclusion. Chao merely teaches a sequence of a first display period (DPI) and a second display period DP2 within one frame period (FIG. 2). As illustrated in FIG. 2 and explained in paragraph [0029] of Chao, the frame period PF1 of the left eye and the frame period PF2 of the right eye do not appear to involve any difference in frame periods. As for the different display periods DPI and DP2 within a frame period, as a whole Chao teaches use of a time compensation unit 117, not two different clock signals as claimed. Similarly, despite disclosing the “length of one frame period be in a range of 1/120 sec to 1/60 sec” in paragraph [0102] of Yoshida, as a whole nothing in Yoshida suggests that frame periods be different or driven by separate clock signals. Thus, neither Chao nor Yoshida provide or suggest any means of providing the display of Chao with a first clock signal having a first frequency and a second clock signal having a second frequency. More specifically, neither Chao nor Yoshida provide or suggest any means of providing the display of Chao with, “a first clock signal having a first frequency and a second clock signal having a second frequency different from the first frequency, and to provide a data signal of an N-th frame image to the display panel using the first clock signal and a data signal of an (N+l)-th frame image to the display panel using the second clock signal, wherein N is a natural number” as claimed by Applicants. Neither Chao nor Yoshida provide or suggest any means of providing the display of Chao with a first clock signal having a first frequency and a second clock signal having a second 5 Appeal 2016-001975 Application 13/241,419 frequency. Although the Examiner alleges that, “it would show that there are two different clocks with two different frequencies,” this is impermissibly conclusory and lacks any basis in the prior art. Yoshida only refers to the frequency of a single frame being shortened, and never discloses that a subframe should be shortened. Applying the teachings of Yoshida to Chao in the manner set forth by the Examiner ... would render Chao impermissibly inoperable for its intended use as set forth in MPEP §2143.01. [T]he Examiner’s impermissibly conclusory combination of Chao and Yoshida... results in a non-functioning display. Reply Br. 3—6, Appellants’ emphasis and citations omitted, panel’s emphasis added. Issue on Appeal Did the Examiner err in rejecting claim 1 as being obvious? ANALYSIS We have reviewed the Examiner’s rejections in light of Appellants’ arguments that the Examiner has erred. We disagree with Appellants’ conclusions. Except as noted herein, we adopt as our own: (1) the findings and reasons set forth by the Examiner in the action from which the appeal is taken (Final Act. 2—22); and (2) the reasons set forth by the Examiner in the Examiner’s Answer (Ans. 2—7) in response to the Appellants’ Appeal Brief. 6 Appeal 2016-001975 Application 13/241,419 We concur with the conclusions reached by the Examiner. We highlight the following. As to Appellants’ above contentions 1 and 2, we are not persuaded the Examiner erred. We agree with the Examiner that Chao teaches providing first display data to a three-dimensional (“3D”) display (i.e., “first display period”), and further teaches providing second display data to the 3D display (i.e., “second display period”), and thus, Chao teaches “providing a data signal of an N-th frame image to the display panel,” and “providing a data signal of an (N+l)th frame image to the display panel.” See Final Act. 3; see also Ans. 3. We further agree with the Examiner that Chao teaches that a length of the second display period is significantly shorter than a length of the first display period. See Ans. 3 (citing Chao 17); see also Chao 37 (“the second display period DP2 can be far shorter than the first display period DPI”). We also agree with the Examiner that Yoshida teaches shortening a length of a frame period by increasing an operating frequency of a peripheral driving circuit. See Final Act. 4; see also Ans. 3. Thus, we agree it would have been obvious to one of ordinary skill in the art to modify the 3D display system taught by Chao to generate the first and second display periods using two clock signals with different frequencies based on the teaching of Yoshida. See Final Act. 4—5; see also Ans. 3^4. Further, regarding Appellants’ argument that Yoshida fails to teach providing different clocks signals having different frequencies and further providing data signals of an N-th frame image and an (N+l)th frame image using the different clock signals, we agree with the Examiner that the argument attacks the references individually, rather than the combination of references. See Ans. 3. It is well established that one cannot show non- 7 Appeal 2016-001975 Application 13/241,419 obviousness by attacking references individually where the rejection is based upon the teachings of a combination of references. See In re Merck & Co., 800 F.2d 1091, 1097 (Fed. Cir. 1986); see also In re Keller 642 F.2d413, 425 (CCPA 1981). As Appellants’ argument does not address the actual reasoning of the Examiner’s rejection, we do not find it persuasive. Even further, regarding Appellants’ argument that Yoshida’s frequency only applies to frames as a unit, rather than subframes individually, and that modifying Chao based on the teaching of Yoshida would only reduce the overall frame period, rather than the individual display period, we also do not find this argument persuasive. “[A] determination of obviousness based on teachings from multiple references does not require an actual, physical substitution of elements.” In re Mouttet, 686 F. 3d 1322, 1332 (Fed. Cir. 2012) (citations omitted). Nor is the test for obviousness whether a secondary reference’s features can be bodily incorporated into the structure of the primary reference. In re Keller, 642 F.2d 413, 425. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. Id. Appellants have not provided sufficient evidence or technical reasoning to demonstrate that modifying the teaching of Yoshida to provide data signals for individual display periods, rather than overall frame periods, using different clock signals having different frequencies would be beyond the skill of a person of ordinary skill in the relevant art. Regarding Appellants’ argument that a person having skill in the art would have no motivation to use a clock frequency since there is no indication of how to integrate the clock frequency with the teaching of Chao and there is no reason disclosed to do so in order to reach the features of 8 Appeal 2016-001975 Application 13/241,419 claim 1, we also do not find this argument persuasive. This argument overlooks paragraphs 379—381 of Yoshida, which teach a control circuit that generates clocks to be supplied to a data line driver, where the data line driver receives image data in accordance with a clock signal and a timing pulse supplied from the control circuit, and outputs data voltage accordingly. See Yoshida 11379-381. We have considered Appellants’ other arguments, and we do not find them persuasive either. Accordingly, we sustain the rejection of claim 1. CONCLUSIONS (1) The Examiner has not erred in rejecting claims 1—21 as being unpatentable under 35 U.S.C. § 103(a). (2) Claims 1—21 are not patentable. DECISION We affirm the Examiner’s rejections of claims 1—21 as being unpatentable under 35 U.S.C. § 103(a). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED 9 Copy with citationCopy as parenthetical citation