Ex Parte Pagaila et alDownload PDFPatent Trial and Appeal BoardSep 29, 201612870681 (P.T.A.B. Sep. 29, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 12/870,681 08/27/2010 112165 7590 10/03/2016 STATS ChipPAC/PATENTLAWGROUP: Atkins and Associates, P.C. 55 N. Arizona Place, Suite 104 Chandler, AZ 85225 FIRST NAMED INVENTOR Reza A. Pagaila UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 2515.0237 1308 EXAMINER STARK, JARRETT J ART UNIT PAPER NUMBER 2823 NOTIFICATION DATE DELIVERY MODE 10/03/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): main@plgaz.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte REZA A. P AGAILA, Y AOJIAN LIN, and JUN MO KOO Appeal2014-003152 Application 12/870,681 1 Technology Center 2800 Before ADRIENE LEPIANE HANLON, CATHERINE Q. TIMM, and JAMES C. HOUSEL, Administrative Patent Judges. HOUSEL, Administrative Patent Judge. DECISION ON APPEAL Pursuant to 35 U.S.C. § 134(a), Appellants appeal from the Examiner's decision finally rejecting claims 1-20 and 26-44. We have jurisdiction over the appeal under 35 U.S.C. § 6(b ). We AFFIRM. 2 STATEMENT OF THE CASE 1 According to Appellants, the real party in interest is ST ATS ChipP AC, Ltd. App. Br. 1. 2 Our decision refers to Appellants' Specification (Spec.) filed August 27, 2010, the Examiner's Final Office Action (Final Act.) mailed April 5, 2013, Appellants' Appeal Brief (Appeal Br.) filed September 3, 2013, and the Examiner's Answer (Ans.) mailed November 13, 2013. Appeal2014-003152 Application 12/870,681 The invention relates to a methods of forming a leadframe as a vertical interconnect structure between stacked semiconductor die. Spec. i-f 1. Appellants' Figure 7i is reproduced below: i L----"·~---- FIG. 7i Appellants' Figure 7i depicting a cross section of stacked dies. The method includes providing a leadframe having a plurality of conductive leads 154 and bodies 156 extending from the conductive leads and mounting the leadframe to a carrier 140 on which a plurality of first semiconductor dies 124 are mounted with the conductive leads disposed over the first semiconductor dies and the bodies disposed around the first semiconductor dies. 3 Spec. i-f 12. A plurality of second semiconductor dies 160 may then be mounted over the leadframe, after which an encapsulant 170 is deposited over the first and second semiconductor dies. Spec. i-f 11. Then the carrier 140 is removed, an interconnect structure is formed over the encapsulant electrically connected to the bodies of the leadframe, and the stacked dies are singulated. Id. Claim 1, reproduced below from the Claims Appendix to Appellants' Brief, is illustrative of the subject matter on appeal: 1. A method of making a semiconductor device, comprising: 3 Throughout this Opinion, for clarity, we present labels to elements in figures in bold font, regardless of their presentation in the original document. 2 Appeal2014-003152 Application 12/870,681 providing a plurality of first semiconductor die; providing a substrate including a plurality of conductive leads and conductive bodies respectively extending from the conductive leads; disposing the substrate over the first semiconductor die including a portion of the conductive leads of the substrate mounted to the first semiconductor die; disposing a plurality of second semiconductor die over the substrate including an active surface of the second semiconductor die oriented toward and electrically connected to the portion of the conductive leads mounted to the first semiconductor die; and depositing an encapsulant over the first and second semiconductor die. 26. A method of making a semiconductor device, comprising: providing a first semiconductor die; providing a substrate including a continuous conductive lead and body extending from the continuous conductive lead; and mounting a portion of the continuous conductive lead to the first semiconductor die with the body disposed around the first semiconductor die. The Rejections The Examiner maintains, and Appellants request review of, the following grounds of rejection: 3 Appeal2014-003152 Application 12/870,681 A. Claims 26-30 under 35 U.S.C. § 102(b) (pre-AIA) as anticipated by LiU" 4 ' B. Claims 1-3, 8-11, 14--20, 26-31, 37, and 39 under 35 U.S.C. § 103(a) as unpatentable over Fuergut5 in view of Do '402, 6 Ma,7 and Liu; 8 C. Claims 4, 35, 38, and 43 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, further in view of Wang; 9 D. Claims 5, 36, and 44 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, further in view of Kim· 1° ' E. Claims 6, 13, 32, and 40 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, further in view of Chu· 11 ' F. Claims 7, 34, and 42 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, further in view of Do '401·12 and ' G. Claims 12, 33, and 41 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, further in view of Tsubosaki. 13 4 Liu et al., US 2009/0212405 Al, published August 27, 2009 ("Liu"). 5 Fuergut et al., US 2006/0125042 Al, published June 15, 2006 ("Fuergut"). 6 Do et al., US 2009/0224402 Al, published September 10, 2009 ("Do '402"). 7 Ma et al., US 5,677,567, issued October 14, 1997 ("Ma"). 8 We note in the Examiner's statement of rejection B covering all of the pending independent claims, Liu was not included. However, in the body of this rejection, the Examiner made findings regarding Liu's teachings in support of conclusions of obviousness. Final Act. 6-8. Moreover, the Examiner's statements of rejections C---G covering dependent claims each include Liu. Final Act. 8-10, 12-13. Appellants do not argue Liu in any of rejections B---G. Accordingly, we hold the apparent inadvertent omission of 4 Appeal2014-003152 Application 12/870,681 ANALYSIS Rejection A: Anticipation of claims 26-30 by Liu With respect to the Examiner's rejection of claims 26-30 under 35 U.S.C. § 102(b) as being anticipated by Liu, we need only review the rejection of claim 26. Claim 26 is reproduced below from the Claims Appendix to Appellants' Brief, with the limitations at issue italicized: 26. A method of making a semiconductor device, comprising: providing a first semiconductor die; providing a substrate including a continuous conductive lead and body extending from the continuous conductive lead; and mounting a portion of the continuous conductive lead to the first semiconductor die with the body disposed around the first semiconductor die. The Examiner found that Liu discloses a method of making a semiconductor device comprising providing first semiconductor dies 112, 114 and a substrate 116; 118 with a continuous conductive lead and body extending therefrom, and mounting a portion of the continuous conductive lead over the first semiconductor dies. Final Act. 3, citing Liu Figs. 6, 12, 15, 16, 20, 21. Figure 6 of Liu is reproduced below: Liu from the statement of rejection B to be harmless error. As such, we have included Liu in the statement of rejection B. 9 Wang et al., US 2005/0156296 Al, published July 21, 2005 ("Wang"). 1° Kim, US 5,939,779, issued August 17, 1999. 11 Chu et al., US 2005/0082656 Al, published April 21, 2005 ("Chu"). 12 Do et al., US 2009/0212401 Al, published August 27, 2009 ("Do '401"). 13 Tsubosaki et al., US 2003/0162326 Al, published August 28, 2003 ("Tsubosaki"). 5 Appeal2014-003152 Application 12/870,681 120 Figure 6 of Liu depicting a schematic exploded view of stacked dies. Appellants contend, inter alia, that Liu fails to teach a conductive body extending from a continuous conductive lead that is mounted over the die with the body disposed around the die. Br. 28. In response, the Examiner reproduced Liu's Figures 11 and 20, annotated to clearly indicate those structures corresponding to the continuous conductive lead and body extending therefrom. Ans. 4--5; designating the extending body by an arrow to leads 142 in Figure 11, and an arrow to leads 232 in Figure 20. The Examiner found that these figures "explicitly show a plurality of continuous leadframe with a source lead and a plurality of bodies extending from the lead such that the body is capable of extending around at least one side of the die." Ans. 3. The dispositive issue before us on appeal of this rejection is whether the Examiner reversibly erred in finding Liu's source leads 142 extend from the continuous conductive lead and are disposed around the first 6 Appeal2014-003152 Application 12/870,681 semiconductor die 112, 114. We answer this question in the affirmative and, therefore, will not sustain the Examiner's anticipation rejection. Anticipation is established when a single prior art reference discloses all features of the claimed invention. In re Spada, 911 F.2d 705, 708 (Fed. Cir. 1990); Celeritas Techs., Ltd. v. Rockwell Int'! Corp., 150 F.3d 1354, 1361 (Fed. Cir. 1998) (A claim is anticipated only where "each and every limitation is found either expressly or inherently in a single prior art reference.") All words of a claim are to be given weight when evaluating patentability. In re Wilder, 429 F.2d 447, 450 (CCPA 1970) ("[E]very limitation positively recited in a claim must be given effect in order to determine what subject matter that claim defines."); In re Wilson, 424 F.2d 1382, 1385 (CCPA 1970) ("All words in a claim must be considered in judging the patentability of the claim against the prior art."). In order to determine whether the Examiner erred in finding Liu's ieads 142, 232 are bodies within the context of ciaim 26, we must determine if these bodies extend from a continuous conductive lead and, when the lead is mounted over the first semiconductor die, are disposed around the die as required by this claim. "[N]ot unlike a determination of infringement, a determination of anticipation, as well as obviousness, involves two steps. First is construing the claim, ... followed by, in the case of anticipation or obviousness, a comparison of the construed claim to the prior art." Key Pharms. v. Hereon Labs. Corp., 161 F.3d 709, 714 (Fed. Cir. 1998). We note in this regard that Appellants do not advance any special meaning to "disposed around the die." The Examiner apparently considered that this limitation is met by disposed "at least around one side of the die." See Ans. 3. It is therefore necessary for us to construe the phrase "disposed around" 7 Appeal2014-003152 Application 12/870,681 to determine if the Examiner's finding regarding Liu's bodies as identified by the Examiner is in error. [A ]s an initial matter, the PTO applies to the verbiage of the proposed claims the broadest reasonable meaning of the words in their ordinary usage as they would be understood by one of ordinary skill in the art, taking into account whatever enlightenment by way of definitions or otherwise that may be afforded by the written description contained in the applicant's specification. In re Morris, 127 F.3d 1048, 1054 (Fed. Cir. 1997). We find "around" is ordinarily defined to mean "about; on all sides; encircling; encompassing." See http://www.dictionary.com/browse/around, last visited May 25, 2016. As such, we construe "disposed around" to mean "disposed on all sides or encircling." This construction is consistent with Appellants' Specification (Spec. i-f 41 ("to position bodies 156 around a perimeter of semiconductor die 124"); i-f 49 ("with conductive pillars 156 around a perimeter of semiconductor die 124")). We note that the Examiner's finding that Liu's leads 142, 232 are disposed at least on one side of the die fails to meet this construction. Accordingly, the Examiner has not established that Liu anticipates each and every limitation of Appellants' claim 26. It follows that we will not sustain the Examiner's Section 102 rejection over Liu. Rejection B: Obviousness of claims 1-3, 8-11, 14-20, 26-31, 37, and 39 over the combination of Fuergut, Do '402, Ma, and Liu With respect to the Examiner's rejection of claims 1-3, 8-11, 14--20, 26-31, 37, and 39 under 35 U.S.C. § 103(a) as unpatentable over Fuergut, 8 Appeal2014-003152 Application 12/870,681 Do '402, Ma, and Liu, Appellants argue each of the independent claims separately, but do not argue any of the dependent claims separately. In addition, as the Examiner noted, each of the independent claims differs from the preceding one by providing fewer limitations, i.e., claim 1 is the most comprehensive in scope, claim 8 recites the same method as claim 1 except for an encapsulation step, claim 14 recites the same method as claim 1 except for a second die disposition step, and claim 26 recites the same method as claim 1 except for both a second die disposition step and an encapsulation step. As such, Appellants' arguments with regard to each of the independent claims are substantially the same. Accordingly, our review focuses on the limitations of independent claim 1. The remaining claims will stand or fall with claim 1. Claim 1 After review of the opposing positions articulated by Appellants and the Examiner, the appiied prior art, and Appeiiants' claims and Specification disclosures, we determine that the Appellants' arguments are insufficient to identify reversible error in the Examiner's obviousness rejection of claim 1. In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011). Accordingly, we affirm the stated obviousness rejections for substantially the fact findings and the reasons set forth by the Examiner in the Examiner's Answer and the Final Office Action. We offer the following for emphasis only. The Examiner found that Fuergut discloses a method of manufacture of a semiconductor device comprising providing a plurality of first semiconductor die 24, providing a substrate leadframe having a plurality of conductive leads and conductive bodies 11 extending therefrom, disposing the leadframe over the first semiconductor die including a portion of the 9 Appeal2014-003152 Application 12/870,681 conductive leads 8 mounted to the first semiconductor die, mounting a plurality of second semiconductor die 4 over the leadframe including an active surface of the second die oriented toward and electrically connected to the portion of the leads 8 mounted to the first die, and depositing an encapsulant 26 over the first and second semiconductor die. Final Act. 4. The Examiner noted Fuergut fails to disclose forming an interconnect structure or via over the encapsulant and electrically connected to the bodies of the leadframe. Id. However, the Examiner found that Do teaches a similar process of forming stacked die packages including forming interconnects through the encapsulant to enable electrical connection between additional semiconductor die and the leadframe. Id. at 5. The Examiner concluded it would have been obvious to include such an additional step of forming an interconnect through the encapsulant in Fuergut in order to form more complex stacked devices. Id. In addition, the Examiner found Ma discloses a ieadframe with integral conductive leads to increase package density. Final Act. 6. The Examiner concluded it would have been an obvious design choice to replace the wire leads of Fuergut for conductive leads integral with the leadframe in order to increase package density and enable multi-die stacking. Id. The Examiner next found that Liu discloses a similar manufacturing process to Fuergut's, except that the lead to be mounted over the die is electrically connected to the die. Final Act. 6-7. The Examiner concluded it would have been obvious to have modified Fuergut's process to electrically connect the lead mounted over the die as taught in Liu. Id. at 7-8. Initially, we note, as did the Examiner (Ans. 6), that Appellants' arguments (Br. 9-13) challenge the references individually, whereas the 10 Appeal2014-003152 Application 12/870,681 rejection is based on a combination of the references. One cannot show nonobviousness by attacking references individually when the rejection is based on a combination of references. In re Keller, 642 F.2d 413, 425 ( CCP A 19 81). Each reference cited by the Examiner must be read, not in isolation, but for what it fairly teaches in combination with the prior art as a whole. See In re Merck & Co., Inc., 800 F.2d 1091, 1097 (Fed. Cir. 1986). Appellants argue that Fuergut fails to teach leads mounted to the first semiconductor die, and that the second semiconductor die are connected to these leads. Br. 9. Moreover, Appellants assert that the active surface of Fuergut's second semiconductor die is not oriented toward and electrically connected to the portion of the conductive leads mounted to the first semiconductor die. Id. Appellants note that Fuergut's second semiconductor die is oriented away from the leadframe which itself does not have conductive leads mounted to the first semiconductor die. Id. In response, the Examiner notes ciaim 1 fails to require that the conductive structure be in direct contact with the top surface of the first die as Appellants' argument implies. Ans. 7. We agree. Claim 1 merely requires that a portion of the conductive leads be mounted to the first die, without specifying or requiring how this mounting occurs, whether direct or indirect. In view of this interpretation, the Examiner finds that Fuergut's conductive structure is mounted to the first dies because this structure is physically attached to the first dies via the encapsulant and the lower substrate. Id. Appellants fail to challenge the Examiner's finding in this regard. Further, while not necessary given this claim construction, the Examiner also notes that Do '402 physically and electrically connects an 11 Appeal2014-003152 Application 12/870,681 overlying conductive structure to an underlying first die. Id. at 8. The Examiner further notes that Ma also provides support for electrically connecting conductive leads to first dies, thereby further reinforcing the conclusion of obviousness. Id. at 9--10. The Examiner concludes that it would have been obvious to mount Fuergut's conductive structure over the first dies so as to be physically and electrically connected together as Do '402 and Ma teach. Id. at 8, 10. Again, Appellants fail to challenge either of these findings or obviousness conclusion. As for Appellants' argument that Fuergut fails to teach the active surface of the second dies are oriented toward and electrically connected to the portion of the conductive leads mounted to the first dies, we note that Fuergut teaches conductive leads electrically connected to the top (active surface) of the second dies. Given the interpretation above that the leads are mounted to the first dies via the encapsulant, a preponderance of the evidence supports the Examiner's finding that Fuergut's active surface of the second dies are oriented toward and electrically connected to the portion of the conductive leads mounted to the first dies. In addition, while again not necessary given the above claim construction, the Examiner finds conductive structures over stacked chips (dies) were well known for electrically connecting the chips, where the active surfaces of the chips can be facing either towards or away from each other, citing Do '402 in support of this finding. Id. at 8. In particular, the Examiner finds Do '402, Figures 11 and 12, teaches both orientations of the stacked chips whose selection is based on preference and/or design constraints. Id. at 9. Moreover, the Examiner finds Ma, Figure 7, teaches the orientation where the active surface of the second die is oriented toward 12 Appeal2014-003152 Application 12/870,681 and electrically connected to the portion of the conductive leads mounted to the first die. Id. at 9--10. The Examiner concludes that it would have been obvious to select from these known alternative arrangements to modify Fuergut to provide the active second die facing toward the active surface of the first die. In re Kubin, 561F.3d1351, 1359 (Fed. Cir. 2009) (quoting KSRint'l Co. v. Teleflex, Inc., 550 U.S. 398, 421 (2007)) ("Where a skilled artisan merely pursues 'known options' from a 'finite number of identified, predictable solutions,' obviousness under§ 103 arises."); In re Gurley, 27 F.3d 551, 553 (Fed. Cir. 1994) (claimed embodiment was unpatentable based primarily on a prior art reference that disclosed two alternatives, one of which was the claimed alternative.) Appellants next argue that Do '402 does not have a substrate as recited in claim 1 because Do '402 's metal conduction layer 40 is deposited over insulating layer 38 and, therefore, cannot mechanically support itself, cannot be mounted over the first semiconductor die, and requires an insulating layer for support during deposition. Br. 10. Appellants assert, in contrast, that the recited substrate can be mounted without other materials providing support. Id. In addition, Appellants urge that Do '402's metal conduction layer does not have bodies extending from conductive leads. Id. Appellants also argue that Do '402 fails to teach disposing a plurality of second semiconductor die over the substrate. Id. at 11. Appellants' arguments regarding Do '402 are not persuasive of reversible error. We first note that Appellants' attempt to distinguish Do '402 from the claimed method fails to address the combination of prior art teachings as the Examiner presents in the rejection. While Do '402 teaches forming a substrate or leadframe by deposition, the Examiner does not rely 13 Appeal2014-003152 Application 12/870,681 on Do '402 's deposition method for forming the substrate, but rather Do '402 's teaching that various stacked die arrangements were known to the ordinary artisan including one in which the conductive substrate extends over a first die with a second stacked die flipped over and electrically connected to the substrate. Furthermore, because claim 1 fails to recite or otherwise require that the substrate is mechanically self-supporting, Appellants' arguments are not germane. Turning to Ma, Appellants argue that Ma does not teach or suggest disposing a substrate including a plurality of conductive leads and bodies extending from the leads over first semiconductor die including a portion of the leads mounted to the die. Br. 12. Appellants assert that Ma's leadframe does not have conductive bodies extending from the conductive leads. Id. In addition, Appellants urge that Ma's leadframe is technically incompatible with Fuergut's leadframe because Fuergut's contact pillars 11 are integral to the eiectricai interconnect between the opposite facing active surfaces of the first and second semiconductor die 3, 4, whereas chip island 9 is electrically isolated from the die. Id. at 12-13. Appellants argue "that a person skilled in the art would not appreciate how to modify leadframe 22 in Fuergut based on leadframe 400 in Ma and still have the opposite facing semiconductor chips 3 and 4 connected as taught by Fuergut." Id. at 13. Appellants' arguments regarding Ma are not persuasive of reversible error. We note that Appellants' attempt to distinguish Ma from the claimed method fails to address the combination of prior art teachings as the Examiner presents in the rejection. Ma teaches disposing a second die over a leadframe, which itself is over a first die, and mounts a plurality of lead fingers to the first and second dies through bond pads. Ma, Fig. 7; 7: 1-61. 14 Appeal2014-003152 Application 12/870,681 Thus, a preponderance of the evidence supports the Examiner's findings regarding Ma. Furthermore, because claim 1 merely requires that the substrate include "conductive bodies respectively extending from the conductive leads," without specifying the form, shape, or even direction in which the bodies extend, Ma's leadframe as depicted in Figure 4 (which is the form of the leadframe for Figure 7 (Ma 7:38-39)) has conductive bodies formed by the perimeter of the leadframe. Finally, regarding Appellants' argument that Ma's leadframe is technically incompatible with that of Fuergut, we note that this argument fails to recognize the modification to Fuergut's process the Examiner proposes-to use integral conductive leads which are electrically connected to facing active surfaces of stacked dies for increased density. See Final Act. 6. Accordingly, Appellants have not identified reversible error in the Examiner's obviousness rejection over the combination ofFuergut, Do '402, Ma, and Liu. It foiiows that we win sustain the Examiner's§ 103 rejections. Rejections C-G Appellants do not advance any separate arguments directed to the additional findings of fact and conclusions of law the Examiner makes in Rejections C---G. For the reasons we discuss above, we determine that Appellants have not identified a reversible error in these further rejections. 15 Appeal2014-003152 Application 12/870,681 DECISION Upon consideration of the record, and for the reasons given above and in the Appeal Brief, the decision of the Examiner rejecting claims 26-30 under 35 U.S.C. § 102(b) as anticipated by Liu is reversed. However, for the reasons given above and in the Final Office Action and Answer, the decision of the Examiner rejecting claims 1-20 and 26-44 under 35 U.S.C. § 103(a) as unpatentable over the combination of Fuergut, Do '402, Ma, and Liu, alone or further in view of Wang, Kim, Chu, Do '401, or Tsubosaki, is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l ). AFFIRMED 16 Copy with citationCopy as parenthetical citation