Ex Parte Obradovic et al

Patent Trial and Appeal Board

Sep 9, 2016

13005892 (P.T.A.B. Sep. 9, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/005,892 01/13/2011
23494 7590 09/16/2016
TEXAS INSTRUMENTS IN CORPORA TED
P 0 BOX 655474, MIS 3999
DALLAS, TX 75265
FIRST NAMED INVENTOR
Borna Obradovic
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TI-69025 3432
EXAMINER
BROCK, ROBERTS
ART UNIT PAPER NUMBER
2128
NOTIFICATION DATE DELIVERY MODE
09/16/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte BORNA OBRADOVIC and KEITH GREEN 1
Appeal2014-007332
Application 13/005,892
Technology Center 2100
Before JASON V. MORGAN, KARA L. SZPONDOWSKI, and
JOHN R. KENNY, Administrative Patent Judges.
MORGAN, Administrative Patent Judge.
DECISION ON APPEAL
Introduction
This is an appeal under 35 U.S.C. § 134(a) from the Examiner's Final
Rejection of claims 1-10. We have jurisdiction under 35 U.S.C. § 6(b ).
We AFFIRM.
Invention
Appellants disclose a non-quasi-static model of the programming
behavior of a floating-gate metal-oxide-semiconductor (MOS) transistor.
Abstract.
1 Appellants identify Texas Instruments Incorporated, as the real party in
interest. Br. 3.
Appeal2014-007332
Application 13/005,892
Exemplary Claim
Claim 1, reproduced below with key limitations emphasized, is
representative:
1. A method of operating a computer system to simulate the
behavior of an electronic circuit including a floating-gate metal-
oxide-semiconductor (MOS) transistor, comprising the steps of:
retrieving, from a memory resource in the computer
system, a model of the electronic circuit, including models of a
plurality of circuit elements and connections among those
circuit elements;
applying initial conditions and an assigned stimulus to
nodes of the model of the electronic circuit, including the
floating-gate MOS transistor;
evaluating a body current for the floating-gate MOS
transistor as a function of voltages applied to its terminals
responsive to the applying step;
generating a non-quasi-static representation of gate
injection current to the floating gate of the floating-gate MOS
transistor responsive to the evaluated body current;
evaluating trapped charge at the floating gate based on
the gate injection current over a time variable; and
generating a simulation output based on the evaluated
trapped charge.
Rejections
The Examiner rejects claims 1, 5, 6, and 10 under 35 U.S.C. § 103(a)
as being unpatentable over Miura (US 2008/0244477 Al; Oct. 2, 2008) and
Esther Rodriguez-Villegas, Low Power and Low Voltage Circuit Design
with the FGMOS Transistor, IEE Circuits, Devices, and Systems Series, The
Institute of Engineering and Technology, London, United Kingdom (2006)
("Rodriguez-Villegas"). Final Act. 2-12.
2
Appeal2014-007332
Application 13/005,892
The Examiner rejects claims 2--4 and 7-9 under 35 U.S.C. § 103(a) as
being unpatentable over Miura, Rodriguez-Villegas, and Mohan V. Dunga et
al., BSIM4.6.0 MOSFET Model- User's Manual, Univ. of California,
Berkeley, available at http://www-device.eecs.berkeley.edu/bsim/Files/
BSIM4/BSIM460/doc/BSIM460_Manual.pdf (2006) ("Dunga"). Final Act.
12-21.
ISSUE
Did the Examiner err in finding the combination of Miura and
Rodriguez-Villegas teaches or suggests "generating a non-quasi-static
representation of gate injection current to the floating gate of the floating-
gate MOS transistor responsive to the evaluated body current," as recited in
claim 1?
ANALYSIS
We agree with and adopt as our own the Examiner's findings of facts
and conclusions as set forth in the Answer and in the Action from which this
appeal was taken. We have considered Appellants' arguments, but do not
find them persuasive of error. We provide the following explanation for
emphasis.
In rejecting claim 1, the Examiner finds that Miura's non-quasi-static
(NSQ) calculation and return of a conduction current and a transient electric
charge of each electrode to circuit simulator 11 and the saving of metal-
oxide-semiconductor field-effect transistor (MOSFET) circuit characteristics
teaches or suggests generating a non-quasi-static representation of a gate
injection current to the gate of an MOS transistor responsive to an evaluated
substrate. Final Act 4 (citing Miura i-f 308); see also Ans. 3 (citing Miura
Fig. 31 ). The Examiner relies on the Rodriguez-Villegas simulation of a
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Appeal2014-007332
Application 13/005,892
floating gate MOS (FGMOS) transistor to teach or suggest the gate of the
MOS transistor being a floating-gate of a floating-gate MOS transistor.
Final Act. 5 (citing Rodriguez-Villegas § 2.1 ).
Appellants contend the Examiner erred because Miura merely
"teaches modeling the behavior of a carrier passing through a channel ... of
a MOSFET." Br. 10 (citing Miura i-fi-f 6, 209-10, 212, 214, 218, 308, 311,
323, Figs. 1, 32A, and 35A). In particular, Appellants argue:
the NQS calculation taught in paragraph 0308 of Miura (see
paragraph 0221 of Miura) is the NQS of the channel current
(e.g. the finite time that carriers in the MOSFET channel need
to reach the quasi-static configuration; see paragraphs 0209 and
0214-0221) but not the current injection into the floating gate
that is specifically define in the Specification as m · V'(t) + k
(paragraph 0048; see also paragraphs 0044-004 7).
Br. 11.
Appellants further contend Rodriguez-Villegas does not cure the
alleged deficiency of Miura because "the cited performing [of] 'accurate
simulations of circuits containing FGMOS devices' is not enabling to one
skilled in the art of how to generate a[ n] NQS representation of charge
injection into the floating gate of a[n] FGMOS." Br. 12.
Appellants' arguments are unpersuasive because the Examiner relies
on Miura's NQS calculation (i.e., the generation of an NQS representation)
in combination with the Rodriguez-Villegas FGMOS simulation to teach or
suggest the disputed recitation. Appellants' arguments, which attack Miura
as not having an FGMOS and Rodriguez-Villegas as not having an NQS
representation, are not responsive to the Examiner's rejection, and are
therefore unpersuasive.
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Application 13/005,892
Appellants further argue that Miura's description of a gate charge Qa
as being represented by a sum of channel charge Qc and a substrate charge
QB teaches away from the claimed invention. Br. 11. However, Appellants'
argument fails to show that Miura criticizes, discredits, or otherwise
discourages the claimed invention, particularly given that the portion of
Miura cited by Appellants relates to charge, not current. See Ans. 5 (citing,
e.g., Miura i-f 20).
For these reasons, we agree with the Examiner that the combination of
Miura and Rodriguez-Villegas teaches or suggests "generating a non-quasi-
static representation of gate injection current to the floating gate of the
floating-gate MOS transistor responsive to the evaluated body current," as
recited in claim 1.
Accordingly, we sustain the Examiner's 35 U.S.C. § 103(a) rejection
of claim 1.
Appellants purport that claims 5, 6, and 10--having additional
recitations-are separately patentable. Br. 12-18. However, closer review
of Appellants' arguments with respect to the Examiner's rejections of these
claims reveals that each argument relies on the contention that Miura and
Rodriguez-Villegas are deficient in the manner argued with respect to claim
1. Because Miura and Rodriguez-Villegas are not deficient, we also sustain
the Examiner's 35 U.S.C. § 103(a) rejection of claims 5, 6, and 10.
Appellants further purport that claims 2--4 and 7-9, having additional
recitations, are separately patentable. Br. 18-31. However, closer review of
Appellants' arguments with respect to the Examiner's rejections of these
claims reveals that each argument again relies on the contention that Miura
and Rodriguez-Villegas are deficient in the manner argued with respect to
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Application 13/005,892
claim 1. Appellants further contend that Dunga does not cure the alleged
deficiency of Miura and Rodriguez-Villegas. Because Miura and
Rodriguez-Villegas are not deficient, we also sustain the Examiner's 35
U.S.C. § 103(a) rejection of claims 2--4 and 7-9.
DECISION
We affirm the Examiner's decision rejecting claims 1-10.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(±).
AFFIRMED
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