Ex Parte O et alDownload PDFPatent Trial and Appeal BoardFeb 28, 201714219136 (P.T.A.B. Feb. 28, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/219,136 03/19/2014 Kathryn M. O'Brien YOR920130913US1 3545 48915 7590 03/02/2017 TANTOR TOT RTTRN T T P-TRM YORKTOWN EXAMINER 20 Church Street WARREN, TRACY A 22nd Floor Hartford, CT 06103 ART UNIT PAPER NUMBER 2131 NOTIFICATION DATE DELIVERY MODE 03/02/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): usptopatentmail@cantorcolbum.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte KATHRYN M. O’BRIEN, JOHN K. O’BRIEN, and ZEHRA N. SURA Appeal 2016-008677 Application 14/219,136 Technology Center 2100 Before CARLA M. KRIVAK, HUNG H. BUI, and JEFFREY A. STEPHENS, Administrative Patent Judges. KRIVAK, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 1—20, which are all the claims pending in the application. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Appeal 2016-008677 Application 14/219,136 STATEMENT OF THE CASE Appellants’ invention is directed to a system and method for “creating compiler-generated memory mapping hints in a computer system” using “a compiler of the computer system, to identify data access patterns in the code” (Abstract; Spec. 2, 5). Independent claim 1, reproduced below, is exemplary of the subject matter on appeal. 1. A method for creating compiler-generated memory mapping hints in a computer system, the method comprising: analyzing code, by a compiler of the computer system, to identify data access patterns in the code; accessing system configuration information defining data processing system characteristics of a target system for the code, the data processing system characteristics comprising a plurality of processing resources and memory domain characteristics of a plurality of memory domains accessible by the processing resources; selecting, by the compiler, two or more of the processing resources to execute the code as a parallel application; determining a preferred allocation of data in the memory domains of the target system based on mapping the code to the two or more selected processing resources to execute as the parallel application and mapping the data to one or more of the memory domains based on the memory domain characteristics of the memory domains accessible by the two or more selected processing resources; and storing the preferred allocation as compiler-generated memory mapping hints in a format accessible by a physical memory mapping resource of the target system. REFERENCES and REJECTION The Examiner rejected claims 1—20 under 35 U.S.C. § 103(a) based upon the teachings of Lopez-Lagunas (Abelardo Lopez-Lagunas and Sek M. 2 Appeal 2016-008677 Application 14/219,136 Chai, “Compiler Manipulation of Stream Descriptors for Data Access Optimization,” International Conference on Parallel Processing Workshops, 2006) and Stevens (US 6,289,424 Bl; issued Sept. 11, 2001) (Final Act. 3—27). ANALYSIS With respect to claim 1, Appellants contend the Examiner erred in finding Lopez-Lagunas discloses “analyzing code, by a compiler of the computer system, to identify data access patterns in the code”; rather, Lopez- Lagunas’ compiler “looks only at stream descriptors (which are not a programming code) to optimize data movement (which is not identifying data access patterns in programming code)” (App. Br. 6 (citing Lopez- Lagunas § 2,11; Spec. 1 50); see also Reply Br. 2). Appellants assert Lopez-Lagunas relies on “a programmer [to] separately defineH data access and computation in an explicit manner” in contrast to Appellants’ method— which identifies data access patterns “by the compiler itself’ and “does not rely on a programmer to explicitly identify data accesses in the form of stream descriptors” (App. Br. 7 (citing Lopez-Lagunas § 2,11)). Appellants also contend Lopez-Lagunas is silent as to “selecting, by the compiler . . . two or more processing resources” to execute the code as a parallel application, and “determining a preferred allocation of data,” as claimed (App. Br. 7). Instead, Lopez-Lagunas executes “computation kernel requirements . . . [which] cannot reasonably be read as the claimed code since requirements cannot be executed as a parallel application” (App. Br. 7 (citing Lopez-Lagunas § 2,11)). We do not agree. 3 Appeal 2016-008677 Application 14/219,136 We agree with and adopt the Examiner’s findings as our own. Particularly, we agree with the Examiner that Lopez-Lagunas’ stream descriptors are code analyzed by a compiler, as claimed (Ans. 27 (citing Lopez-Lagunas § 2,11, § 3.1; Chai Fig. 1, p. 4)).1 Lopez-Lagunas’ stream descriptors—which program stream units and data structures’ movement in memory (see Lopez-Lagunas §3.1,11; Chai p. 4)—are commensurate with the term “code” as claimed and with the broad description of “code” in Appellants’ Specification.2 Appellants’ arguments regarding “programming language code” (App. Br. 6; Reply Br. 2) are also not commensurate with the scope of the claim. The claim recites “code,” not “programming language code” (Ans. 27).3 Moreover, contrary to Appellants’ argument that Appellants’ method does not rely on a programmer (App. Br. 7), claim 1 does not preclude a programmer from defining data access patterns in code before the compiler analyzes the code for access patterns (Ans. 29). We agree with the Examiner that Lopez-Lagunas identifies data access patterns in the code as claimed because Lopez-Lagunas’ compiler identifies data and memory access patterns specified in stream descriptors’ code (Ans. 28; Final Act. 3 (citing Lopez-Lagunas § 2,11)). 1 The Chai publication (Sek M. Chai et al., “Streaming Processors for Next Generation Mobile Imaging Applications,” 2005) is incorporated in Lopez- Lagunas’ disclosure (see Lopez-Lagunas § 2, reference [11]). 2 Appellants’ Specification provides “code 130 may be a source program, object code, script, or any other entity comprising a set of instructions to be performed” (Spec. 120 (emphasis added)). 3 Appellants’ Amendment dated March 3, 2016, seeking to amend “code” to “programming language code,” was not entered (Advisory Action dated March 24, 2016). 4 Appeal 2016-008677 Application 14/219,136 We are also not persuaded by Appellants’ argument that Lopez- Lagunas is silent as to “selecting, by the compiler, two or more of the processing resources to execute the code as a parallel application” and “determining a preferred allocation of data” as claimed (App. Br. 6—7). Appellants merely assert there is no description in Lopez-Lagunas of these limitations without persuasive evidence or reasoning rebutting the Examiner’s specific findings. We agree with the Examiner that Lopez- Lagunas’ stream descriptors describe data structures “that can be processed in parallel” (see Lopez-Lagunas § 3,11; see also final Act. 4). Additionally, as recognized by the Examiner, Lopez-Lagunas’ compiler matches stream descriptors’ data structures to multiple hardware functional units (processing resources), thereby teaching the claimed “selecting, by the compiler, two or more of the processing resources to execute the code as a parallel application” as recited in claim 1 (Ans. 28 (citing Lopez-Lagunas §§ 2, 3.1); see also Lopez-Lagunas § 6 (describing processing resources/hardware accelerators selected to process red and green pixels in parallel)). In light of the broad terms recited in claim 1 and the arguments presented, Appellants have failed to clearly distinguish the claimed invention over the prior art relied on by the Examiner. Thus, we sustain the Examiner’s rejection of independent claim 1, and independent claims 8 and 14 argued for substantially the same reasons (App. Br. 5, 6, 8). We also sustain the Examiner’s rejection of dependent claims 2—7, 9-13, and 15—20 for which no substantive arguments are provided. 5 Appeal 2016-008677 Application 14/219,136 DECISION The Examiner’s decision rejecting claims 1—20 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED 6 Copy with citationCopy as parenthetical citation