Ex Parte Nguyen et al

Board of Patent Appeals and Interferences

Jul 28, 2006

10404266 (B.P.A.I. Jul. 28, 2006)

The opinion in support of the decision being entered today was not written
for publication and is not binding precedent of the Board.

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte CHINH NGUYEN, PHU HOANG and ANDY LE, PHAN HOANG
____________

Appeal No. 2006-1449
Application No. 10/404,266
____________

ON BRIEF
____________

Before HARISTON, JERRY SMITH, and BARRY, Administrative Patent Judges.
JERRY SMITH, Administrative Patent Judge.

DECISION ON APPEAL
This is a decision on the appeal under 35 U.S.C. § 134 from the examiner’s
rejection of claims 1-3, 9-11, 17-19, and 25-36, which constitute all the claims pending
in this application.
The disclosed invention pertains to stacking multiple integrated circuit (IC) devices.
Specifically, the top side of a printed circuit board (PCB) is attached to first pins of a first
device. A plurality of raised pads are disposed on the bottom side of the PCB and are
attached to upper areas of second pins of a second device to electrically connect the
first and second pins. Such a technique provides a stable and strong mechanical
Appeal No. 2006-1449
Application No. 10/404,266

2
structure and solid electrical contacts. Also, the technique is inexpensive because it
may be employed using standard soldering
processes.
Representative claim 1 is reproduced as follows:

1. An apparatus comprising:

a printed circuit board (PCB) having a top side and a
bottom side to attach to first pins of a first device to the
top side; and

a plurality of raised pads on the bottom side and
attached to upper areas of second pins of a second device to
provide electrical connections between the first pins and
the second pins.

The examiner relies on the following reference:

Burns et al. (Burns) 6,608,763 Aug. 19, 2003
(Filed September 20, 2000)

The following rejection is on appeal before us:
Claims 1-3, 9-11, 17-19, and 25-36 stand rejected under 35 U.S.C. § 102(e) as
being anticipated by Burns.
Rather than repeat the arguments of appellants or the examiner, we make
reference to the briefs and the answer for the respective details thereof.
OPINION
We have carefully considered the subject matter on appeal, the rejection
advanced by the examiner and the evidence of anticipation relied upon by the examiner
as support for the rejection. We have, likewise, reviewed and taken into consideration,
in reaching our decision, the appellants' arguments set forth in the briefs along with the
Appeal No. 2006-1449
Application No. 10/404,266

4
examiner’s rationale in support of the rejection and arguments in rebuttal set forth in the
examiner’s answer.
It is our view, after consideration of the record before us, that the disclosure of Burns
fully meets the invention as set forth in the claims on appeal. Accordingly, we affirm.
Anticipation is established only when a single prior art reference discloses,
expressly or under the principles of inherency, each and every element of a claimed
invention as well as disclosing structure which is capable of performing the recited
functional limitations. RCA Corp. v. Applied Digital Data Systems, Inc., 730 F.2d 1440,
1444, 221 USPQ 385, 388 (Fed. Cir.); cert. dismissed, 468 U.S. 1228 (1984); W.L. Gore
and Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 1554, 220 USPQ 303, 313 (Fed.
Cir. 1983), cert. denied, 469 U.S. 851 (1984). Only those arguments actually made by
appellants have been considered in this decision. Arguments which appellants could
have made but chose not to make in the briefs have not been considered and are
deemed to be waived [see 37 CFR § 41.37(c)(1)(vii)(2004)].
The examiner has indicated how the claimed invention is deemed to be fully met
by the disclosure of Burns [final rejection, pages 2 and 3]. Regarding independent
claims 1, 9, and 17, appellants argue that Burns does not disclose a plurality of raised
pads on the bottom side of the PCB as claimed [brief, page 5]. Specifically, appellants
note that lower connective elements 46 are etched traces -- not raised pads [brief,
pagers 5 and 6]. According to appellants, a trace is not a pad; therefore, Burns' etched
traces cannot constitute a raised pad as claimed [brief, pages 6 and 7].
Appeal No. 2006-1449
Application No. 10/404,266

5
In support of this distinction, appellants cite definitions of the terms "trace" and
"pad" from Electronic Design Interchange Format (EDIF) Technical Center. According
to these definitions,
"A trace is a linear conducting construct that is used for
routing a component signal on a particular conducting layer
of the bare board. It is generally of constant width and
follows a linear path…[and] is the main method used to
transport a signal from one location on the board to
another...."

"A pad is usually a small conductor object. Pads can be of
any shape, or combination of shapes. Pads may be used for
one of several different purposes, including providing a
mounting point for a terminal or jumper, providing a probe
point for a circuit tester, or providing a connection point for a
trace to a padstack.…"

[brief, ev. app.; pages 6 and 7; emphasis added]. Appellants emphasize that the
existence of two separate definitions of "trace" and "pad" evidences that a trace and pad
are structurally different [brief, page 8].
Appellants also cite a dictionary that defines "etching" as "…cut[ting] into a
surface" [brief, page 7]. Combining this definition with the EDIF definition of "trace"
above, appellants conclude that an etched trace, such as that disclosed by Burns, is a
linear conductive construct that is cut into the surface of a PCB and cannot therefore be
"raised" [brief, page 7].
The examiner responds that although Burns uses different terminology, the
conductive elements 44 and 46 in Burns constitute "pads" (i.e., bonding sites) as
understood by the skilled artisan [answer, page 3]. The examiner further notes that the
Appeal No. 2006-1449
Application No. 10/404,266

6
conductive elements are raised in view of Burns' express teaching that the elements
may rest on surfaces 45 and 47 of the PCB. According to the examiner, because the
conductive elements rest on the surface of the PCB, one surface of the conductive
element abuts the PCB surface and the opposite surface of the conductive element is
displaced away from the PCB [answer, page 5]. The examiner concludes that such
displacement constitutes a "raised pad" as claimed [id.].
Appellants argue that merely because the conductive elements rest on the PCB's
surface does not mean that the elements are raised pads [brief, pages 7 and 8].
Appellants contend that the terms "resting" and "raised" have opposite meanings in view
of their dictionary definitions: "rest" indicates "lying down or being fixed to something"
whereas "raise" indicates "moving up or to increase in size" [brief, page 8; reply brief,
page 2]. In view of these definitions, appellants contend that because the etched traces
in Burns are "pressed down" onto the surface of the PCB, such a teaching is therefore
contradictory to raising the traces (i.e., moving them up) [brief, page 9].
We will sustain the examiner's rejection of independent claims 1, 9, and 17. We
agree with the examiner that the row of connective elements 46 (i.e., etched traces) in
Burns that rest on bottom surface 47 of PCB 40 reasonably constitutes a plurality of
raised pads on the bottom side of the PCB as claimed when the term "raised pads" is
given its broadest reasonable interpretation. As the examiner indicates, because the
connective element 46 rests on the PCB's lower surface 47, it must be displaced away
from that surface at least to some extent. We agree with the examiner that such
Appeal No. 2006-1449
Application No. 10/404,266

7
displacement reasonably constitutes a "raised" trace with respect to the PCB's lower
surface.
We disagree with appellants that a trace cannot constitute a pad. Even with
appellants' definitions of "trace" and "pad," we see no reason why one cannot be a
subset of the other. That is, we see no reason why Burn's etched trace cannot also
constitute or comprise a pad, particularly in view of the electrical connection function of
Burns' trace 46. Appellants' definition of "pad" states in relevant part that "[a] pad is
usually a small conductor object" and that "[p]ads can be of any shape, or combination
of shapes" [emphasis added]. Moreover, according to the definition, "[p]ads may be
used for one of several different purposes, including providing a mounting point for a
terminal or jumper, providing a probe point for a circuit tester, or providing a connection
point for a trace to a padstack.…"
Because a pad can be any shape, nothing precludes such shape from being
linear. Also, the term "usually" in the definition of "pad" does not require that the
conductor be a small conductor object. Such terminology implies that large conductor
objects are included as well. Moreover, pads provide an electrical connection function
that, in our view, does not preclude at least a portion of a trace that provides an
electrical connection and mounting point in addition to routing signals. Notably, the
etched traces (i.e., connective elements) 46 in Burns provide such a connection and
mounting function, namely that solder 42 is applied to the trace and the lead of the
lower device (IC 14) to electrically connect the trace to the lead [see Burns, col. 4, lines
56-59; Fig. 2]. In short, we see no reason why the etched traces of Burns would not
Appeal No. 2006-1449
Application No. 10/404,266

8
reasonably constitute "pads" given the broadest reasonable interpretation of the term
and the commensurate electrical connection and mounting function that the traces 46
provide in Burns.
Furthermore, we disagree with appellants that the etched traces in Burns are cut
into the PCB. We note that Burns expressly teaches that connective elements 44 and
46 may (1) rest on surfaces 45 or 47, or (2) be embedded into those surfaces [Burns,
col. 3, line 66 - col. 4, line 1; emphasis added]. That is, embedding the traces in the
PCB's surfaces is an alternative to resting the traces on the surfaces. Furthermore, in
general, an etched conductive trace does not have to be cut into a PCB as appellants
allege. Rather, only the trace's conductive layer -- not the underlying substrate -- need
be etched to produce an etched trace. Etching only the conductive layer would, among
other things, facilitate forming the layer in a desired geometric pattern (e.g., serpentine,
linear, etc.) on the substrate.1
Appellants' argument that merely because Burns' etched trace rests on the
PCB's surface does not mean that the trace is raised is unpersuasive. Notwithstanding
the ostensibly opposite meanings of "resting" and "raised" as argued by appellants, the
traces in Burns nevertheless are displaced away from the lower surface of the PCB as
the examiner indicates. In our view, the examiner's interpretation of "raised" as
including such displacement is reasonable given the term's broadest reasonable
interpretation.

1 See, e.g., U.S. Pat. 6,020,574, col. 2, lines 49-68 and Fig. 5 (disclosing a serpentine etched trace 40).
Appeal No. 2006-1449
Application No. 10/404,266

9
The examiner's rejection of independent claims 1, 9, and 17 is therefore
sustained. Since appellants have not separately argued the patentability of dependent
claims 2, 3, 10, 11, 18, 19, 17, 28, 31, 32, 35, and 36, these claims fall with independent
claims 1, 9, and 17. See In re Nielson, 816 F.2d 1567, 1572, 2 USPQ2d 1525, 1528
(Fed. Cir. 1987). See also 37 CFR § 41.37(c)(vii).
Regarding claims 25, 26, 29, 30, 33, and 34, appellants argue that, in addition to
lacking raised pads, Burns does not disclose the various recited claimed limitations by
essentially restating the claim language [brief, page 10]. Appellants further note that the
specification provides the context of how much the pad should be raised (i.e., provide a
pedestal to shorten the distance between the upper area of the pin of the second device
to the bottom side of the PCB [brief, pages 10 and 11]. The examiner responds that
reading such a context from the specification into the claim would impermissibly import
limitations from the specification into the claims [answer, pages 6 and 7].
We will sustain the examiner's rejection of claims 25, 26, 29, 30, 33, and 34.
Regarding claims 26, 30, and 34 (reciting signal traces), apart from merely (1)
reiterating that Burns does not disclose a plurality of raised pads, and (2) restating the
claim language, appellants did not argue with any reasonable specificity how and why
the disclosure of Burns did not anticipate the claims. "A statement which merely points
out what a claim recites will not be considered an argument for separate patentability of
the claim." 37 CFR § 41.37(c)(vii). Nevertheless, we agree with the examiner that the
plated through-holes or vias 48 shown in Fig. 2 of Burns and described on col. 4, lines
Appeal No. 2006-1449
Application No. 10/404,266

10

60-65 fully meet the claimed signal trace limitations. Accordingly, we will sustain the
examiner's rejection of claims 26, 30, and 34.2

2 As an ancillary observation, we note that no antecedent basis exists for “the first solder pads" in claims
26, 30, and 34. Because the parties did not raise these issues on appeal, they are therefore not before
us. In an ex parte appeal, "the Board is basically a board of review - we review…rejections made by
patent examiners." Ex parte Gambogi, 62 USPQ2d 1209, 1211 (B.P.A.I. 2001). Consequently, we leave
the issue of whether the appellants have satisfied the requirements of MPEP 2173.05(e) to the examiner
and the appellants.
Regarding claims 25, 29, and 33 (reciting a pedestal), we find that Burns amply
teaches such a feature in Fig. 2. Initially, we note that Burns' etched traces 46 are
reasonably construed as "pedestals" when the term is given its broadest reasonable
interpretation. Turning to Burns, the etched traces have a substantially constant height
and are disposed between the bottom side of PCB 40 and the upper area of the pin of
the lower IC 14. Significantly, the pin tapers downwardly relative to the trace [see
shoulder 28]. Solder 42 is disposed between the etched traces and the upper area of
the pin. Therefore, the etched trace must have a height less than the distance between
the bottom side of the PCB and one of the upper areas of one of the second pins as
claimed. The examiner's rejection of claims 25, 29, and 33 is proper and will therefore
be sustained.
Appeal No. 2006-1449
Application No. 10/404,266

11
In summary, we have sustained the examiner's rejection with respect to all claims
on appeal. Therefore, the decision of the examiner rejecting claims 1-3, 9-11, 17-19,
and 25-36 is affirmed.
Appeal No. 2006-1449
Application No. 10/404,266

12
No time period for taking any subsequent action in connection with this appeal
may be extended under 37 CFR § 1.136(a)(1)(iv)

AFFIRMED

KENNETH W. HAIRSTON )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
JERRY SMITH ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
LANCE LEONARD BARRY )
Administrative Patent Judge )

Appeal No. 2006-1449
Application No. 10/404,266

13

JS/gw

BLAKELY SOKOLOFF TAYLOR & ZAFMAN
12400 WILSHIRE BOULEVARD 7TH FLOOR
LOS ANGELES, CA 90025-1030