Ex parte NAKAO

Board of Patent Appeals and Interferences

Jan 20, 1998

07962322 - (D) (B.P.A.I. Jan. 20, 1998)

Attorney docket no. A29171.1
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
This opinion (1) was not written for publication and
(2) is not binding precedent of the Board.
Paper No. 19
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte HIRONOBU NAKAO
____________
Appeal No. 95-0634
Application 07/962,3221
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HEARD: 12 January 1998
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Before BARRETT, LEE, and TORCZON, Administrative Patent Judges.
TORCZON, Administrative Patent Judge.
FINDINGS OF FACT AND CONCLUSIONS OF LAW
FINDINGS OF FACT
We have reviewed the record in its entirety in light of the
arguments of Appellant and the examiner. Our decision presumes
familiarity with the entire record. A preponderance of the
evidence of record supports each of the following fact findings.
A. The nature of the case
1. This is an appeal under 35 U.S.C. § 134 from the final
rejection of claim 2. (Paper 13 at 1.) No other claims are
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Application 07/962,322
pending. (Paper 9 at 1.) We affirm, but we also make a
statement pursuant to 37 CFR § 1.196(c) ("Rule 196(c)").
2. The application on appeal was filed on 15 October 1992.
Appellant claims the benefit pursuant to 35 U.S.C. § 119 of
Japanese patent application no. Hei 3-284551, filed 30 October
1991. (Paper 1, declaration at 1; Paper 6.) Rohm K.K. is the
real party in interest. (Paper 6.)
3. The application is entitled "Semiconductor memory
device with three-dimensional cluster distribution". (Paper 1
at 1.) The subject matter of the invention "relates to a
nonvolatile memory device, for example, a flash EEPROM (flash
electrically erasable programmable read-only memory), in which an
insulating film containing metal or semiconductor particles is
used in a gate of a transistor." (Paper 1 at 1.)
4. The sole claim on appeal defines the subject matter of
the invention as follows (Paper 8 at 2, emphasis added):
2. A semiconductor memory device comprising:
a silicon substrate;
an insulating layer with a predetermined
width, in which clusters of semiconductor material are
distributed in three dimensions so as to be overlapped
in a direction through the layer;
a gate region formed on an upper portion of
said insulating layer; and
a source region and a drain region formed in
spaced relation in the substrate beneath said
insulating layer;
wherein said drain region is formed by an
oblique ion implantation, and is overlapped with said
insulating film layer.
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Application 07/962,322
5. Figure 1 illustrates the claimed subject matter. The
semiconductor memory device has a substrate 1 with a source
region 5 and a drain region 6, including a portion of the
drain 6a formed beneath an insulating film 2. The insulating
film 2 has semiconducting clusters 3. A gate 4 is formed on the
insulating film 2. (Paper 1 at 4-5.)
B. The rejection
6. The examiner rejected claim 2 under 35 U.S.C. § 102 as
anticipated by the following reference:
Yamazaki et al. (Yamazaki) 3,878,549 15 April 1975
7. Yamazaki teaches a transistor-based semiconductor
memory device with semiconductor clusters or thin-films. (1:22-
29.) The examiner relies on Yamazaki's Figures 1 and 2G for the
anticipatory teachings. (Paper 9
at 2-3.) Figure 1 (right) shows a
transistor structure with a
substrate 5, a source region 14, a
drain region 16, a gate 1, and
insulating films 2 & 4 with
semiconductor clusters 3.
Yamazaki does not say how the
substrate 5, source 14, drain 16,
or gate 1 are formed. (3:11-19.)
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Application 07/962,322
Figure 2G (right) shows the gate 1 and insulating layers of an
embodiment in which one layer of semiconductor clusters 7 is
disposed over a second layer of semiconductor clusters 3,
separated by an insulating layer 6. (3:23-26.)
8. Appellant has presented two issues for review: whether
Yamazaki teaches "clusters of semiconductor material are
distributed in three dimensions so as to be overlapped in a
direction through the layer" or the "drain region is formed by an
oblique ion implantation, and is overlapped with said insulating
film layer". (Paper 14 at 8-12.) Cf. Gechter v. Davidson,
116 F.3d 1454, 1460, 43 USPQ2d 1030, 1035 (Fed. Cir. 1997)
(focussing on the contested limitations). At the hearing,
counsel confirmed our understanding that "in a direction through
the layer" is equivalent to "through the thickness of the layer",
i.e., in the vertical direction of Appellant's Figure 1. The
examiner contends that Yamazaki's 2G embodiment shows overlapping
clusters 3 & 7 and that diffusion from Yamazaki's drain 16 into
the substrate below the insulating film layer 2 would create an
overlap.
9. We find that Yamazaki teaches clusters of semiconductor
material distributed in three dimensions so as to be overlapped
through the thickness of the insulating layer. Yamazaki's
Fig. 2G embodiment discloses a two-dimensional semiconductor
cluster layer disposed over another two-dimensional semiconductor
Appeal No. 95-0634 Page 5
Application 07/962,322
cluster layer. Two different two-dimensional cluster
distributions (not in the same plane) necessarily describe a
three-dimensional cluster distribution. The placement of one
cluster layer over the other cluster layer necessarily creates an
overlap between the two cluster layers in the dimension through
the thickness of the insulating layer. Appellant does not argue,
and Yamazaki does not teach, that the geometries of the cluster
layers are such that no overlap occurs.
10. Yamazaki does not expressly disclose a portion of the
drain region beneath the insulating layer. "An anticipatory
reference, however, need not duplicate word for word what is in
the claims. Anticipation can occur when a claimed limitation is
'inherent' or otherwise implicit in the relevant reference."
Standard Havens Prods., Inc. v. Gencor Indus., Inc., 953 F.2d
1360, 1369, 21 USPQ2d 1321, 1328 (Fed. Cir. 1991). The examiner
found that "there would be some overlap of the clusters and the
drain due to the spreading of the drain caused by migration of N
type impurities in the drain during processing." (Paper 9 at 3.)
We find this explanation to be credible.
11. Once the examiner establishes a basis for inherency,
the burden shifts to appellant to prove that the prior art does
not possess that inherent characteristic. In re King, 801 F.2d
1324, 1327, 231 USPQ 136, 138-39 (Fed. Cir. 1986). Appellant has
not met this burden. Instead, Appellant notes that Yamazaki does
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Application 07/962,322
not show this characteristic (a given for an inherency finding),
accuses the examiner of speculating, and states (without support)
that one skilled in the art would conclude otherwise. The PTO is
not equipped to perform tests. King, 801 F.2d at 1327, 231 USPQ
at 139. Consequently, we must rely on applicants to provide more
than a generalized demurrer in the face of the examiner's
reasonable interpretation of the reference.
12. We agree with Appellant that Yamazaki's Figures 3A
and 3B show no transition beneath
the gate reflecting impurity
diffusion from the drain (Paper 14
at 11-12), but one would not
expect them to show any
transition. Figures 3A and 3B
(lower right) show energy band
profiles of Yamazaki's Figure 2A-
2D embodiments. (4:58-5:21.)
They depict energy bands
vertically through the transistor
from the substrate 5 to the gate 1
to show how the clusters 3 act as
a trap. They do not depict energy
bands across the substrate 5 from
the source 14 to the drain 16.
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Application 07/962,322
Consequently, whether or not Yamazaki's transistor inherently has
diffusion from the drain into the substrate, Figures 3A and 3B
would not be the place to depict that diffusion.
CONCLUSIONS OF LAW
1. During prosecution, we must interpret claims as broadly
as their terms reasonably allow. In re Zletz, 893 F.2d 319, 321,
13 USPQ2d 1320, 1322 (Fed. Cir. 1989). We do so because
applicants have the opportunity during prosecution to amend their
claims to avoid rejections. We may not interpolate limitations
from disclosed embodiments into the claims. In re Paulsen,
30 F.3d 1475, 1480, 31 USPQ2d 1671, 1674 (Fed. Cir. 1994).
2. Appellant argues that the limitation "clusters of
semiconductor material are distributed in three dimensions so as
to be overlapped in a direction through the layer" can only mean
that the clusters must be distributed "throughout" the insulating
layer. (Paper 14 at 9.) It is clear to us that Appellant
understands his invention to require cluster distribution
throughout the insulating layer. (Paper 14 at 3; Paper 1 at 3
(summary) and 4 (description of Fig. 1).) Indeed, he relies on
this understanding to distinguish Yamazaki, which he argues
teaches that clusters are not distributed through the thickness
of the insulating layer. (Paper 14 at 10, alluding to Yamazaki
2:39-42.) Claim 2, however, is not so limited. We cannot
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Application 07/962,322
reasonably read "throughout" into the claim because nothing else
in the claim requires such a reading. Paulsen, 30 F.3d at 1480,
31 USPQ2d at 1674. As we previously indicated, Yamazaki's two-
layer distribution meets the claim's requirement for an
overlapping, three-dimensional distribution.
3. Claim 2 contains a process limitation: the drain
region is formed by an oblique ion implantation. Process steps
in a product claim are limiting to the extent they further define
the structure of the claim. In re Thorpe, 777 F.2d 695, 697,
227 USPQ 964, 965-966 (Fed. Cir. 1985). As we indicated earlier,
however, the evidence of record does not support a finding that
Appellant's claimed structure would differ from Yamazaki's
inherent structure.
RULE 196(c) STATEMENT
At the hearing, we discussed with counsel the possibility of
an amendment under Rule 196(c). The addition of "throughout the
layer" after "distributed" would distinguish claim 2 from
Yamazaki. We did not identify an amendment that would solve the
drain-overlap problem, but one point of distinction would be
sufficient to overcome the rejection.
DECISION
The examiner's rejection of claim 2 is affirmed. Appellant
is entitled, however, to amend the claim as indicated, subject to
the provisions of Rule 196(c).
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Application 07/962,322
We set a time period to expire two (2) months from the date
of this decision during which Appellant may file an amendment
under Rule 196(c). No time period for taking subsequent action
in connection with this appeal may be extended under 37 CFR
§ 1.136(a). 37 CFR § 1.136(b).
AFFIRMED - RULE 196(c)
LEE E. BARRETT )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
JAMESON LEE ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
RICHARD TORCZON )
Administrative Patent Judge )
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Application 07/962,322
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