Ex Parte NairDownload PDFBoard of Patent Appeals and InterferencesFeb 23, 201211582069 (B.P.A.I. Feb. 23, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 11/582,069 10/17/2006 Balakrishnan V. Nair DP-315248 9477 22851 7590 02/23/2012 Delphi Technologies, Inc. M/C 480-410-202 P.O. Box 5052 Troy, MI 48007 EXAMINER NATALINI, JEFF WILLIAM ART UNIT PAPER NUMBER 2858 MAIL DATE DELIVERY MODE 02/23/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________________ Ex parte BALAKRISHNAN V. NAIR ____________________ Appeal 2010-000134 Application 11/582,069 Technology Center 2800 ____________________ Before HOWARD B. BLANKENSHIP, CAROLYN D. THOMAS, and DEBRA K. STEPHENS, Administrative Patent Judges. STEPHENS, Administrative Patent Judge. DECISION ON APPEAL Appeal 2010-000134 Application 11/582,069 2 Appellants appeal under 35 U.S.C. § 134(a) (2002) from a final rejection of claims 1 and 2. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. Introduction According to Appellants, the invention relates to a system and method for verifying that a capacitor has been properly installed on a circuit board by incorporating into the circuit a feedthrough capacitor having at least two internally electrically connected terminals, and testing for electrical continuity between points on the circuit electrically connected to the internally connected terminals of the feedthrough capacitor (Abstract). STATEMENT OF THE CASE Claims 1. A process for verifying the proper placement and electrical connection of a capacitor on a circuit board, comprising: providing a circuit board having mounted thereon two or more electrically connected components to define an electrical circuit, the components including at least one feedthrough capacitor having at least two internally electrically connected terminals and at least a third terminal, capacitance being present between either of the internally electrically connected terminals and the third terminal; and testing for electrical continuity between a point on the circuit electrically connected to a first of the two internally electrically connected terminals and a point on the circuit that is electrically connected to a second of the two internally electrically connected terminals of the feedthrough capacitor. 2. A process for verifying the proper placement and electrical connection of a capacitor on a circuit board, comprising: Appeal 2010-000134 Application 11/582,069 3 providing a circuit board having mounted thereon two or more electrically connected components to define an electrical circuit, the components including at least one feedthrough capacitor having at least two internally electrically connected terminals and at least a third terminal, capacitance being present between either of the internally electrically connected terminals and the third terminal; and testing for electrical continuity between a point on the circuit electrically connected to a first of the two internally electrically connected terminals and a point on the circuit that is electrically connected to a second of the two internally electrically connected terminals of the feedthrough capacitor, without testing for capacitance. Prior Art Tanaka US 6,798,730 B2 Sep. 28, 2004 Loh US 2007/0094198 A1 Apr. 29,2007 Rejections and Objections Claims 1 and 2 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Tanaka and Loh (Final Rej. 3). ISSUE 35 U.S.C. § 103(a): claims 1 and 2 Appellant asserts their invention is not obvious over Tanaka and Loh because Loh teaches a single test that checks for both connectivity and capacitance value using conventional in-circuit testing, not a test that tests for continuity through internally connected terminals of the feedthrough capacitor (App. Br. 9). Appellant further asserts the electrically conductive Appeal 2010-000134 Application 11/582,069 4 plates of a capacitor are not internally connected under normal conditions and thus, it would not have been obvious to test for continuity across the internally connected terminals of a feedthrough capacitor (Reply Br. 5-6). Issue: Has the Examiner erred in finding the combination of Tanaka and Loh would have taught or suggested “testing for electrical continuity between a point on the circuit electrically connected to a first of the two internally electrically connected terminals and a point on the circuit that is electrically connected to a second of the two internally electrically connected terminals of the feedthrough capacitor” as recited in claims 1 and 2? ANALYSIS After review of Appellant’s arguments (App. Br. 7-10; Reply Br. 1-6), we agree with Appellant that the combination of Tanaka and Loh would not have taught or suggested the invention as recited in claims 1 and 2 to one of ordinary skill in the art at the time of the invention. Accordingly, the Examiner erred in finding the combination of Tanaka and Loh would have taught or suggested the invention as recited in claims 1 and 2. Therefore, the Examiner erred in rejecting claims 1 and 2 under 35 U.S.C. § 103(a) for obviousness over Tanaka and Loh. Appeal 2010-000134 Application 11/582,069 5 DECISION The Examiner’s rejection of claims 1 and 2 under 35 U.S.C. § 103(a) as being obvious over Tanaka and Loh is reversed. REVERSED ELD Copy with citationCopy as parenthetical citation