Ex Parte Moeller et alDownload PDFPatent Trial and Appeal BoardSep 29, 201612305107 (P.T.A.B. Sep. 29, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 12/305,107 12/16/2008 34814 7590 10/03/2016 NXP-LARSON NEWMAN, LLP 6501 William Cannon Drive West Austin, TX 78735 FIRST NAMED INVENTOR Dirk Moeller UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. TS10069EH 1065 EXAMINER OH, ANDREW CHUNG SUK ART UNIT PAPER NUMBER 2466 NOTIFICATION DATE DELIVERY MODE 10/03/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): ip.department.us@nxp.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte DIRK MOELLER and VLADIMIR LITOVTCHENKO Appeal2015-006827 1 Application 12/305, 107 Technology Center 2400 Before JEAN R. HOMERE, JOHN A. EV ANS, and DANIEL J. GALLIGAN, Administrative Patent Judges. Per Curiam. DECISION ON APPEAL STATEMENT OF THE CASE Appellants seek our review under 35 U.S.C. § 134(a) of the Examiner's final rejection of claims 1, 4--9, 12, 13, 15, 18, 19, and 21-28. App. Br. 7. Claims 2, 3, 10, 11, 14, 16, 17, and 20 have been canceled. Claim App. 13-17. We have jurisdiction under 35 U.S.C. § 6(b ). We reverse. 1 Appellants identify the real party in interest as Freescale Semiconductor, Inc. App. Br. 1. Appeal2015-006827 Application 12/305,107 Appellants' Invention Appellants' invention is directed to a method and system for operating a receive buffer (302) including functional blocks, a slot status field (SSF) (310), a receive interrupt flag bit (RIP) (312), a receive interrupt enable bit (RIE) (324), an empty slot reception status bit (ESR) (314), and an empty slot reception interrupt enable bit (ESRIE) (316). Spec. 4, Fig. 3. Representative Claim Independent claim 1 is representative, and reads as follows: 1 A receive buffer, in a system node, of a type that receives information at regular time slots and indicates any status changes to a micro control unit (MCU), the receive buffer including comprising: a plurality of storage locations corresponding to a time slot, the plurality of storage locations include: a slot status field to store slot status information during a corresponding time slot; a receive interrupt field to store an interrupt indicator that indicates an interrupt flag is to be sent to the MCU via an interrupt line to indicate a change in slot status information stored at the slot status field; an empty slot reception interrupt enable bit to indicate whether the interrupt flag is sent if an empty slot is detected, wherein the MCU sets the empty slot reception interrupt enable bit to a first value to indicate that the interrupt flag is sent with reception of both data and the empty slot, and the MCU sets empty slot reception interrupt enable bit to a second value to indicate that the interrupt flag is not sent with reception of the empty slot; and an empty slot recognition field to be set to indicate that the empty slot is detected during the corresponding time slot, wherein the indicator is passed to the MCU via a control bus, instead of sending the interrupt flag via the interrupt line, in response to the empty slot recognition field being set and the empty slot reception interrupt enable bit being 2 Appeal2015-006827 Application 12/305,107 set to the second value, wherein the slot status information stored in the slot status field during a previous time slot is preserved in the slot status field corresponding to the empty slot after the detection of the empty slot during the corresponding time slot, and wherein the indicator is used to advise the MCU not to process any empty slots. Fore st et al. ("Fore st") Prior Art Relied Upon US 2004/0081079 Al Rejection on Appeal Apr. 29, 2004 Claims 1, 4--9, 12, 13, 15, 18, 19, and 21-28 stand rejected under 35 U.S.C. § 102(b) as being anticipated by Forrest. Ans. 2-9. ANALYSIS Appellants argue Fore st does not describe sending an empty slot indicator over a control line bus as an alternative to sending an interrupt over an interrupt line based on the occurrence of two mutually exclusive events, as recited in independent claim 1. App. Br. 8; Reply Br. 3. According to Appellants, Forest discloses sending interrupts and indicators as unrelated actions with no exclusive relationship. App. Br. 8 (citing Forest i-f 2000 (interrupts)), 9 (citing Forest i-f 2096 (indicators)); Reply Br. 5---6 (citing Forest i-fi-12882-2883). Appellants contend Forest does not describe any situation resulting in an indicator being sent instead of an interrupt. App. Br. 9. Appellants note Forest describes one requirement directed to enabling and disabling interrupts and another requirement directed to providing indicators with no relationship between the requirements. App. Br. 9 (citing Forest i-fi-12106-2107). Appellants further note Forest discloses one field, a 3 Appeal2015-006827 Application 12/305,107 receive interrupt enable register (RIER), to control whether the interrupt is sent or not and another field, an empty slot status indicator (ESSI), to indicate whether an empty slot has been provided. Reply Br. 7 (citing Forest i-fi-12127, 2918). However, Appellants argue Forest does not disclose the empty slot recognition field and the empty slot reception interrupt enable bit being set to a combination of any values corresponding to a receive buffer having an empty time slot used to determine whether the indicator is sent over the control bus. App. Br. 1 O; Reply Br. 7. In response, the Examiner finds Fore st describes alerting the host processor to errors by an interrupt flag. Ans. 12 (citing Forest i-fi-12882, 2918). The Examiner further finds Forest discloses interrupts may be enabled or disabled while status indicators may be tracked or read upon request. Ans. 12 (citing Forest i-fi-12601, 2882-2883). The Examiner finds these portions of Forest describe that an interrupt has been disabled and the host controller requests a read of the indicators resulting in the indicator being used in place of the interrupt. Ans. 12. We agree with Appellants that the cited portions of Forest upon which the Examiner relies describe an interrupt operation and an indicator operation in separate embodiments with no connection to each other.2 Reply Br. 5. These embodiments describe 2 In an anticipation rejection, "it is not enough that the prior art reference ... includes multiple, distinct teachings that [an ordinary] artisan might somehow combine to achieve the claimed invention." 1Vet }.fonevlN. Inc. v. ·" ' VeriSign, Inc., 545 F.3d 1359, 1371 (Fed. Cir. 2008). Rather, the reference must "clearly and unequivocally disclose the claimed [invention] or direct those skilled in the art to the [invention] without any need for picking, choosing, and combining various disclosures not directly related to each other by the teachings of the cited reference." id. (quoting Jn re Arkley, 455 F.2d 586, 587 (CCPA 1972)). Thus, while "[s]uch picking and choosing 4 Appeal2015-006827 Application 12/305,107 operation of interrupts being sent separately and independently of indicators. See Forest i-fi-12601, 2882. The Examiner further relies upon the receive interrupt enable register (RIER) that enables individual interrupt flags (Ans. 13 (citing Forest i12918)) and an empty slot status indicator (ESSI) that enables an indicator sent. Ans. 13 (citing Forest i-f 2127). We agree with Appellants that Forest does not describe in these portions the same embodiment in which the RIER and ESSI are set to particular values resulting in an indicator being passed instead of sending an interrupt flag as claimed. App. Br. 1 O; Reply Br. 7. Because Appellants have shown at least one reversible error in the Examiner's anticipation rejection, we need not reach Appellants' remaining arguments regarding claim 1, as well as claims 4--9, 12, 13, 15, 18, 19, and 21-28, which also recite the disputed limitations discussed above. It follows Appellants have shown error in the Examiner's rejection of claim 1 as well as claims 4--9, 12, 13, 15, 18, 19, and 21-28 which recite commensurate limitations. DECISION We reverse the Examiner's rejection of claims 1, 4--9, 12, 13, 15, 18, 19, and 21-28 as set forth above. REVERSED may be entirely proper in the making of a 103, obviousness rejection ... it has no place in the making of a 102, anticipation rejection." Arkley, 455 F.2d at 587-88. 5 Copy with citationCopy as parenthetical citation