Ex Parte Milbrandt

Patent Trial and Appeal Board

Jan 26, 2018

13608373 (P.T.A.B. Jan. 26, 2018)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/608,373 09/10/2012 Ryan Neal Milbrandt 2943AAAB-209 1403
22442 7590
Sheridan Ross PC
1560 Broadway
Suite 1200
Denver, CO 80202
EXAMINER
PATEL, NIMESH G
ART UNIT PAPER NUMBER
2185
NOTIFICATION DATE DELIVERY MODE
01/30/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
e-docket @ sheridanross. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte RYAN NEAL MILBRANDT
Appeal 2017-002847
Application 13/608,373
Technology Center 2100
Before CAROLYN D. THOMAS, HUNG H. BUI, and AMBER L. HAGY,
Administrative Patent Judges.
HAGY, Administrative Patent Judge.
DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from the Examiner’s
Final Rejection of claims 1—20, which are all of the pending claims. We
have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
1 Appellant identifies the real party in interest as Assa Abloy AB. (Br. 2.)
Appeal 2017-002847
Application 13/608,373
STATEMENT OF THE CASE
Introduction
According to Appellant, “[t]he present disclosure is generally directed
toward secure elements and mechanisms for programming and
communicating with the same.” (Spec. 12.) By way of background,
Appellant’s Specification describes “secure elements,” such as Subscriber
Identity Module (“SIM”) cards, which are used in smart phones. {Id. 13.)
The Specification notes that demand is increasing for embedded secure
elements, as opposed to removable ones, and further notes that embedded
secure elements pose issues for provisioning and programming. {Id. H 4—5.)
Appellant’s Specification purports to address those issues by providing “a
system and method that enable the in-situ programming of an embedded
secure element.” {Id. 16.) In particular, Appellant’s Specification describes
an apparatus and method in which “the on-board secure element can be
programmed with an off-board device, such as another secure element that is
operating as a master.” {Id.) Appellant’s Specification further states:
“Embodiments of the present disclosure allow an implementation that
normally consists of a single master and two independent slave devices to be
reconfigured such that one of the slave devices becomes the master. This
slave-tumed-master is configured to exchange communications directly with
the other slave to the exclusion of the original single master.” {Id. 17.)
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Exemplary Claim
Claims 1 and 10 are independent. Claim 1, reproduced below with the
disputed limitation italicized, is exemplary of the claimed subject matter:
1. A method, comprising:
determining, at a single processor, that an off-board
device is to become a master of an on-board secure element, the
single processor and on-board secure element being in
communication with one another via a communication bus; and
controlling, directly by the single processor, one or more
switches on the communication bus and external to the single
processor to replace the single processor with the off-board
device as a master to the on-board secure element.
References
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Kang US 6,233,681 B1
Kargl et al. (“Kargl”) US 2009/0011648 A1
Buhot et al. (“Buhot”) US 2010/0207742 Al
Ichimaru et al. (“Ichimaru”) US 2012/0032789 Al
Frese US 2012/0179848 Al
May 15,2001
Jan. 8, 2009
Aug. 19, 2010
Feb. 9, 2012
July 12, 2012
Rejections
Claims 1, 2, 4—8, 10-13, and 16—19 stand rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Kargl and Frese. (Final Act. 5—13.)
Claims 9 and 20 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Kargl, Frese, and Official Notice. (Final Act. 13—16.)
Claim 15 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Kargl, Frese, and Kang. (Final Act. 16—17.)
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Application 13/608,373
Claim 3 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Kargl, Frese, Kang, and Applicant’s Admitted Prior Art
(“AAPA”). (Final Act. 17-18.)
Claim 14 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Kargl, Frese, Kang, AAPA, and Official Notice. (Final
Act. 18-20.)
Issues
(1) Whether the Examiner erred in finding the combination of
Kargl and Frese teaches or suggests the subject matter disclosed in
independent claim 1 and commensurately recited in independent claim 10.
(2) Whether the Examiner erred in finding the combination of
Kargl, Frese, and the Examiner’s taking of Official Notice teaches or
suggests:
wherein the serial data line utilizes at least one of a Universal
Asynchronous Receiver/Transmitter (UART) and I2C bus,
wherein a diode is provided to control the at least one of a
UART and I2C bus in a low state, and wherein a pull up
resistor is provided to control the at least one of a UART and
I2C bus in a high state[,]
as recited in dependent claim 9.
ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellant’s
arguments the Examiner has erred. We disagree with Appellant’s
conclusions and we adopt as our own: (1) the findings and reasons set forth
by the Examiner in the action from which this appeal is taken (Final Act. 2—
20) and (2) the reasons set forth by the Examiner in the Examiner’s Answer
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Application 13/608,373
in response to Appellant’s Appeal Brief. (Ans. 3—5.) We concur with the
conclusions reached by the Examiner, and we highlight the following for
emphasis.2
A. Claim 1: “singleprocessor”
The Examiner finds the combination of Kargl and Frese teaches or
suggests the limitations of claim 1. (Final Act. 5—9.) With regard to the
claimed “single processor” in particular, the Examiner finds Kargl discloses
a “data source” that communicates with an on-board secure element through
a communication bus {id. at 5), but acknowledges Kargl “do[es] not
explicitly disclose enabling the processor to reconfigure the communication
bus using switches on the communication bus and external to the processor”
{id. at 6). The Examiner then relies on Frese for teaching “a communication
bus system whereby bus switches . . . configure the system such that only
one master device ... is allowed to master a slave device at any given time”
to support the conclusion of obviousness. {Id.)
Appellant argues the Examiner’s rejection is in error because “the
Examiner’s proposed combination of Kargl and Frese results in having two
separate components needed to perform” the role of the claimed “single
processor.” (Br. 7 (emphasis added).) Appellant further argues, without
evidentiary support, that “[s]uch a system would lead to a more expensive
and slower system.” {Id.)
The Examiner responds that “it is commonly accepted that making
separate components integral is commonly done and well known in the art.”
(Ans. 3.) The Examiner further finds Frese’s teachings support integrating
2 Only those arguments made by Appellant have been considered in this
decision. Arguments Appellant did not make have not been considered and
are deemed to be waived. See 37 C.F.R. § 41.37(c)(l)(iv).
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Application 13/608,373
components, and concludes it “would have been obvious to one of ordinary
skill in the art to have a single processor that integrates components 6
[Kargl’s ‘data source’] and 18 [Frese’s additional ‘circuit portion’] into a
single device.” (Id.) We agree with the Examiner.
Appellant’s arguments are not persuasive of error. Appellant does not
argue that the Examiner’s combination of Kargl and Frese results in multiple
processors performing the function of the claimed “single processor.”
Rather, Appellant appears to argue that the claimed “single processor”
cannot be comprised of multiple components. Appellant’s argument does
not, however, rebut the Examiner’s finding that the ordinary artisan would
have found it obvious to integrate Kargl’s “data source” and Frese’s “circuit
portion” into the claimed “single processor.” (Ans. 3.) See In re Larson,
340 F.2d 965, 968 (CCPA 1965) (making elements of a device integral or
separable is considered an obvious design choice and does not render an
invention patentable).
For the foregoing reasons, we are not persuaded of error in the
Examiner’s 35 U.S.C. § 103(a) rejection of independent claim 1 or of
independent claim 11, which is argued collectively with claim 1 along with
dependent claims 2—8 and 11—20. (See Br. 5—8.)3 We, therefore, sustain the
Examiner’s rejection of claims 1—8 and 10—20.
B. Claim 9: “wherein the serial data line utilizes . . . [an] I2C bus ”
Claim 9 depends, through claim 8, from independent claim 1, and
recites a “serial data line” that “utilizes at least one of a Universal
3 Appellant argues “the claims” collectively in Appellant’s Brief, identifying
only dependent claim 9 for separate argument. (Br. 8.) Therefore, we select
claim 1 as the representative claim for claims 1—8 and 11—20, pursuant to
our authority under 37 C.F.R. § 41.37(c)(l)(iv).
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Asynchronous Receiver/Transmitter (UART) and I2C bus, wherein a diode
is provided to control the at least one of a UART and I2C bus in a low state,
and wherein a pull up resistor is provided to control the at least one of a
UART and I2C bus in a high state.” (Br. 11 (Claims App’x).)
The Examiner finds both Kargl and Frese teach a “serial bus,” but do
not “explicitly disclose the communication bus is UART or I2C.” (Final
Act. 13.) The Examiner takes Official Notice that “UART and I2C buses are
notoriously well known serial buses,” and therefore “it would have been
obvious to one of ordinary skill in the art at the time of applicant’s invention
to implement the serial bus of Kargl in view of Frese as UART or I2C to
achieve the predictable result of providing serial communication between the
SIM card and data sources.” (Id.) The Examiner provides citation to Buhot
and Ichimaru, as well as the I2C-Bus Specification, Version 2.1 (January
2000) (“I2C-Bus Specification”),4 as evidence to support the assertion that
“the use of UART and I2C, specifically as serial busses to provide
communication for Secure Elements, was notoriously well known in the art
at the time of Applicant’s invention.” (Id. at 14.)
Appellant argues the Examiner has failed to meet the burden of a
prima facie case of obviousness of claim 9 because the Examiner “failed to
provide any detail in exactly how the references could be combined in the
manner suggested by the Examiner.” (Br. 9.) Appellant also argues the
Examiner’s rejection is in error because the Examiner did not provide “a
clear articulation as required, of some teaching, suggestion, or motivation in
4 Available for download at http://www.csd.uoc.gr/~hy428/reading/
i2c_spec.pdf.
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the prior art that would have led one of ordinary skill in the art to combine
Frese with Kargl with the I2C-BUS Specification.” (Id. at 8—9.)
We disagree. We recognize the Examiner must articulate “reasoning
with some rational underpinning to support the legal conclusion of
obviousness.” In re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006). However, the
Examiner’s reasoning need not appear in, or be suggested by, one or more of
the references on which the Examiner relies. Instead, a reason to combine
teachings from the prior art “may be found in explicit or implicit teachings
within the references themselves, from the ordinary knowledge of those
skilled in the art, or from the nature of the problem to be solved.” WMS
Gaming Inc. v. Inti Game Tech., 184 F.3d 1339, 1355 (Fed. Cir. 1999)
(citing In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)). “Under the
correct [obviousness] analysis, any need or problem known in the field of
endeavor at the time of invention and addressed by the patent can provide a
reason for combining the elements in the manner claimed.” KSR Int’l Co. v.
Teleflex Inc., 550 U.S. 398, 420 (2007).
In the instant appeal, the Examiner has provided findings regarding
the teachings of each limitation of claim 9 as well as an articulated reasoning
with rationale underpinning the support the combination of Frese, Kargl, and
Official Notice to achieve the subject matter recited in claim 9. In particular,
in connection with independent claim 1, the Examiner finds “[i]t would have
been obvious to one of ordinary skill in the art at the time of applicant’s
invention to substitute the bus system of Kargl with the bus system of Frese
in order to prevent the influence of another bus master while not adding
complexity to the bus system.” (Final Act. 6—7.) The Examiner further
finds, specifically with regard to claim 9, that “Kargl teaches the
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communication bus may be a parallel or serial bus . . . and Frese also
discloses the bus is a serial bus.” (Ans. 4.) The Examiner further finds
“[t]he I2C bus is well-known serial bus in the art” (id.) and “it would have
been obvious to one of ordinary skill in the art at the time of applicant’s
invention to implement the serial bus of Kargl in view of Frese as an UART
or I2C to achieve the predictable result of providing serial communication
between the SIM card and data sources.” (Final Act. 13; see also Ans. 4.)
The Examiner further finds the I2C-Bus Specification teaches the diode and
resistor circuitry as recited in claim 9. (Ans. 5)
Appellant has not provided persuasive evidence or line of reasoning
explaining why the Examiner’s findings or rationale are erroneous or why a
person of ordinary skill in the art would not have reached the conclusions
reached by the Examiner. See DyStar Textilfarben GmbH & Co.
Deutschland KG v. C.H. Patrick Co., 464 F.3d 1356, 1368 (Fed. Cir. 2006)
(“[T]he proper question is whether the ordinary artisan possesses knowledge
and skills rendering him capable of combining the prior art references.”).
For the foregoing reasons, we are not persuaded of error in the
Examiner’s 35 U.S.C. § 103(a) rejection of dependent claim 9 and we,
therefore, sustain that rejection.
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DECISION
For the above reasons, the Examiner’s rejections of claims 1—20 are
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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