Ex Parte Metz et al

Patent Trial and Appeal Board

Jan 8, 2018

13554805 (P.T.A.B. Jan. 8, 2018)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/554,805 07/20/2012 Eduardus A Metz 1212-118US01/120436 1087
15150 7590 01/10/2018
Shumaker & Sieffert, P. A.
1625 Radio Drive, Suite 100
Woodbury, MN 55125
EXAMINER
CRAWFORD, JACINTA M
ART UNIT PAPER NUMBER
2618
NOTIFICATION DATE DELIVERY MODE
01/10/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
pairdocketing @ ssiplaw.com
ocpat_uspto@qualcomm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte EDUARDUS A METZ, NIGEL TERENCE POOLE,
COLIN CHRISTOPHER SHARP, and ANDREW GRUBER1
Appeal 2017-006175
Application 13/554,805
Technology Center 2600
Before ROBERT E. NAPPI, JOHN D. HAMANN, and
JASON M. REPKO Administrative Patent Judges.
NAPPI, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134(a) of the Final
Rejection of claims 1, 3 through 16, 18 through 33, 35 through 42, 44
through 50, 52 through 55, 58 through 64, 66 through 70, and 72 through 74.
We affirm.
INVENTION
The invention is directed to a method for scheduling graphics
processing unit (GPU) command streams for execution on the GPU.
Abstract. Claim 1 is illustrative of the invention and is reproduced below:
1 According to Appellants, the real party in interest is Qualcomm
Incorporated. App. Br. 3.
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Application 13/554,805
1. A method comprising:
selecting, with a processor, one or more locations in a
graphics processing unit (GPU) command stream as being one or
more locations at which a GPU that processes the GPU command
stream is allowed to preempt execution of the GPU command
stream in response to receiving a notification from the processor
to preempt execution of the GPU command stream, including
selecting the one or more locations in the GPU command stream
based at least in part on an estimated cost for performing a GPU
context switch at each of the one or more locations in the GPU
command stream, wherein the selecting is prior to the GPU
processing the selected one or more locations in the GPU
command stream; and
prior to the GPU processing the selected one or more
locations in the GPU command stream and after selecting the one
or more locations in the GPU command stream, placing, with the
processor, one or more tokens in the GPU command stream
based on the selected one or more locations, the one or more
tokens indicating to the GPU that preemption is allowed to occur
at the selected one or more locations in the GPU command
stream..
REJECTION AT ISSUE
The Examiner has rejected claims 1, 3 through 16, 18 through 33, 35
through 42, 44 through 50, 52 through 55, 58 through 64, 66 through 70, and
72 through 74 under 35 U.S.C. § 103(a) as being unpatentable over McCrary
(US 2011/0050713 Al; published Mar. 3, 2011), Ross (US 2013/0054875
Al; published Feb. 28, 2013) and Heirich (US 2009/0219288 Al; published
Sept. 3, 2009). Answer. 2—27.2
2 Throughout this Opinion, we refer to the Appeal Brief, filed August 29,
2016 (“App. Br.”), the Reply Brief, filed March 2, 2017 (“Reply Br.”), the
Examiner’s Answer, mailed January 3, 2017 (“Answer”), and the Final
Office Action, mailed March 25, 2016 (“Final Act”).
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ISSUES
Appellants argue on pages 10 through 16 of the Appeal Brief the
Examiner’s rejection of independent claim 1 is in error. These arguments
present us with two issues:
1) Did the Examiner err in finding the combination of McCrary, Ross,
and Heirich teaches or suggests selecting one or more locations in
the GPU command stream based at least in part on an estimated
cost for performing a GPU context switch?
2) Did the Examiner err in finding the skilled artisan would combine
the teachings of McCrary and Heirich?
Appellants’ arguments directed to claim 49, on pages 19 through 20,
present the additional issue:
3) Did the Examiner err in finding the combination of McCrary, Ross
and Heirich teaches or suggests a command slot containing a
token, and not a GPU command, that indicates that preemption is
allowed at the location of the token?
ANALYSIS
Independent claim 1
Appellants’ arguments directed to the first issue focus on the
teachings of McCrary and assert that the factors considered when
determining whether to perform a context switch in McCrary are for a
currently executing GPU process at the time they exist when the GPU
reaches a particular location in the command stream. App. Br. 10.
Appellants argue that claim 1 recites determining costs at locations in the
command stream where preemption is allowed prior to the GPU processing
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the selected locations in the stream. App. Br 11, Reply Br. 6. Appellants
argue the Examiner has misconstrued the teachings of McCrary and that the
cited passages show that the costs are to preempt currently executing
processes and the discussion of another command is the higher priority
interrupting command. App. Br. 11—12. Appellants do not address the
teachings of Ross and Heirich other than stating “[t]he remaining references
fail to provide any additional disclosure to overcome the deficiencies of
McCrary. Indeed, the Patent Office did not rely on any of the other
references for disclosing” the disputed limitation. App. Br. 12, see also
Reply Br. 6.
The Examiner states that “[i]t appears Applicant argues in the sense
that the selection of the one or more locations in the GPU command stream
is made prior to the GPU command stream being executed at all” which is
not claimed. Answer 28. Rather, the Examiner construes the claims as
broad enough to encompass currently processing the command stream, or
portions of the command stream, before reaching the locations that indicate
preemption is allowed. Answer 29. We concur with the Examiner. Claim 1
recites selecting locations based upon estimated costs, wherein the selection
is prior to the GPU processing the selected one or more locations. Claim 1
further states that prior to the GPU processing the selected one or more
locations in the command stream placing the tokens. Thus, the claim
recitation is prior to processing locations in the GPU stream not prior to
beginning the processing of the GPU stream.
The Examiner further finds that McCrary teaches calculating costs of
preemption but does not specifically provide details of selection locations
prior to processing the locations in the command stream. Answer 31. The
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Examiner finds that Ross teaches selecting locations for preemption, as the
low priority command queue includes indication of locations where
preemption is permissible. Answer 31 (citing Ross para. 31). We have
reviewed the teachings of McCrary and Ross and concur with the
Examiner’s findings. McCrary teaches that costs of interruption are to be
considered when determining a context switch. Though, some of the
specifically identified cost calculations discussed in paragraph 58 of
McCrary are of currently executing GPU command steams and do not
specifically address costs at individual locations in the command stream, the
Examiner relies upon these teachings in combination with Ross’s teachings
to meet the disputed limitation. Appellants’ augments do not address the
Examiners’ findings with regard to Ross and its combination with McCrary.
We additionally note that McCrary contemplates other factors or costs (other
than the specific listed costs) in determining a context switch and that Ross,
in paragraph 31, discusses identifying specific locations in a command
stream may be good places to permit interruption as interrupting at those
locations does not require operations to be performed again (reducing the
cost of interruption). Thus, we concur with the Examiner and are not
persuaded of error by Appellants’ arguments directed to the first issue.
Appellants’ arguments directed to the second issue assert that the
Examiner’s rationale to combine the references is not tied to a rational
underpinning for making the modification. App. Br. 13. Appellants state:
that the Office has not accounted for why enabling, Debugging
[as in Heirich], and profiling applications executed by a CPU to
monitor and modify graphics processing subsystem state data
would enhance the performance of scheduling and executing
commands issued by a CPU on a GPU. Simply placing
breakpoints in the shader program, and executing the shader
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program with such breakpoints does not by itself enhance the
performance of scheduling and executing commands issued by
a CPU on a GPU. In other words, there is no nexus between
breakpoints for debugging, as disclosed in Heirich, and any
enhancement of scheduling and executing. Indeed, it is well
known in the art that during debugging of a program, execution
and scheduling of the program slows down, and is not
enhanced.
App. Br. 13. Appellants assert that debugging techniques, such as in
Heirich, and context switches, such as McCrary, are completely unrelated to
one another. App. Br. 14
The Examiner provided a detailed response to Appellants’ arguments
on pages 35 through 38 of the Answer, explaining the rationale to combine
Heirich and McCrary. Specifically, the Examiner finds that Heirich shows
that selecting locations in a command stream prior to processing the stream
was known and that Ross teaches that it is known to identify good places to
interrupt a command stream. Answer 36 and 37. Based upon these findings
the Examiner reasons the skilled artisan would combine the teachings. We
concur. We note Heirich is directed to a debugger for use with GPU
programing (see e.g., paragraph 12), and thus, contrary to Appellants’
arguments the teachings of Heirich are not unrelated to the GPU processing
taught by McCrary. Further, the breakpoints in Heirich, where data is
transferred out of the GPU, are not unlike buffering of data from a
preempted command in McCrary (see paragraph 59 of McCrary and
paragraph 42 of Heirich). Thus, we are not persuaded of error in the
Examiner’s rationale to combine the teachings of McCrary and Heirich, and
we sustain the Examiners’ rejection of independent claim 1, and claims 16
and 18 through 32, which are grouped with claim 1.
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Independent claims 33 and 42
Appellants’ augments directed to claims 33 and 35 through 41, assert
that “[a]s the applied references fail to disclose or suggest the above-recited
features of independent claim 1, the features of independent claim 33 would
also not have been obvious to one of ordinary skill in the art at the time of
Appellant's invention.” App. Br. 17—18. Appellants’arguments directed to
claims 41 and 44 through 48 on pages 18 and 19 of the Appeal Brief present
a similar argument.
As we are not persuaded of error by Appellants’ arguments directed to
claim 1, we similarly are not persuaded of error in the Examiner’s rejection
of independent claims 33 and 42, and dependent claims 35 through 41 and
44 through 48, which are grouped with claims 33 and 42 respectively.
Independent claim 49
Appellants’ arguments directed to the third issue focus on the
teachings of Heirich and assert that Heirich teaches that the fragment
processor stops operating upon executing an instruction that is a GPU
command. App. Br. 19—20. Appellants argue the rejection of independent
claim 49 is in error as the claim recites that preemption is indicated as being
allowed at a location of a token in the command stream and not a GPU
command, which is different than Heirich. App. Br. 20. Reply Br. 14—15.
The Examiner responds by identifying that the term “not a GPU
command” is interpreted as being a command that is not specific to a GPU.
Answer 40. The Examiner finds that Ross’s “yield bits” are considered to be
the same as the claimed tokens as they are not GPU commands. Answer 40.
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Appellants’ arguments have not persuaded us of error in the
Examiner’s rejection, as Appellants’ arguments do not address the
Examiner’s findings regarding Ross teaching the disputed limitation.
Appellants’ arguments focus on the teaching of Heirich and incorrectly state:
“the Examiner does not allege that McCrary and Ross teach or suggest the
feature of claim 49 of ‘in response to determining that the command slot
contains the token . . . and not a GPU command.’” Reply Br. 16 (emphasis
omitted). Thus, we sustain the Examiner’s rejection of independent claim 49
and dependent claims 50 and 52 through 54, which are grouped with claim
49.
Independent claims 55, 63, and 69
Appellants’ augments directed to claims 55, 56, and 58 through 62,
assert “[a]s the applied references fail to disclose or suggest the above-
recited features of independent claim 49, the features of independent claim
55 would also not have been obvious to one of ordinary skill in the art at the
time of Appellant's invention.” App. Br. 21. Appellants’ arguments
directed to claims 63, 64, and 66 through 68 on pages 21 and 22 of the
Appeal Brief present a similar argument. In addition, Appellants’ arguments
directed to claims 69, 70, and 72 through 74 on pages 22 and 23 of the
Appeal Brief present a similar argument.
As we are not persuaded of error by Appellants’ arguments directed to
claim 49, we similarly are not persuaded of error in the Examiner’s rejection
of independent claims 55, 63, and 69, as well as dependent claims 56, 58
through 62, 64, 66 through 68, 70, and 72 through 74, which are grouped
with their respective independent claims.
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DECISION
The decision of the Examiner to reject claims 1, 3 through 16, 18
through 33, 35 through 42, 44 through 50, 52 through 55, 58 through 64, 66
through 70, and 72 through 74 is affirmed.
AFFIRMED
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