Ex Parte Meeusen

Board of Patent Appeals and Interferences

Mar 1, 2010

10535060 (B.P.A.I. Mar. 1, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte RAFAEL MEEUSEN
____________

Appeal 2009-004842
Application 10/535,060
Technology Center 2600
____________

Decided: March 3, 2010
____________

Before JOSEPH F. RUGGIERO, ROBERT E. NAPPI, and
CARL W. WHITEHEAD, JR., Administrative Patent Judges.

WHITEHEAD, JR., Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2009-004842
Application 10/535,060

2
Appellant appeals under 35 U.S.C. § 134 from the Examiner’s
rejection of claims 1-10. App. Br. 3. We have jurisdiction under 35 U.S.C.
§ 6(b) (2002). We affirm-in-part.

STATEMENT OF THE CASE
Appellant invented an audio receiver for receiving a frequency
modulated stereo multiplex signal wherein the signal may be double side
band with suppressed carrier (DSB-SC) modulated on a 38 kHz carrier, with
a 19 kHz pilot tone in the multiplex signal used to reconstruct the carrier’s
phase and frequency for demodulation. The analog stereo multiplex signal
is converted into a time discrete digital stereo multiplex signal and shifted
over a frequency of 19 kHz to extract at least one of the time discrete digital
stereo sum and time discrete digital stereo difference signals.1

Claim 1, which further illustrates the invention, follows:
1. Method for a receiver having a signal path incorporating a tuner, a
frequency demodulator circuit for supplying an analog stereo multiplex
signal comprising a baseband stereo sum signal, a 19 kHz stereo pilot and a
stereo difference signal, which is double sideband amplitude-modulated on a
suppressed 38 kHz subcarrier, a sampler for converting the analog stereo
multiplex signal into a time discrete digital stereo multiplex signal and a
stereo decoder for decoding the time discrete digital stereo multiplex signal
into a time-discrete digital stereo sum and a time discrete digital stereo
difference signal, wherein the analog stereo multiplex signal is converted

1 See App. Br. 3-4.
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into a time discrete digital stereo multiplex signal and then the time discrete
digital stereo multiplex signal is shifted over a frequency of 19 kHz to
extract at least one of the time-discrete digital stereo sum and the time
discrete digital stereo difference signal.

The Rejections2
The Examiner relies upon the following prior art references as
evidence of unpatentability:
Therssen EP 0512606 B1 Jul. 17, 1996
Wildhagen US 7,149,312 B1 Dec. 12, 2006
(filed Oct. 18, 2000)
Claim 1 stands rejected under 35 U.S.C. § 102(b) as being
unpatentable over Therssen (Ans. 5-6).
Claims 1-10 stand rejected under 35 U.S.C. § 102(b) as being
unpatentable over Wildhagen (Ans. 3-5).
Rather than repeat the arguments of Appellant or the Examiner, we
refer to the Appeal Brief (filed May 13, 2008), the Reply Brief (filed
September 16, 2008), and the Answer (mailed July 29, 2008) for their
respective details. In this decision, we have considered only those
arguments actually made by Appellant. Arguments which Appellant could
have made but did not make in the Brief have not been considered and are
deemed to be waived. See 37 C.F.R. § 41.37(c)(1)(vii) (2008).

2 The Examiner has withdrawn the rejection of claim 4 under 35 U.S.C. §
102(b) as anticipated by Therssen (Ans. 2).
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Anticipation Rejection over Therssen
Claim 1
ISSUE
Does Therssen discloses a method for a receiver to shift a time
discrete digital stereo multiplex signal over a frequency of 19 kHz to extract
at least one of the time discrete digital stereo sum and time discrete digital
stereo difference signals?

FINDINGS OF FACTS
1. Figure 1 of Therssen is reproduced below:

Figure 1 discloses a receiver for receiving radio frequency (RF) FM
reception signals comprising a baseband modulation signal which is FM-
modulated on an RF carrier (col. 4, l. 22 – col. 5, l. 1).
2. The second multiplier stage M2 applies a control signal to the mono-
stereo selector MSS via a second low-pass filter LP2 for an automatic mono-
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stereo change-over controlled by the received 19 kHz stereo pilot (col. 6, l.
56 – col. 7, l. 2).
3. Therssen discloses a receiver having a signal path incorporating a tuner, a
demodulator circuit for supplying a stereo multiplex signal comprising a
base-band stereo sum signal (L+R), a 19 kHz stereo pilot and a stereo
difference signal (L-R) which is double side-band amplitude-modulated on a
suppressed 38 kHz subcarrier, a sampler for converting an analog signal into
a time-discrete signal, and a stereo decoder for time-division multiplex
decoding of a time-discrete stereo multiplex signal into time-discrete left and
right stereo signals (col. 2, ll. 2-12).

PRINCIPLES OF LAW
“A claim is anticipated only if each and every element as set forth in
the claim is found, either expressly or inherently described, in a single prior
art reference.” Verdegaal Bros., Inc. v. Union Oil Co. of Cal., 814 F.2d 628,
631 (Fed. Cir. 1987).
Although giving claims their broadest reasonable interpretation must
take into account any definitions given in the specification, In re Morris, 127
F.3d 1048, 1054 (Fed. Cir. 1997), it is improper to read into the claims
limitations from examples given in the specification. In re Zletz, 893 F.2d
319, 321-22 (Fed. Cir. 1989). See also Phillips v. AWH Corp., 415 F.3d
1303, 1323 (Fed. Cir. 2005) (“[A]lthough the specification often describes
very specific embodiments of the invention, we have repeatedly warned
against confining the claims to those embodiments. In particular, we have
expressly rejected the contention that if a patent describes only a single
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embodiment, the claims of the patent must be construed as being limited to
that embodiment” (citations omitted)).

ANALYSIS
Appellant argues that the multiplier (M2) does not shift the time
discrete stereo multiplex signal over a frequency of 19 kHz to extract at least
one of the time discrete digital stereo sum or difference signals as the
claimed method does (App. Br. 9). See FF 1-2. Appellant further argues:
[I]n the present invention, extraction of the sum or difference
signal is accomplished by means of the frequency shift of
19kHz. In Therssen, extraction of the sum or difference signal
(IC1 or IC2) is accomplished as illustrated in Fig. 2 thereof by
the circuits QMF (time-discrete halfband lowpass filter) and IC
(interpolation circuit). This extraction occurs regardless of the
operation of M2. The only effect of M2 is to influence whether
a mono or stereo output is finally output.
(App. Br. 9).
It is the Examiner’s position that the “mono in Therssen is the stereo
sum signal” which is extracted after the MSS (mono-stereo selector) wherein
the MSS is controlled by the 19 kHz signal generated the DIV (frequency
dividing circuit) (Ans. 7). See FF 1. The Examiner concludes:
The term “shifting”, according to dictionary, means varying.
So the claimed “frequency shifting” could read on the
frequency of the input signal being varied that the output has a
varied frequency. This varied frequency is different from the
input frequency. The signal after DIV is 19 kHz which is
generated by varying the input frequency on the signal SMO.
The stereo sum signal is extracted by varying the SMO over a
frequency of 19 kHz.
(Ans. 7-8).
In response to the Examiner’s conclusion, Appellant argues:
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Appellants [sic] reply to the Examiner’s Answer that we
maintain that Therssen fails to disclose or s [sic] render obvious
the shifting of a time discrete stereo multiplex signal over a
frequency of 19 kHz to extract at least one time-discrete signal.
Therssen discloses the use of QMF circuits (time-discrete
halfband low pass filter shown in FIG. 2) and the interpolation
circuit. The block M2 does not shift the time discrete digital
signal over a frequency of 19 kHz. Appellants [sic], for the
reasons noted previously herein, take at [sic] strong exception
to the Examiner’s strained interpretation of frequency shifting
used in support of the rejection of claim 1 in the Examiner’s
Answer.
(Reply Br. 7).
We find Appellant’s argument that M2 does not shift the time discrete
digital stereo multiplex signal over 19 kHz to be persuasive. See FF 1-3.
Controlling the mono stereo switch MSS is not the same as shifting the
signal over a 19 kHz frequency as required by claim 1. Frequency shifting
itself can be reasonably interpreted broadly; however, claim 1 specifically
requires that the multiplex signal is shifted over a frequency of 19 kHz,
therefore a mere frequency change is not sufficient to anticipate the claim
limitation. Finally, the Examiner has failed to properly indicate where
Therssen discloses a frequency shifting of the time discrete stereo multiplex
signal of any kind, much less frequency shifting the multiplex signal over a
19 kHz frequency as required in claim 1. See FF 1, 3. Therefore, we will
not sustain the Examiner’s rejection of claim 1 over Therssen.

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Anticipation Rejection over Wildhagen
Claims 1-4
ISSUE
Does Wildhagen disclose a method for a receiver to shift a time
discrete digital stereo multiplex signal over a frequency of 19 kHz to extract
at least one of the time discrete digital stereo sum and time discrete digital
stereo difference signals?

FINDING OF FACTS
4. Figure 5 of Wildhagen is reproduced below:

Figure 5 discloses stereo-sum signal ms(t), the stereo-difference signal md(t)
and the pilot detection signal mh(t) are generated from the multiplex signal
m(t) (col. 4, ll. 22-65).

ANALYSIS
Appellant argues:
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With respect to Wildhagen, Figure 5 thereof, the
rejection erroneously contends that “the time discrete digital
stereo multiplex signal [m] is shifted over a frequency of 19kHz
(37) to extract at least one of the time-discrete sum and the time
discrete digital stereo difference signal (through 20, 21, 24) and
further shifted (by 18) and having a lowpass filter (21 or 24).”
The block 37 is a digital phase lock loop, and the block
18 is an up-sampling circuit. As described at col. 4, lines 42-
45, “The DPLL-circuit 37 [and 18] generates a carrier for the
coherent amplitude demodulation of the stereo-difference signal
md(t) and a carrier for the coherent pilot carrier detection, i.e.,
the detection of a stereo transmitter.”
(App. Br. 10 (brackets in original)).
The Examiner states that Appellant has failed to explain the
terminology frequency shifting, and therefore the term is subject to broad
interpretation. See Ans. 6. As we stated previously, the frequency shifting
terminology can be reasonably interpreted broadly; however, claim 1
specifically requires that the multiplex signal is shifted over a frequency of
19 kHz, therefore a mere frequency change is not sufficient to anticipate the
claim limitation. Even if we agreed with the Examiner that the output of the
digital phase locked loop circuit (DPLL) has a frequency of 19 kHz, claim 1
require that the multiplex signal is shifted over a frequency of 19 kHz and,
while the DPLL generates three carriers (38 kHz carrier for the coherent
amplitude demodulation of the stereo-difference signal md(t), a complex 19
kHz carrier for the coherent pilot detection, and the in quadrature component
of the 19 kHz carrier which is required for synchronization purposes), none
of the generated carriers are disclosed to have been shifted by 19 kHz as
required in claim 1. See Wildhagen, col. 4, ll. 42-54; FF 4. See also Ans. 7.
Therefore, Wildhagen’s DPLL circuit does not shift the time discrete digital
stereo multiplex signal as required in the method of claim 1. We find
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Appellant’s arguments persuasive and we will not sustain the Examiner’s
rejection of claim 1 and dependent claims 2-4 for the same reason we have
stated previously.

Claims 5-8
ISSUE
Does Wildhagen disclose a receiver for decoding a time discrete
digital stereo multiplex signal wherein the receiver has a stereo decoder
comprising two frequency shifting circuits connected in series?

ANALYSIS
Appellant argues that, based upon the fact that Wildhagen’s DPLL
circuit fails to perform any frequency shifting of the time discrete digital
stereo multiplex signal m, it may be seen that Wildhagen does not anticipate
claim 5 (App. Br. 10). Appellant further argues that the DPLL derives a first
time reference signal from the time discrete digital stereo multiplex signal
and a second time reference signal from the first time reference signal. Id.
However, claim 5 does not require frequency shifting the time discrete
digital multiplex signal. In fact, claim 5 only requires a stereo decoder for
decoding the time discrete digital multiplex signal and, while the claim
further states that the stereo decoder comprises two frequency shifting
circuits connected in series, the claim does not require that the multiplex
signal be shifted by the two frequency shifting circuits. It is the Examiner’s
position that Wildhagen discloses two frequency shifting circuits 20, 37 and
Appellant not presented arguments to the contrary. Therefore we will
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sustain the Examiner’s rejection of independent claim 5 as well as dependent
claims 6-8 since they were not argued separately.

Claims 9-10
ANALYSIS
Appellant argues:
With respect to claim 9, the DPLL circuit of Wildhagen
cannot be considered to be “two frequency shifting circuits
connected in series with one another.” As made clear in the
present specification, a frequency shifting circuit is used to shift
the center frequency of an information-bearing signal (not a
carrier signal or reference signal). Accordingly, it may be seen
that Wildhagen does not anticipate claim 9.
(App. Br. 10).
Appellant does not indicate what section of the Specification that he is
relying upon for support of his assertion that the frequency shifting circuit is
used only to shift the center frequency of an information bearing signal.
Further, the Examiner does not rely upon the DPLL circuit 37 alone to show
two frequency shifting circuits connected in series with one another; the
Examiner relies upon the DPLL circuit 37 in conjunction with the first mixer
20. See Ans. 3; FF 4. We do not find Appellant’s arguments to be
persuasive. Therefore, we will sustain the Examiner’s rejection of claim 9
and dependent claim 10 for the same reasons since claim 10 was not argued
separately. See App. Br. 10.

CONCLUSIONS
Therssen does not disclose a method for a receiver to shift a time
discrete digital stereo multiplex signal over a frequency of 19 kHz to extract
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at least one of the time discrete digital stereo sum and time discrete digital
stereo difference signals.
Wildhagen does not disclose a method for a receiver to shift a time
discrete digital stereo multiplex signal over a frequency of 19 kHz to extract
at least one of the time discrete digital stereo sum and time discrete digital
stereo difference signals.
Wildhagen discloses a receiver for decoding a time discrete digital
stereo multiplex signal wherein the receiver has a stereo decoder comprising
two frequency shifting circuits connected in series.

ORDER
We will not sustain the Examiner’s decision rejecting claims 1-4. We
will sustain the Examiner’s decision rejecting claims 5-10.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED-IN-PART

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