Ex Parte Lu et al

Patent Trial and Appeal Board

Apr 10, 2014

11053001 (P.T.A.B. Apr. 10, 2014)

UNITED STATES PATENT AND TRADEMARKOFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/053,001 02/07/2005 Paul Yang Lu 3875.0300000 7271
26111 7590 04/10/2014
STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C.
1100 NEW YORK AVENUE, N.W.
WASHINGTON, DC 20005
EXAMINER
PE, GEEPY
ART UNIT PAPER NUMBER
2488
MAIL DATE DELIVERY MODE
04/10/2014 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte PAUL YANG LU and WEIPING PAN
___________

Appeal 2011-008823
Application 11/053,001
Technology Center 2400
____________

Before JEAN R. HOMERE, CARL W. WHITEHEAD JR., and
JEFFREY S. SMITH, Administrative Patent Judges.

WHITEHEAD, JR., Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2011-008823
Application 11/053,001

2
STATEMENT OF THE CASE
Appellants are appealing the final rejection of claims 1-40 under
35 U.S.C. § 134(a). Appeal Brief 2. We have jurisdiction under 35 U.S.C.
§ 6(b) (2012).
We affirm.

Introduction
The invention is directed to methods and systems wherein a plurality
of lines in a current video frame maybe received on a chip and a portion of
processed video frames maybe stored in a memory outside the chip.
Abstract.

Representative Claim (Emphasis Added)
1. A method for on-chip processing of video data, the method
comprising: receiving on a chip, a plurality of lines in a current video
frame; storing in a first memory outside said chip, at least a portion of
a plurality of previously processed video frames occurring prior to
said plurality of lines in said current video frame;
storing at least a portion of said received plurality of lines in said
current video frame in a memory on said chip; and
encoding on said chip, a first portion of said received plurality of lines
in said current video frame utilizing said stored at least a portion of
said plurality of previously processed video frames.

Rejection on Appeal
Claims 1-40 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Kuroda (Kuroda et al. Multimedia Processors Proceedings
of the IEEE, volume 86, number 6, pp. 1203-21, June 1998) and Malladi
(U.S. Patent Number 5,912,676; issued June 15, 1999). Answer 4-8.

Appeal 2011-008823
Application 11/053,001

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ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellants’
contentions that the Examiner has erred. We disagree with Appellants’
contentions. We concur with the findings and reasons set forth by the
Examiner in the action from which this appeal is taken and the reasons set
forth by the Examiner in the Answer in response to Appellants’ Appeal Brief
and adopt them as our own, except as to those findings that we expressly
overturn or set aside in the analysis as follows.
Appellants contend the combination of Kuroda and Malladi fails to
disclose “storing in a first memory outside said chip, at least a portion of a
plurality of previously processed video frames occurring prior to said
plurality of lines in said current video frame” as recited in claim 1. Appeal
Brief 8-9. Appellants contend the Examiner failed to indicate which
elements of Kuroda are equated to Appellants’ claimed elements. Id.
Appellants also contend Malladi fails to address the noted deficiencies of
Kuroda. Id. Appellants further contend the Examiner failed to articulate a
reasoning having rationale underpinning to support the legal conclusion of
obvious in the manner described in KSR. Id. at 11; KSR Int’l Co. v. Teleflex,
Inc., 550 U.S. 398 (2007). It is noted while Appellants argue the merit of
the rejection of claim 1 under 35 U.S.C. § 102(b), the Examiner rejected the
claim 1, as well as, claims 2-40 under 35 U.S.C.
§ 103(a). Id. at 10; Final Rejection 2-3; Answer 5-8.

The Examiner finds Kuroda teaches the “storing” limitation recited in
claim 1. Answer 5. We agree with the Examiner’s findings. Kuroda
discloses “Architecture Evaluation Points for MPEG Decoding” wherein the
Appeal 2011-008823
Application 11/053,001

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multimedia processors require “Memory access to a large memory space to
provide a video frame buffer that usually cannot reside in a processor on
chip memory.” Id.; Kuroda 1205-06. Further, Kuroda discloses MPEG
video frames consist of I-frames, P-frames and B-frames. Id. at 1216. I-
frames are the current frames that are compressed without motion prediction
wherein P-frames are compressed by unidirectional prediction using a
previous frame and B-frames are compressed by bi-directional prediction
using future and past frames. Id. Hence, claim’s 1 “processed video frames
occurring prior to said plurality of lines” limitation reads upon Kuroda’s
disclosure of I, P, and B-frames. Therefore, the manipulation of the video
frames in order to provide storage for them on the processor and in an
external memory is fully disclosed in Kuroda. Further, even if such data
manipulation was not explicitly disclosed by Kuroda, it would have been
obvious to an artisan to provide storage means both on and off of the
processor in view of the teachings of both Kuroda and Malladi for the same
reasons articulated by the Examiner. Answer 5.
Therefore we sustain the Examiner’s obviousness rejection of claim 1
for the reasons articulated above. We also sustain the Examiner’s rejection
of independent claims 12, 21, and 32, all having limitations commensurate
in scope with claim 1 and not separately argued by Appellants. See Appeal
Brief 12.
Appellants argue the dependent claims in 11 separate groups (Id. at
12-24). We group these claims together here for clarity and brevity since
Appellants have not presented any patentability arguments that specifically
state how each of the claims is patentable over the prior art of record. We
adopt the Examiner’s findings as our own and sustain the Examiner’s
Appeal 2011-008823
Application 11/053,001

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obviousness rejection of dependent claims 2-11, 13-20, 22-31, and 33-40 for
the same reasons articulated by the Examiner. See Answer 11-15.

DECISION
The Examiner’s obviousness rejection of claims 1-40 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). See
37 C.F.R. § 41.50(f).

AFFIRMED

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