Ex parte Loboda et al.

Board of Patent Appeals and Interferences

Jan 20, 1998

08382701 (B.P.A.I. Jan. 20, 1998)

Application for patent filed February 2, 1995.1
1
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered today (1) was not written
for publication in a law journal and (2) is not binding precedent of the Board.
Paper No. 13
UNITED STATES PATENT AND TRADEMARK OFFICE
_____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
_____________
Ex parte MARK J. LOBODA, and
KEITH W. MICHAEL
_____________
Appeal No. 97-4091
Application 08/382,7011
______________
ON BRIEF
_______________
Before JERRY SMITH, BARRETT and LEE, Administrative Patent
Judges.
LEE, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134 from the
examiner's final rejection of claims 1-15. No claim has been
allowed.
References relied on by the Examiner
Yonezawa et al. (Yonezawa) 4,224,636 Sep. 23, 1980
Yamazaki 4,559,552 Dec. 17, 1985
Appeal No. 97-4091
Application 08/382,701
2
The Rejections on Appeal
Claims 1-15 stand finally rejected under 35 U.S.C. § 103 as
being unpatentable over Yonezawa and Yamazaki. The appellants
have grouped all claims 1-15 together for argument purposes in
this appeal. (Br. at 3).
The Invention
This invention is directed to the use of an amorphous
silicon carbide layer as a diffusion barrier in an integrated
circuit or a wiring board. According to the specification (at 1,
lines 3-6), the function of the amorphous silicon carbide layer
is to stop the migration of metal atoms between conductors
interconnecting an electrical circuit.
Independent claims 1 and 11 are drawn to an integrated
circuit and independent claim 15 is drawn to a wiring board. All
other claims depend directly or indirectly from either claim 1 or
claim 11.
Claims 1 and 11 both require (1) a circuit subassembly
comprising a semiconductor substrate having solid state device
regions; (2) metal wiring deposed on the surface of the
semiconductor substrate and interconnecting the solid state
Appeal No. 97-4091
Application 08/382,701
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device regions and having a resistivity less than about 2.5
microhm-centimeters; and (3) an amorphous silicon carbide layer
covering the metal wiring.
Claim 15 recites a wiring board comprising a subassembly
containing thereon metal wiring having a resistivity less than
about 2.5 microhm-centimeters, and an amorphous silicon carbide
layer covering the metal wiring.
Claims 1 and 15 further recite a dielectric layer covering
the silicon carbide layer. Claim 11 adds a second layer of metal
wiring formed on the amorphous silicon carbide layer and
electrically connected to the first layer of metal wiring.
Claims 1, 11 and 15 are reproduced below:
1. An integrated circuit comprising:
A) a circuit subassembly comprising a semiconductor
substrate having solid state device regions and, deposed on the
surface of the semiconductor substrate, metal wiring
interconnecting the solid state device regions, the metal wiring
having a resistivity less than about 2.5 microhm-centimeters;
B) an amorphous silicon carbide layer covering at least the
metal wiring; and
C) a dielectric layer covering at least the silicon carbide
layer.
11. An integrated circuit comprising:
A) a circuit subassembly comprising a semiconductor
substrate having solid state device regions and, deposed on
the surface of the semiconductor substrate, metal wiring
Appeal No. 97-4091
Application 08/382,701
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interconnecting the solid state device regions, the metal
wiring having a resistivity less than about 2.5 microhm-
centimeters;
B) an amorphous silicon carbide layer covering the metal
wiring; and
C) a second layer of metal wiring formed on the layer of
amorphous silicon carbide, wherein the second layer of metal
wiring is electrically connected to the first layer of metal
wiring.
15. A wiring board comprising:
A) a wiring board subassembly containing thereon metal
wiring having a resistivity less than about 2.5 microhm-
centimeters;
B) an amorphous silicon carbide layer covering the metal
wiring; and
C) a dielectric layer covering the silicon carbide layer.
Opinion
We do not sustain the rejection of claims 1-15 under
35 U.S.C. § 103 as being unpatentable over Yonezawa and Yamazaki.
This decision is based solely on the rationale as
articulated by the examiner. We offer no opinion on the
patentability of any claim based on other grounds.
We begin our discussion with claim interpretation. All
three independent claims specifically require that the amorphous
silicon carbide layer be "covering" the metal wiring. The word
"covering" appears in the original claims as filed and the
Appeal No. 97-4091
Application 08/382,701
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appellants do not purport to use the term in any manner contrary
to its usual and customary meaning. We note that claim terms are
properly and reasonably construed not in a vacuum but always in
light of the context of the specification.
The specification describes that the silicon carbide layer
is applied over the metal wiring (spec. at 4, lines 9-10). The
specification describes that the silicon carbide layer functions
as a diffusion barrier which keeps metal atoms from migrating
between adjacent conductors (spec. at 1, lines 3-6). The sole
Figure illustrates that the silicon carbide layer is immediately
adjacent to all surfaces of the metal wiring through which
diffusion of metal atoms can take place, even when there are
multiple layers of metal wiring. The specification describes at
8, lines 1-3, that a layer of silicon carbide should be deposited
between the dielectric and the metal to prevent diffusion of the
metal into the dielectric.
In the proper context of the appellants’ specification,
"cover" or "covering" does not mean merely a partial overlap in
any direction, or even in a specific direction. In our view,
that would be an unreasonable interpretation in light of the
specification. Here, the broadest reasonable interpretation of
"covering" in the context of these claims, would still require
that there be sufficient coverage of amorphous silicon carbide
Appeal No. 97-4091
Application 08/382,701
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around the metal wiring such that a diffusion barrier is formed
to stop the migration of metal atoms from one conductor to
another through the intermediate dielectric material.
It is apparent that the examiner has taken a much too broad
interpretation of the term "covering" in the context of these
claims. It appears that to the examiner, "covering" is met
whenever any silicon carbide is found to be positioned above
a metal electrode. That is too broad an interpretation and
unreasonable in light of the appellants’ specification.
According to the examiner, Yonezawa does not disclose that
any metal wiring is covered by a silicon carbide layer. The
examiner also states (answer at 6, line 2) that the following
argument of the appellants (Br. page 5, line 20 to page 6,
line 3) is substantially correct:
The aluminum mounting electrodes are
contacted by the silicon carbide however,
they are not covered by the silicon carbide.
There is nothing in Yonezawa et al. to
suggest applying another layer of silicon
carbide over the aluminum mounting electrodes
or to cover the aluminum mounting electrodes
with the silicon carbide. (Emphasis in
original.)
However, the examiner takes the position (answer at page 6, lines
3-7) that:
[I]t would have been obvious to duplicate the
layers 14-17, together with the layers 19a"
and 19b", thereby the aluminum electrodes are
Appeal No. 97-4091
Application 08/382,701
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covered by the silicon carbide, and another
layer of silicon carbide would be over the
aluminum electrodes as the claimed invention.
Even assuming that it would have been obvious to one with
ordinary skill in the art to duplicate Yonezawa’s layers 14-17
together with the electrodes 19a" and 19b" on top of the already
existing SiO layer 17, no metal wiring would be "covered" by any2
silicon carbide layer in the sense that migration of metal atoms
between adjacent electrodes through dielectric would be stopped.
The examiner nowhere explained how this occurs and we do not find
that it does. It is not enough to meet the claimed "covering"
feature simply by having a remotely overlapping relationship
between a silicon carbide layer and a metal electrode.
In any event, we are unpersuaded by the examiner’s
conclusory statement that it would have been obvious to one with
ordinary skill in the art to duplicate Yonezawa’s layers 14-17 on
top of the already existing layers 14-17.
The examiner cited St. Regis Paper Co. v. Bermis Co.,
549 F.2d 833, 838, 193 USPQ 8, 11 (7th Cir. 1977), for the
proposition that mere duplication of the essential parts of a
device involves only routine skill in the art. However, we do
not read that case as setting forth any such per se rule. More
Appeal No. 97-4091
Application 08/382,701
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importantly, there is no such per se rule under the precedents of
the Court of Appeals for the Federal Circuit, our reviewing
court.
There must be some reason to duplicate only those parts the
examiner would have duplicated and the putting together of the
duplicated parts as proposed by the examiner must be reasonably
suggested by the prior art as well. The mere fact that the prior
art may be modified in the manner suggested by the Examiner does
not make the modification obvious unless the prior art suggested
the desirability of the modification. In re Fritch, 972 F.2d
1260, 1266, 23 USPQ2d 1780, 1783-84 (Fed. Cir. 1992). It is also
impermissible to use the claimed invention as an instruction
manual or "template" to piece together the teachings of the prior
art so that the claimed invention is rendered obvious. In re
Fritch, supra. One also cannot use hindsight reconstruction to
pick and choose among isolated disclosures in the prior art.
In re Fine, 837 F.2d 1071, 1075, 5 USPQ2d 1596, 1600 (Fed. Cir.
1988).
It is the burden of the examiner to establish why one having
ordinary skill in the art would have been led to the claimed
invention by the express teachings or suggestions found in the
Appeal No. 97-4091
Application 08/382,701
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prior art, or by implications contained in such teachings or
suggestions. In re Sernaker, 702 F.2d 989, 995, 217 USPQ 1, 6
(Fed. Cir. 1983). Here, the examiner has not explained why one
with ordinary skill in the art would have wanted to replicate
layers 14-17, together with electrodes 19a" and 19b", and to
place the duplicated structure on top of the already existing
SiO layer 17.2
The examiner relied on Yamazaki only for its suggestion of
using silver as the material for metal wiring. That does not
make up for the deficiencies of Yonezawa as discussed above.
For the foregoing reasons, we do not sustain the rejection
of claims 1-15 as being unpatentable over Yonezawa and Yamazaki.
Appeal No. 97-4091
Application 08/382,701
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Conclusion
The rejection of claims 1-15 under 35 U.S.C. § 103 as being
unpatentable over Yonezawa and Yamazaki is reversed.
REVERSED
JERRY SMITH )
Administrative Patent Judge )
)
)
) BOARD OF PATENT
LEE E. BARRETT )
Administrative Patent Judge ) APPEALS AND
)
) INTERFERENCES
)
JAMESON LEE )
Administrative Patent Judge )
Appeal No. 97-4091
Application 08/382,701
11
Sharon R. Sererance
Patent Department
Mail C01232
Dow Corning Corporation
Midland, MI 48686-0994
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