Ex parte Lin

Board of Patent Appeals and Interferences

Jan 5, 2000

08479245 (B.P.A.I. Jan. 5, 2000)

The application was filed on June 7, 1995. It is a1
continuation of Application Serial No. 08/205,217, which was
filed on March 2, 1994, and is now abandoned.
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered today (1) was not written
for publication in a law journal and (2) is not binding precedent of the Board.
Paper No. 29
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte JAMES C. LIN
____________
Appeal No. 1997-4051
Application No. 08/479,2451
____________
ON BRIEF
____________
Before THOMAS, HAIRSTON, and BARRY, Administrative Patent
Judges.
BARRY, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on the appeal under 35 U.S.C. § 134
from the final rejection of claims 1-8. We reverse.
Appeal No. 1997-4051
Application No. 08/479,245
Appeal No. 1997-4051 Page 3
Application No. 08/479,245
BACKGROUND
The performance of a computer can be enhanced by
employing a cache memory, particularly by employing a write-
back cache memory. Data stored in the write-back cache may be
lost, however, if the cache fails. Such a failure can occur
in a portable computer when its battery runs low. The
invention at issue in this appeal reduces such data loss by
reconfiguring the cache as a write-through cache in response
to a low-battery condition.
Claim 1, which is representative for our purposes,
follows:
1. A computer system, including a central
processing unit and a main memory system, said
computer system comprising:
a battery for powering said computer system;
a battery monitoring circuit for measuring a
level of charge in said battery, said battery
monitoring circuit providing a first control signal
when said charge measured falls below a
predetermined level;
a logic circuit, coupled to receive said first
control signal, for providing a second control signal;
and
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Application No. 08/479,245
a cache memory for said main memory system, said
cache memory including a cache controller coupled to
receive said second control signal, said cache
controller initially operating said cache memory as
a "write-back cache”, said cache controller
providing, in response to said second control
signal, an interrupt signal to said central
processing unit, thereby causing said central
processing unit to execute a service routine in
response to said interrupt signal, said service
routine causing said central processing unit to
provide a third control signal to said cache
controller, whereupon said cache controller either
disables said cache memory or operates said cache
memory as a write-through cache, in response to said
third control signal.
The reference relied on in rejecting the claims follows:
Shimoi 5,007,027 Apr. 9, 1991.
Claims 1-8 stand rejected under 35 U.S.C. § 103 as
obvious over Shimoi. Rather than repeat the arguments of the
appellant or examiner in toto, we refer the reader to the
briefs and answer for the respective details thereof.
OPINION
In reaching our decision in this appeal, we considered
the subject matter on appeal and the rejection advanced by
the examiner. Furthermore, we duly considered the arguments
and evidence of the appellant and examiner. After considering
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Application No. 08/479,245
the totality of the record, we are persuaded that the examiner
erred in rejecting claims 1-8. Accordingly, we reverse.
Regarding the obviousness of claims 1-8, the appellant
argues, “even though both Shimoi and Applicant use the terms
‘write-back’ and ‘write-through’, the meanings of these terms
in Shimoi are significantly different than the corresponding
terms in Applicant's Claims 1 and 5 and in Applicants'
Specification.” (Appeal Br. at 6.)
The examiner does not contest that the meanings of the
terms in Shimoi are significantly different than the
corresponding terms in the appellant’s claims and
specification. Instead, he makes the following reply.
[A] term in a claim may not be given a meaning
repugnant to the usual meaning of that term, In re
Hill, 161 F.2d 367, 73 USPQ 482 (CCPA 1947). The
term "write-back" and "write-through" in claims 1
and 5 are used by the claim to mean "write-back
caches, unlike 'write-through' caches, do not
immediately write a modified memory word into the
main memory. Rather, the 'dirty' memory words
remain in the cache and are written back into the
main memory at the occurrence of a predetermined
event, such as a timer interrupt programmed to occur
periodically", while the accepted meaning is “ ... in
the write-back mode, the data temporarily stored in
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Application No. 08/479,245
the memory is transferred from the device controller
to the external device, and the write-through mode,
the data is directly transferred from the channel
system to the external storage device." (Examiner’s
Answer at 4 (internal footnote omitted).)
He concludes, “The reference reads clearly on the claims ...
if the meaning of all terms used in these claims are
consistent with their ordinary meaning in the art.” (Id. at
3-4.)
In short, the examiner admits that Shimoi would have
suggested the claimed limitations of a “‘write-back cache’”
and a “write-through cache” only if the limitations are given
the meaning that the reference assigns to the terms “write-
back” and “write-through.” For his part, the appellant argues
that, because the limitations should be given the meaning that
he assigns to the terms, Shimoi would not have suggested the
claimed invention. We agree with the appellant.
“Although words in a claim are generally given their
ordinary and customary meaning, a patentee may choose to be
his own lexicographer and use terms in a manner other than
their ordinary meaning, as long as the special definition of
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Application No. 08/479,245
the term is clearly stated in the patent specification or file
history.” Vitronics Corp. v. Conceptronic Inc., 90 F.3d 1576,
1582, 39 USPQ2d 1573, 1576 (Fed. Cir. 1996) (citing Hoechst
Celanese Corp. v. BP Chems. Ltd., 78 F.3d 1575, 1578, 38
USPQ2d 1126, 1129 (Fed. Cir. 1996); Hormone Res. Found., Inc.
v. Genentech, Inc., 904 F.2d 1558, 1563, 15 USPQ2d 1039, 1043
(Fed. Cir. 1990)).
Here, the appellant’s specification includes the
following statements.
Write-back caches, unlike "write-through" caches, do
not immediately write a modified memory word into
the main memory. Rather, the "dirty" memory words
remain in the cache and are written back into the
main memory at the occurrence of a predetermined
event .... (Spec. at 1.)
The following statement is also included in the specification:
“Under the write-through mode, DRAM 104 and cache 102 are
always synchronized ....” (Id. at 7.) These statements
clearly define the terms “write-back” and “write-through.”
Accordingly, the corresponding claimed limitations of a
“‘write-back cache’” and a “write-through cache,” should be
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Application No. 08/479,245
interpreted according to the definitions in the appellant’s
specification rather than the meaning that Shimoi assigns to
the terms. Given this interpretation, the examiner fails to
show a teaching or suggestion of these limitations in the
prior art by his own admission.
For the foregoing reasons, the examiner has not
established a prima facie case of obviousness. Therefore, we
reverse his rejection of claims 1-8 under 35 U.S.C. § 103.
CONCLUSION
To summarize, the examiner’s rejection of claims 1-8
under 35 U.S.C. § 103 is reversed.
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Application No. 08/479,245
REVERSED
JAMES D. THOMAS )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
KENNETH W. HAIRSTON ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
LANCE LEONARD BARRY )
Administrative Patent Judge )
Appeal No. 1997-4051 Page 10
Application No. 08/479,245
EDWARD C. KWOK
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