Ex Parte LI

Board of Patent Appeals and Interferences

Nov 23, 2009

10971651 (B.P.A.I. Nov. 23, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte WEIDONG LI
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Appeal 2009-001341
Application 10/971,6511
Technology Center 2100
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Decided: November 23, 2009
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Before LEE E. BARRETT, JAY P. LUCAS, and JOHN A. JEFFERY,
Administrative Patent Judges.

LUCAS, Administrative Patent Judge.

DECISION ON APPEAL

Appellant appeals from a final rejection of claims 1-27 under
authority of 35 U.S.C. § 134(a). The Board of Patent Appeals and
Interferences has jurisdiction under 35 U.S.C. § 6(b).
We reverse.

1 Application filed October 22, 2004. The real party in interest is Broadcom
Corporation.
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STATEMENT OF THE CASE
Appellant’s invention relates to a method of reducing power
consumption of handsets (i.e., mobile electronics devices such as PDAs and
cell phones) using a universal asynchronous receiver/transmitter (UART)
auto flow control (Spec. ¶¶ [02] and [09]). In the words of Appellant:
[T]he handset may enter a power saving mode such as
deep sleep mode during prolonged periods of inactivity.
When the ARM processor . . . prepares to enter a deep
sleep mode, a buffer such as a first in first out (FIFO)
buffer in the UART . . . may be checked for un-read data.
The UART . . . may process any un-read data in the FIFO
buffer. A request to send (RTS) bit in the UART . . .
may be asserted to inhibit data from the PC host . . . .
The ARM processor . . . may then enter a deep sleep
mode and may disable all clocks in the handset. While,
the handset is in deep sleep mode, any data received from
the PC host . . . may be queued on the PC host’s . . . side
until the RTS bit in the UART . . . is deasserted.
The ARM processor . . . may wake up after a short
period . . . to monitor its paging channel, which may be
adapted to carry signaling information for setup and
delivery of paging messages from a cell site to a handset.
The RTS bit in the UART. . . may be deasserted and any
pending received data that is queued up may be
processed.
(Spec. ¶¶ [25] and [26]).

Claim 1 is exemplary:
1. A method for reducing power consumption in
communication devices, the method comprising:

deasserting a signal when an on-chip processor
wakes up from a low power state, which indicates that an
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on-chip Universal Asynchronous Receiver/Transmitter
(UART) is ready to receive data; and

asserting at least said deasserted signal when said
on-chip UART is not ready to receive said data.

The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Olsen US 2003/0196127 A1 Oct. 16, 2003
Postman US 2004/0041029 A1 Mar. 04, 2004
(filed Feb. 11, 2003)
REJECTIONS
The Examiner rejects the claims as follows:
R1: Claims 1-8, 10-17, and 19-26 stand rejected under
35 U.S.C. § 102(e) for being anticipated by Postman.
R2: Claims 9, 18, and 27 stand rejected under 35 U.S.C. § 103(a)
for being obvious over Postman and Olsen.
Claim 1 is representative.

Appellant contends that the claimed subject matter is not anticipated
by Postman, or rendered obvious by Postman and Olsen because Postman
fails to teach the claim limitation “deasserting a signal when an on-chip
processor wakes up from a low power state.” (App. Br. 7, middle). The
Examiner contends that each of the claims is properly rejected (Ans. 10,
top).
Only those arguments actually made by Appellant have been
considered in this opinion. Arguments that Appellant could have made but
chose not to make in the Briefs have not been considered and are deemed to
be waived.
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ISSUE
The issue is whether Appellant has shown that the Examiner erred in
rejecting the claims under 35 U.S.C. §§ 102(e) and 103(a). The issue turns
on whether Postman discloses “deasserting a signal when an on-chip
processor wakes up from a low power state,” as recited in exemplary
claim 1.

FINDINGS OF FACT
The record supports the following findings of fact (FF) by a
preponderance of the evidence.
Disclosure
1. Appellant has invented a method, a storage device, and a system for
reducing power consumption of handsets through UART auto flow
control (Spec. ¶ [02]).

Postman
2. The Postman reference discloses that a microprocessor applies power to
an input device when data is being received. (See ¶ [0147].)
Olsen
3. The Olsen reference discloses an interrupt signal. (See ¶ [0049].)

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PRINCIPLE OF LAW
Appellant has the burden on appeal to BPAI to demonstrate error in
the Examiner’s position. See In re Kahn, 441 F.3d 977, 985-86 (Fed. Cir.
2006) (“[o]n appeal to [BPAI] , an applicant can overcome a rejection [under
§ 103] by showing insufficient evidence of prima facie obviousness or by
rebutting the prima facie case with evidence of secondary indicia of
nonobviousness.”) (quoting In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir.
1998)).

ANALYSIS
From our review of the administrative record, we find that the
Examiner has presented the rejections of Appellant’s claims under
35 U.S.C. §§ 102(e) and 103(a) on pages 3 to 6 of the Examiner’s Answer.
In opposition, Appellant presents one argument that is dispositive.

Argument with respect to the rejection
of claims 1 to 8, 10 to 17, and 19 to 26
under 35 U.S.C. § 102(e) [R1]

Appellant argues: “Postman [fails] to disclose deasserting a signal
when an on-chip processor wakes up from a low power state.” (App. Br.
7, middle).
In reply, the Examiner finds that the claim limitation “deasserting a
signal” can be equated with activating a Clear to Send signal on the bus line
370 at paragraph [0148] and in Figure 12A of the Postman reference (Ans. 6,
middle to 7 bottom). The Examiner finds that Postman teaches a
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microprocessor 38 applying power via a switch 194 and sending a bit or
control byte to an input device 352 via steps 404 and 406, when starting a
data transmission as disclosed in paragraph [0147] (id.). System
components, such as input device 352 and UART 372 (Fig. 12A) have
power, but the microprocessor does not have power or is in a low power
state, according to the Examiner’s analysis (id.). The Examiner finds that
data processing only starts when the processor wakes up from a low power
state (power is applied to the processor) (id.).
We find unconvincing the Examiner’s finding that Postman’s
microprocessor is in a low power state, because the reference says that a
microprocessor applies power to an input device when data is being received
(FF#2). Thus, the microprocessor is never actually powered down; instead,
the microprocessor is awaiting a data transfer (FF#2). Since the
microprocessor is never powered down, Postman would not have disclosed
or suggested to a person of ordinary skill in the art “deasserting a signal
when an on-chip processor wakes up from a low power state,” as claimed.
Accordingly, we find error in the Examiner’s analysis.
Since independent claims 10 and 19 recite substantially similar
subject matter as exemplary claim 1, we find error with respect to claims 10
and 19 for the same reasons as stated above.

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Arguments with respect to the rejection
of claims 9, 18, and 27
under 35 U.S.C. § 103(a) [R2]

We need not address Appellant’s arguments for claims 9, 18, and 27,
which depend on claims 1, 10, and 19, respectively. We find that Olsen fails
to cure the deficiencies found in Postman. Thus, for the reasons stated
above, we find error in the rejection [R2] of these claims.

CONCLUSION OF LAW
Based on the findings of facts and analysis above, we conclude that
the Examiner erred in rejecting claims 1-27 under rejections [R1 and R2],
respectively.

DECISION
The Examiner’s rejections [R1 and R2] of claims 1-27 are reversed.

REVERSED

llw

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