Ex Parte Lee et al

Board of Patent Appeals and Interferences

Nov 15, 2010

10457322 (B.P.A.I. Nov. 15, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte JI UNG LEE, GEORGE EDWARD POSSIN,
DOUGLAS ALBAGLI, and WILLIAM ANDREW HENNESSY
____________________

Appeal 2009-010104
Application 10/457,322
Technology Center 2600
____________________

Before ALLEN R. MacDONALD, THOMAS S. HAHN, and
CARL W. WHITEHEAD, JR., Administrative Patent Judges.

MacDONALD, Administrative Patent Judge.

DECISION ON APPEAL1

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, or for filing a request for rehearing,
as recited in 37 C.F.R. § 41.52, begins to run from the “MAIL DATE”
(paper delivery mode) or the “NOTIFICATION DATE” (electronic delivery
mode) shown on the PTOL-90A cover letter attached to this decision.
Appeal 2009-010104
Application 10/457,322

2
STATEMENT OF CASE
Introduction
Appellants appeal under 35 U.S.C. § 134 from a final rejection of
claims 1-3, 5, and 7-9. Claims 4 and 6 have been cancelled. We have
jurisdiction under 35 U.S.C. § 6(b).
Exemplary Claim
Exemplary independent claim 1 under appeal reads as follows:
1. An imager, comprising:
a plurality of pixels disposed on a substrate in an imaging array
pattern comprising rows and columns, each of said pixels comprising
a respective photosensor coupled to a respective thin film switching
transistor;
a plurality of scan lines disposed at a first level with respect to
said substrate along a first axis of said imaging array pattern, each row
of pixels in said imaging array pattern having a respective scan line,
each of said respective scan lines being coupled to a respective gate
electrode in said thin film switching transistors for each pixel disposed
along the respective row of pixels in said imaging array pattern;
a plurality of data lines disposed at a second level with respect
to said substrate along a second axis of said imaging array pattern,
each column of pixels in said imaging array pattern having a
corresponding data line, each of said respective data lines being
coupled to a respective readout electrode in said thin film switching
transistors for each pixel disposed along the respective column of
pixels in said imaging array pattern, and
a storage capacitor array comprising a plurality of capacitors
disposed on the substrate, each of the plurality of capacitors
comprising a first electrode, a second electrode and a dielectric
disposed between the first electrode and the second electrode; the first
electrode being coupled to a corresponding photosensor and a
corresponding thin film switching transistor, and the second electrode
coupled to a capacitor linear electrode.

Appeal 2009-010104
Application 10/457,322

3
Rejections
1. The Examiner rejected claims 1-3, 5, 7, and 8 under
35 U.S.C. § 102(b) as being anticipated by Van Berkel, U.S. Patent
5,349,174.
2. The Examiner rejected dependent claim 9 as being unpatentable
under 35 U.S.C. § 103(a) over the combination of Van Berkel with
Appellants’ admitted prior art.2
Appellants’ Contention
At page 8 of the Appeal Brief, Appellants contend that Van Berkel
does not support a prima facie case of anticipation because:
Van Berkel discloses coupling a capacitor in parallel with
the photosensor (Fig.6). Specifically, Van Berkel discloses that
a drain electrode of each TFT is connected to the parallel
arrangement of the photosensitive element and capacitor
(Column 8, lines 60-63). In Fig. 6 of Van Berkel, the
photosensitive elements and the capacitors are connected in
parallel in all pixels. Van Berkel further discloses that parallel
arrangement is connected to a common line, which is connected
to a reference potential. Van Berkel fails to disclose a capacitor
with the first electrode coupled to a corresponding photosensor
and a thin film switching transistor and the second electrode
coupled to a capacitor linear electrode.
Clearly, the capacitor and the photosensitive element are
in a parallel arrangement. (See, FIG. 6). Van Berkel fails to
disclose the first electrode coupled to a corresponding
photosensor and a thin film switching transistor and the second
electrode coupled to a capacitor linear electrode.

2 The rejection of dependent claim 9 under 103(a) is not separately argued
from the rejection of the independent claim under 102(b).
Appeal 2009-010104
Application 10/457,322

4
Issues on Appeal
Whether the Examiner has erred in rejecting claims 1-3, 5, 7, and 8 as
being anticipated; and
Whether the Examiner has erred in rejecting claim 9 as being obvious.

ANALYSIS
We have reviewed the Examiner’s rejections in light of Appellants’
contentions that the Examiner has erred.
We disagree with Appellants’ conclusions. We adopt as our own
(1) the findings and reasons set forth by the Examiner in the action from
which this appeal is taken and (2) the reasons set forth by the Examiner in
the Examiner’s Answer in response to Appellants’ Appeal Brief (with the
one exception set forth below). We concur with the conclusion reached by
the Examiner.
We disagree with the Examiner’s recognition that capacitor 241 and
photodiode 120 are not coupled in parallel in Figure 3 of Appellants’
disclosure. Contrary to Appellants’ implications in the arguments,
Appellants’ Specification explicitly states that the capacitors and diodes are
connected in parallel. (Spec. ¶ [0014]).

CONCLUSIONS
(1) The Examiner has not erred in rejecting claims 1-3, 5, 7, and 8 as
being anticipated under 35 U.S.C. § 102(b).
(2) The Examiner has not erred in rejecting claim 9 as being
unpatentable under 35 U.S.C. § 103(a).
(3) Claims 1-3, 5, and 7-9 are not patentable.
Appeal 2009-010104
Application 10/457,322

5

DECISION
The Examiner’s rejections of claims 1-3, 5, and 7-9 are affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(v).

AFFIRMED

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