Ex Parte Ladurner et alDownload PDFPatent Trial and Appeal BoardMay 9, 201813436380 (P.T.A.B. May. 9, 2018) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/436,380 03/30/2012 48154 7590 05/11/2018 SLATER MATSIL, LLP/Infineon 17950 PRESTON ROAD SUITE 1000 DALLAS, TX 75252 FIRST NAMED INVENTOR Markus Ladurner UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. INF 2011 P 51486 US 3118 EXAMINER 0 TOOLE, COLLEEN J ART UNIT PAPER NUMBER 2842 NOTIFICATION DATE DELIVERY MODE 05/11/2018 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): docketing@slatermatsil.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte MARKUS LADURNER and ROBERT ILLING Appeal2017-006149 Application 13/436,380 Technology Center 2800 Before GEORGE C. BEST, JENNIFER R. GUPTA and MICHAEL G. McMANUS, Administrative Patent Judges. BEST, Administrative Patent Judge. DECISION ON APPEAL The Examiner finally rejected claims 1-14, 18, 22-29, 32, and 34--36 of Application 13/436,380 under 35 U.S.C. § 103(a) as obvious. Final Act. (January 5, 2016). Appellants 1 seek reversal of these rejections pursuant to 35 U.S.C. § 134(a). We have jurisdiction under 35 U.S.C. § 6. For the reasons set forth below, we reverse. 1 Infineon Technologies AG is identified as the real party in interest. Appeal Br. 2 Appeal2017-006149 Application 13/436,380 BACKGROUND The '380 Application describes methods for controlling a semiconductor component. Spec. i-f 1. In particular, the Specification states: In conventional circuits such as power converters or motor drives, a transistor is used for supplying electric power to an inductive load. As high inductive voltages appear during off-commutation, the product of a voltage drop over the transistor and the transistor current transiently reaches high values. Hence, it is a goal of the present invention to efficiently operate a semiconductor component without exceeding the maximum energy strength of the component. Id. i-f 2. Claim 1 is representative of the '380 Application's claims and is reproduced below from the Claims Appendix. 1. A method for controlling a semiconductor component that comprises a semiconductor body and a transistor monolithically integrated in the semiconductor body; wherein the transistor comprises a first sub-transistor and a second sub- transistor; wherein the first sub-transistor comprises a first load contact, a second load contact, a first load path formed between the first load contact and the second load contact of the first sub-transistor, and a first control contact for controlling an electric current through the first load path; wherein the second sub-transistor comprises a first load contact, a second load contact, a second load path formed between the first load contact and the second load contact of the second sub-transistor, and a second control contact for controlling an electric current through the second load path; wherein the first load contact of the first sub-transistor is electrically connected to the first load contact of the second sub-transistor; 2 Appeal2017-006149 Application 13/436,380 wherein the second load contact of the first sub-transistor is electrically connected to the second load contact of the second sub-transistor; wherein the first sub-transistor has a first resistance in an ON-state and a higher second resistance in an OFF-state and the second sub-transistor has a third resistance in an ON-state and a higher fourth resistance in an OFF-state; wherein the method comprises: measuring a voltage drop over the first load path; switching on the first sub-transistor to the ON-state at a first point of time; and switching on the second sub-transistor to the ON- state at a second point of time subsequent to the first point of time in response to the measured voltage drop over the first load path falling below a first pre-defined value. Appeal Br. 15 (some indentation supplied; emphasis added). REJECTIONS On appeal, the Examiner maintains the following rejections: 1. Claims 1-10, 13, 14, 18, 22-27, 32, and 34--36 are rejected under 35 U.S.C. § 103(a) as unpatentable over the combination of Takemae2 and Rowhani. 3 Final Act. 2; Ans. 2. 2. Claims 11, 12, 28, and 29 are rejected under 35 U.S.C. § 103(a) as unpatentable over the combination of Takemae, Rowhani, and Chen. 4 Final Act. 11; Ans. 2. 2 US 2012/0268091 Al, published October 25, 2012. 3 US 8,015,419 B2, issued September 6, 2011. 4 US 6,414,524 Bl, issued July 2, 2002. 3 Appeal2017-006149 Application 13/436,380 DISCUSSION Rejection 1. Independent claims 1, 18, and 23 are subject to this ground of rejection. We begin our discussion of this rejection by focusing on independent claim 1. Appellants argue that the rejection of claim 1 should be reversed because the combination of Takemae and Rowhani does not describe or suggest each step of the claimed method. See Appeal Br. 9--12. In particular, Appellants argue that the Examiner erred by finding that Rowhani describes or suggests the claimed step of "switching on the second sub- transistor to the ON-state at the second point of time subsequent to the first point of time in response to the measured voltage drop over the first load path falling below a first pre-defined value." Id. In rejecting claim 1, the Examiner found that "Takemae does not specifically teach measuring a voltage drop over the first load path." Final Act. 3. The Examiner further found that Rowhani describes the step of measuring a voltage drop over the load path and switching a transistor to the ON-state in response to the measured voltage drop falling below a predetermined set point. Id. (citing Rowhani col. 7, 11. 15-57); see also Advisory Action 2 (citing Rowhani col. 7, 11. 38--42). For the reasons set forth below, we determine that the Examiner erred by finding that Rowhani describes or suggests the disputed limitation. The 4 Appeal2017-006149 Application 13/436,380 Examiner's finding that Rowhani describes this limitation is based upon an embodiment depicted in Rowhani's Figure 2. We reproduce Figure 2 below: .E.LQ.2 2Q.Q INITIAL FWR CTRL 204 INDICATOR 2(11 102 104 20B 206 Av'LD CIRCUIT :::r <( a:i 0 ..J .,, 0 ...I c MAIN PWR ~ > CTRL w ci INDICATOR C).~ l:'l. <( I- I- i!: ...l .....to < 104 Oc ix: >> Cl: > - w I ~· 5 <~ I ow z- ll. I 0 t;; u • w e:: II) u.. Rowhani' s Figure 2 is a block diagram depicting one example of a circuit having a first power rail, a secondary voltage rail, at least one main power gate switch, at least one soft start power gate switch, and an automatic voltage level detection (A VLD) circuit for selectively charging the second voltage rail. Rowhani col. 4, 11. 29-34. As Appellants argue, the relevant portion of Rowhani does not describe or suggest measuring a voltage drop across any load path. Rather, Rowhani describes measuring the voltage of secondary voltage rail 104 relative to ground potential. Rowhani col. 6, 1. 65---col. 7, 1. 25. Furthermore, Rowhani does not describe or suggest the step of turning a sub-transistor to the ON-state "in response to the measured voltage drop over the first load path falling below a first pre-defined value" as required by 5 Appeal2017-006149 Application 13/436,380 claim 1. Instead, Rowhani specifically states that main power gate switch 206 is turned on when the secondary voltage rail 104 voltage level exceeds a pre-determined threshold. Rowhani col. 7, 11. 19--25. In view of the foregoing, we reverse the Examiner's rejection of claim 1 as unpatentable over the combination of Takemae and Rowhani. Because claims 2-10, 13, and 14 depend from claim 1, we also reverse the rejection of these claims. Independent claims 18 and 23 contain limitations that correspond to the limitation in claim 1 discussed above. See Appeal Br. 12. Accordingly, we also reverse the rejection of these claims and of dependent claims 22, 24--27, and 34--36. Rejection 2. The Examiner rejected claims 11, 12, 28, and 29 as unpatentable over the combination of Takemae, Rowhani, and Chen. Final Act. 11. These claims depend from independent claim 1 or independent claim 23. For the reasons set forth above, we have reversed the rejection of these independent claims. The Examiner does not rely upon Chen as remedying the deficiencies in the disclosure of the combination of Takemae and Rowhani. We, therefore, also reverse this rejection. CONCLUSION In view of the foregoing, we reverse the rejection of claims 1-14, 18, 22-29, 32, and 34--36 of the '380 Application. REVERSED 6 Copy with citationCopy as parenthetical citation