Ex parte Kumar

Board of Patent Appeals and Interferences

Sep 16, 1997

08047162 (B.P.A.I. Sep. 16, 1997)

Application for patent filed April 14, 1993. According to1
appellant, the application is a continuation of Application
07/431,924, filed November 6, 1989, now abandoned.
-1-
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered today (1) was
not written for publication in a law journal and (2) is not binding
precedent of the Board.
Paper No. 23
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte NIRAJ KUMAR
____________
Appeal No. 95-3265
Application 08/047,1621
____________
ON BRIEF
____________
Before KRASS, JERRY SMITH and CARMICHAEL, Administrative Patent
Judges.
KRASS, Administrative Patent Judge.
DECISION ON APPEAL
Appeal No. 95-3265
Application 08/047,162
-2-
This is a decision on appeal from the final rejection
of claims 1 through 22, all of the claims pending in the
application.
The invention pertains to techniques for combining one
or more existing integrated circuits onto a single integrated
circuit chip.
Representative independent claim 1 is reproduced as
follows:
1. A method of combining polygon databases defining
mask sets of at least first and second integrated circuit cells
to produce a polygon database defining a mask set for a single
integrated circuit that combines the functions of the first and
second integrated circuit cells, wherein said databases define
the respective first and second cells with at least one design
rule specified differently, comprising the steps of:
editing the polygon databases for at least one of the
first and second integrated circuit cells by making at least one
global change to its polygon data in a manner to cause said at
least one design rule to be specified the same in the databases
of at said at least first and second cells, and
combining the polygon databases in a manner that the
data of the first and second cells occupy non-overlapping first
and second respective mask area regions of the combined
integrated circuit mask set.
The examiner cites the following reference:
Morishita et al. (Morishita) 5,046,012 Sep. 3, 1991
(filed June 15, 1989)
Appeal No. 95-3265
Application 08/047,162
-3-
Claims 1 through 22 stand rejected under 35 U.S.C. 103
as unpatentable over Morishita.
Reference is made to the brief and answer for the
respective positions of appellant and the examiner.
OPINION
We reverse.
The examiner has the initial burden of presenting a
prima facie case of unpatentability. If the examiner does not
present a prima facie case of unpatentability, then, without
more, the applicant is entitled to grant of the patent. If that
burden is met, the burden of coming forward with evidence or
argument shifts to the applicant. After evidence or argument is
submitted by the applicant, patentability is determined on the
totality of the record, by a preponderance of the evidence with
due regard to the persuasiveness of the arguments. In re
Oetiker, 977 F.2d 1443, 1445, 24 USPQ2d 1443, 1444 (Fed. Cir.
1992).
The examiner's rejection relies on Morishita which the
examiner states, at page 4 of the answer,
teaches as a background the well known
art of combining mask set databases of
different design rules to generate a new
mask set database for a more complex IC
Appeal No. 95-3265
Application 08/047,162
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with common design rules (col.1) in the
context of hierarchical pattern
processing and specifically teaches the
concept of defining an area for limiting
modification (resizing) of data to only
those that falls [sic, fall] within the
defined area (Fig. 8B).
The examiner then goes on to conclude that the claimed subject
matter would have been obvious because it "is pure common sense"
[answer, page 5] to limit mask areas of modification to one mask
set when two mask sets of different design rules are put side by
side, that labeling a defined area a "phantom mask" does not
distinguish over the "background prior art or the concept
illustrated in Morishita et al...and that using a global command
in place of plural individual commands are [sic] merely software
assisted convinience [sic, convenience]" [answer, page 5]. The
examiner further states, at page 5 of the answer, that the use of
known software tools "does not constitute an invention...when the
method of making essentially the same changes for generating a
new mask set are known."
Thus, the examiner has employed Morishita to illustrate
some broad "concept" of what the examiner considers the instant
claimed invention to be and buttresses this with unsupported
allegations of what would be "pure common sense" and "known" to
arrive, ostensibly, at the instant claimed subject matter.
Appeal No. 95-3265
Application 08/047,162
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However, the examiner has not applied Morishita to the
instant claim language in any meaningful way in order to clearly
show exactly how one differs from the other so that the examiner
can then clearly show how, and why, in spite of these
differences, the instant claimed subject matter would have been
obvious, within the meaning of 35 U.S.C. 103.
In fact, from our review of Morishita, it appears that
the reference has very little relevance to the instant claimed
subject matter. Other than a mention in column 1 of the
reference of "modifying a design rule" [line 46] and "a merge
process" [line 50] for eliminating overlap generated between
patterns, Morishita appears to be directed to something very
different from the instant claimed invention.
Morishita is interested in reducing processing time in
pattern processing whereas the instant claimed subject matter is
limiting the number of commands necessary to alter patterns of
the mask layout database for an integrated circuit using
different design rules. As appellant states, at page 15 of the
brief,
[t]he specific design rules recited in
the claims as being conformed are not
even mentioned in the reference. Nor is
the use of a phantom mask for this
purpose.
Appeal No. 95-3265
Application 08/047,162
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Further, as appellant points out, at page 16 of the brief,
Morishita is deficient in at least three aspects which form part
of each and every one of the twenty-two claims on appeal:
(1) the combining of two integrated
circuit mask databases, (2) the method
to combine two or more databases of
circuits executed with different design
rules, and (3) the use of a global or
single set of commands in pattern
generating software to make such changes
to all the polygons necessary to effect
a design rule change in that database.
In response to this argument, at page 6 of the answer,
the examiner contends that Morishita clearly teaches combining
mask set databases, identifying Figs. 1A, 1B and 2, along with
column 1, and further contends that this is well known according
to the background section of the instant specification. The
examiner also contends that the steps are also described in
"other cited references such as Pryor et al."
First, with regard to the reference to "other cited
references," such references form no part of the rejection and
may not be relied on by the examiner. See In re Hoch, 428 F.2d
1341, 1342 n.3, 166 USPQ 406, 407 n.3 (CCPA 1970). Next, we have
reviewed the portions of Morishita referred to by the examiner
and while it appears that Morishita discloses a merge process to
eliminate overlap in a resizing process, it is unclear whether
Appeal No. 95-3265
Application 08/047,162
This is a reasonable assumption in view of appellant's2
declaration filed May 25, 1994, wherein, at page 2 thereof,
appellant/declarant states:
We had before combined two circuit cells
from existing products of Zilog wherein
the two circuits were designed using the
same design rules.
Page 3, lines 3-22, of the instant specification appears to3
suggest at least that such combinations, while not always easy,
have been made.
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there is a combination of two integrated circuit mask databases,
as claimed.
With regard to admissions in the specification
background, the examiner has not specifically identified on what
portion of the background he relies. However, even if we agree
with the examiner that the general combination of two integrated
circuit mask databases was known , and that even the combination2
of two integrated circuit mask databases of circuits executed
with different design rules appears to have been known, there is3
clearly nothing in the specification background, in Morishita, or
in appellant's declarations that would suggest that it was known
to combine two or more databases of circuits executed with
different design rules in the specific, simplified manner
claimed. That is, we find no suggestion of using a global or
single set of commands in pattern generating software to make
Appeal No. 95-3265
Application 08/047,162
-8-
changes necessary to effect a design rule change in an integrated
circuit mask database, as claimed. Nor do we find any suggestion
of the use of a "phantom mask," as claimed, in Morishita.
We are not convinced by the examiner's reasoning that
the existence of known software for making modifications to data
representative of graphical elements easier would, itself, have
provided sufficient motivation for applying such software in the
manner claimed. We are also not convinced by the examiner's
contention that the claimed global command is nothing more than a
macro-command used for repeated plural uses of elementary
commands which would have been obvious to implement as claimed.
Although the examiner has contended that much of the
claimed subject matter is nothing more than "pure common sense"
and what was known in the art, this has been challenged by
appellant. For example, see pages 16-17 of the brief, wherein
appellant states that the examiner "has not offered any evidence
of prior art which teaches" the use of pattern generation
software to effect global changes as claimed, making possible the
production of a single integrated circuit chip product from data
of two or more chips specified with different design rules, nor
has any evidence been offered "which suggests such database
Appeal No. 95-3265
Application 08/047,162
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editing in order to make the design rules of the combined
database be the same, as recited in claims 1-9 and 14-22."
When the examiner is so challenged as to what was well
known and "pure common sense," the examiner is put to his proofs
to establish that which the examiner alleges to be well known by
producing objective evidence to support the examiner's
allegations. The examiner has failed in this burden in the
instant case.
Appeal No. 95-3265
Application 08/047,162
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The examiner's decision rejecting claims 1 through 22
under 35 U.S.C. 103 over Morishita is reversed.
REVERSED

ERROL A. KRASS )
Administrative Patent Judge )
)
)
)
JERRY SMITH ) BOARD OF PATENT
Administrative Patent Judge ) APPEALS AND
) INTERFERENCES
)
)
JAMES T. CARMICHAEL )
Administrative Patent Judge )

Appeal No. 95-3265
Application 08/047,162
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Gerald P. Parsons
Majestic, Parsons, Siebert & Hsue
Four Embarcadero Center
Suite 1450
San Francisco, CA 94111-4121