Ex Parte Kuehn et alDownload PDFPatent Trial and Appeal BoardDec 31, 201310899200 (P.T.A.B. Dec. 31, 2013) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________ Ex parte INGO KUEHN, UWE ECKHARDT, AXEL WACHTLER, and FALK TISCHER ____________ Appeal 2011-007106 Application 10/899,200 Technology Center 2400 ____________ Before MAHSHID D. SAADAT, CARLA M. KRIVAK, and PETER P. CHEN, Administrative Patent Judges. SAADAT, Administrative Patent Judge. DECISION ON APPEAL Appeal 2011-007106 Application 10/899,200 2 Appellants appeal under 35 U.S.C. § 134(a) from the Final Rejection of claims 1-8, 10-24, 26, 27, 29-41, 43-57, 59, 60, and 62-65.1 We have jurisdiction under 35 U.S.C. § 6(b). We reverse. STATEMENT OF THE CASE Introduction Appellants’ invention relates to techniques for speeding up the cipher key search in WLAN receivers and reducing the amount of memory needed (see Spec. 3:11-13). Exemplary Claim Claim 1 is exemplary and reads as follows with the disputed limitation in italics: 1. A WLAN (Wireless Local Area Network) receiver comprising: a ciphering key management unit configured to control use of cipher keys for decrypting received data, wherein said ciphering key management unit comprises a memory unit configured to store a hash table having a first and a second table portion, said first table portion including transmitter address data comprised of a predetermined number of lower bits of a respective transmitter address, said second table portion including at least one cipher key, wherein said ciphering key management unit is configured to determine whether a transmitter address obtained from an incoming data frame matches transmitter address data in said first table portion, and if so, determine a cipher key corresponding to the transmitter address, wherein the cipher key is included in said second table portion and is configured for use in decrypting said received data; 1 Claims 9, 25, 28, 42, 58, and 61 have been cancelled. Appeal 2011-007106 Application 10/899,200 3 wherein said transmitter address data included in said first table portion is comprised of a number of lower bits of a respective transmitter address, wherein said first table portion comprises a number of sub-fields, each configured to store transmitter address data of a different transmitter, wherein the ciphering key management unit is configured to dynamically change the number of sub-fields by executing software instructions, and wherein said ciphering key management unit is configured to reduce said number of lower bits responsive to an increase in said number of sub-fields. The Examiner’s Rejections The Examiner rejected claims 1, 8, 10-12, 14, 16, 19-21, 29, 32-34, 41, 43-45, 47, 49, 52-54, 59, 60, and 62 under 35 U.S.C. § 103(a) as being unpatentable over Akachi (EP 1 143 659 A1), Winell (US 6,625,145 B1), and Dey (US 5,857,214). (Ans. 5-9). The Examiner further relied on Chen (US 2006/0174336 A1) to reject claims 2, 7, 35, and 40 (Ans. 10); Cam-Wignet (Nancy Cam-Wignet, et al., Security Flaws in 802.11 Data Link Protocols, Communications of the ACM, Vol. 46, no. 5, May 2003, pp. 35-39) to reject claims 3-6, 22-24, 36- 39, and 55-57 (Ans. 11); Cooper (US 6,400,286 B1) to reject claims 13, 15, 46, and 48 (Ans. 12); Kimmel (US 6,031,935) to reject claims 17, 18, 50, and 51 (Ans. 13); Ebeshu (US 2002/0029321 A1) to reject claims 26 and 27 (Ans. 14); and Lowensohn (US 7,069,444 B2) to reject claims 30, 31, and 63-65 (Ans. 15). ANALYSIS At pages 8-10 of the Appeal Brief, Appellants’ arguments with respect to the obviousness rejection of independent claim 1 focus on the Appeal 2011-007106 Application 10/899,200 4 contention that the cache size selection taught by Dey relates to a fixed size cache selected from a predesigned set of sizes. Appellants contrast the teachings of Dey with the claim feature “‘configured to dynamically change the number of sub-fields [of a first table portion of a hash table stored in a memory unit] by executing software instructions’” recited in claim 1 (App. Br. 9). Appellants further challenge the Examiner’s proposed rejection by asserting that: such a conclusion is speculation on the Examiner’s part, as Dey is primarily directed to selecting a cache size during the design phase, and setting hardware and/or software to cause this cache size to be implemented as a fixed cache size once the designed microprocessor is implemented in silicon. (Reply Br. 4) (emphasis omitted). We agree with Appellants. We find that Dey, at best, merely discloses a microprocessor having a flexible design “which will allow the designer to select a cache size which is optimum” (see col. 2, ll. 39-49). While Dey discusses cache size selection, we find that the Examiner’s rejection improperly interprets this selection during the design process as the claimed ability to “dynamically change” the cache size ” during operation of the microprocessor. As asserted by Appellants (Reply Br. 4), the Examiner has not identified any teaching in Dey that relates to “changing a cache size at any time subsequent to completing the design phase, much less dynamically changing a cache size during operation of the microprocessor upon which the cache is to be implemented.” (Reply Br. 4) (emphasis omitted). Appeal 2011-007106 Application 10/899,200 5 CONCLUSION Based on the analysis above, we are persuaded by Appellants’ contentions that the Examiner erred in rejecting claim 1 for obviousness under 35 U.S.C. § 103(a). Therefore, in view of the above discussion and the failure of the Examiner to point to any teachings in the other applied prior art references to overcome the deficiencies of Dey, we do not sustain the rejection of claim 1, independent claims 32, 33, and 34, which recite similar features related to dynamically changing the sub-fields, or the remaining claims dependent thereon. DECISION The decision of the Examiner to reject claims 1-8, 10-24, 26, 27, 29- 41, 43-57, 59, 60, and 62-65 is reversed. REVERSED msc Copy with citationCopy as parenthetical citation