Ex Parte KobayashiDownload PDFPatent Trial and Appeal BoardDec 2, 201412285762 (P.T.A.B. Dec. 2, 2014) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/285,762 10/14/2008 Koji Kobayashi 338861/07 9787 21254 7590 12/03/2014 MCGINN INTELLECTUAL PROPERTY LAW GROUP, PLLC 8321 OLD COURTHOUSE ROAD SUITE 200 VIENNA, VA 22182-3817 EXAMINER TSAI, SHENG JEN ART UNIT PAPER NUMBER 2136 MAIL DATE DELIVERY MODE 12/03/2014 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE PATENT TRIAL AND APPEAL BOARD ____________________ Ex parte KOJI KOBAYASHI ____________________ Appeal 2012-006653 Application 12/285,762 Technology Center 2100 ____________________ Before CAROLYN D. THOMAS, JOHN A. EVANS, and JOHN F. HORVATH, Administrative Patent Judges. HORVATH, Administrative Patent Judge. DECISION ON APPEAL Appeal 2012-006653 Application 12/285,762 2 STATEMENT OF THE CASE Appellant seeks review under 35 U.S.C. § 134 of the Examiner’s rejection of claims 1–16. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM. SUMMARY OF THE INVENTION The invention is directed to an apparatus and method for controlling a load/store1 queue between a cache memory and a main memory. Spec. 1:18–20. Claim 1, reproduced below, is illustrative of the claimed subject matter: 1. An apparatus, comprising: a queue element which stores a plurality of memory access requests to be issued to a memory device, the memory access requests including a store request and a load request; and a controller that counts a number of new memory access requests, issued subsequent to the store request and retained in the queue element; wherein, when the number of the new memory access requests reaches a predetermined value, all store requests retained in the queue element are issued to the memory device. 1 A store request is a request to write data to the main memory, while a load request is a request to read data from the main memory. The terms store and write are therefore used interchangeably herein; as are the terms load and read. Appeal 2012-006653 Application 12/285,762 3 REJECTIONS 1. Claims 1–13, 15 and 16 stand rejected under 35 U.S.C §103(a) as unpatentable over Rotithor2 and Johnson.3 Ans. 4. 2. Claim 14 stands rejected under 35 U.S.C § under 35 U.S.C §103(a) as unpatentable over Rotithor, Johnson, and Wheeler.4 Ans. 9–10. ANALYSIS We have reviewed the Examiner’s rejections in light of Appellant’s arguments that the Examiner has erred. We are not persuaded by Appellant’s arguments, and affirm the Examiner’s rejections for the following reasons. The Examiner finds Rothiter teaches a queue for storing load and store memory access requests, and a controller for controlling the queue. Final Action 5 (citing Rothiter ¶¶ 18–19, Fig. 1). The Examiner finds Johnson teaches a controller for counting a number of store requests held in a memory queue, including a number of store requests after an initial store request, and issuing the store requests to the memory when the number reaches a threshold. Id. at 5–6 (citing Johnson ¶ 61). Therefore, the Examiner finds the combined teachings of Rothiter and Johnson was within the knowledge of a person of ordinary skill in the art at the time of Appellant’s invention, because Rothiter’s queue for holding store and load requests has a finite capacity (“a threshold of the number of requests it [sic] can hold”), and Johnson’s controller would prevent Rothiter’s queue from 2 U.S. Patent Publ. No. 2005/0204094 A1, published Sep. 15, 2005 3 U.S. Patent Publ. No. 2005/0193166 A1, published Sep. 1, 2005 4 U.S. Patent Publ. No. 2006/0069882 A1, published Mar. 30, 2006 Appeal 2012-006653 Application 12/285,762 4 overflowing by flushing load requests when the queue was full or approaching full. Ans. 13–14; Final Action 6. Appellant argues the Examiner erred in rejecting claim 1 because Johnson only teaches counting store requests, whereas Appellant counts both read and store requests. App. Br. 8. The Examiner finds claim 1 recites counting a number of new memory access requests as opposed to counting all or every new memory access request, and does not recite the type of memory access request counted. Ans. 11–12. Therefore, the Examiner finds Johnson’s controller for counting a number of new store requests teaches a controller that counts a number of new memory access requests. Ans. 12. We agree with the Examiner’s findings. The plain and ordinary meaning of counting a number of new memory access requests is counting one or more new load or store requests, not every new load and store request as Appellant contends. Therefore, we agree with the Examiner that Johnson’s controller counts a number of new memory access requests. Appellant next argues that because the other processors in figure 2 of Appellant’s Brief cannot read the latest data, Johnson’s controller cannot count a number of new memory access requests, even if the number were limited to a number of new store requests as the Examiner found. Reply Br. 3–4. We are not persuaded by Appellant’s argument. Claim 1 recites a controller that counts a number of new memory access requests held in a queue for a memory, not other processors that may share access to the memory with the controller. Appellant has not explained why Johnson’s controller cannot count a number of new memory access requests in Johnson’s queue simply because other processors—not recited in claim 1—cannot read the memory to which the controller has access through the queue. Moreover, Appellant cites no authority for figures 1–3 in Appeal 2012-006653 Application 12/285,762 5 Appellant’s Brief, nor for Appellant’s explanation of what they purportedly teach. The cited figures are neither disclosed nor described in Appellant’s Specification, Rothiter, or Johnson. An “[a]ttorney’s argument in a brief cannot take the place of evidence.” In re Pearson, 494 F.2d 1399, 1405 (CCPA 1974). We are therefore unpersuaded by Appellant’s argument. Appellant next argues that the Examiner erred in rejecting claim 1 because by counting both load and store requests the claimed invention “prevent[s] ‘the sinking of the store requests’,” whereas by counting only store requests, the combination of Rothiter and Johnson “raises ‘the sinking of the store requests.’” App. Br. at 7. We are not persuaded by Appellant’s argument. First, as noted supra, we do not find claim 1 to require counting both load and store requests. Second, as the Examiner finds, claim 1 does not recite “preventing the sinking of store requests.” Ans. 12–13. It is a bedrock principal of patent law that the claims define the invention, and that unclaimed features cannot impart patentability to the claims. In re Hiniker Co., 150 F.3d 1362, 1368-69 (Fed. Cir. 1998); In re Self, 671 F.2d 1344, 1348 (CCPA 1982). Therefore, whatever advantages may be achieved by the invention—and we make no findings on any such advantages—do not inform our decision. For at least these reasons, we are not persuaded by Appellant’s arguments. Finally, Appellant argues Rothiter and Johnson are unrelated references, do not teach or suggest their combination, and there is no motivation for a person of skill in the art to combine them. App. Br. at 9. We are not persuaded by Appellant’s arguments. First, in saying Rothiter and Johnson are unrelated references, we do not understand Appellant’s to argue they are non-analogous art, but simply Appeal 2012-006653 Application 12/285,762 6 that they are not related to the same patent family. Regardless, both Rothiter and Johnson are directed to memory and memory controllers, and are therefore analogous art. Second, Appellant does not specifically challenge the Examiner’s finding that combining Johnson’s controller with Rothiter’s load and store queue in order to prevent the overflow of Rothiter’s queue would have been within the knowledge of a person of ordinary skill in the art at the time of Appellant’s invention. See Ans. 13–14; Final Action 6. Instead, Appellant argues the references themselves lack a teaching or suggestion to combine, App. Br. 9, and the combination would not work because it “raises ‘the sinking of the store requests.’” Reply Br. 4. But the Examiner’s motivation to combine was not to prevent “‘the sinking of the store requests.’” Rather, it was to prevent overflow of Rothiter’s load and store queue. See Ans. 13–14. And the Examiner found the knowledge to do so was within the level or ordinary skill in the art. Id. at 14. Appellant did not challenge these findings, with which we agree, and which we adopt as our own. A combination of familiar elements, like Rothiter’s load and store queue and Johnson’s queue controller that counts queue entries “is likely to be obvious when it does no more than yield predictable results.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In view of the above, we do not find the Examiner erred in rejecting claim 1 under 35 U.S.C. § 103(a) over Rothiter in view of Johnson, and sustain the Examiner’s rejection. Appellant argues for the patentability of claim 7 on the same grounds as claim 1, and does not separately argue for the patentability of claims 2–6 or 8–16. We therefore sustain the Examiner’s rejection of claims 2–7 and 8–16 for the same reasons as claim 1. App. Br. 6–9. Appeal 2012-006653 Application 12/285,762 7 DECISION For the reasons indicated above, the Examiner’s rejection of claims 1–16 is AFFIRMED. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED pgc Copy with citationCopy as parenthetical citation