Ex Parte Kartal et al

Patent Trial and Appeal Board

Sep 2, 2016

10392509 (P.T.A.B. Sep. 2, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
10/392,509 0312012003 Veli Kartal
57579 7590 09/07/2016
MURPHY, BILAK & HOMILLER/INFINEON TECHNOLOGIES
1255 Crescent Green
Suite 200
CARY, NC 27518
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
1012-0004 8930
EXAMINER
MAI,ANHD
ART UNIT PAPER NUMBER
2829
NOTIFICATION DATE DELIVERY MODE
09/07/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
official@mbhiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte VELI KART AL and HANS-JOACHIM SCHULZE
Appeal2015-002173
Application 10/392,509
Technology Center 2800
Before ROBERT E. NAPPI, MARC S. HOFF, and
BRADLEY W. BAUMEISTER, Administrative Patent Judges.
NAPPI, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
This is a decision on appeal under 35 U.S.C. § 134(a) of the
Examiner's Final Rejection of claim 30, which is the only claims pending in
this application.
We reverse.
INVENTION
The invention is directed to a semiconductor device with a doped
silicon substrate and a doped epitaxial layer, wherein the epitaxial layer has
a mean free path length smaller than that of the semiconductor substrate.
See pages 1 and 2 of Appellants' Specification.
Appeal2015-002173
Application 10/392,509
CLAI1\1ED SUBJECT l\1ATTER
Claim 30 is representative of the invention and reproduced below:
30. A Semiconductor device with a pn-junction, the
semiconductor device comprising:
a substrate crystal of doped silicon with a predefined mean
free path length for free charge carriers; and
an epitaxial crystal layer of an n-doped silicon on the
substrate crystal, wherein a pn-junction is formed between the
semiconductor crystal and the crystal layer or at a side of the
crystal layer opposite to the semiconductor crystal,
wherein the crystal layer comprises at least locally non-
doping germanium atoms or carbon atoms, or both, as scattering
centers introduced during the crystal growth and the crystal layer
has a mean free path length for free charge carriers smaller than
the predefined mean free path length, and
wherein the mean free path length in the n-doped crystal
layer varies such that the mean free path length is more reduced,
relative to the predefined mean free path length, in those areas of
the n-doped crystal layer in which an electrical field strength is
higher when a blocking voltage is applied to the pn-junction, and
such that the mean free path length is reduced less, relative to the
predefined mean free path length, in those areas of the n-doped
crystal layer where the field strength is smaller when a blocking
voltage is applied to the pn-junction.
REFERENCES AND REJECTIONS AT ISSUE
The Examiner has rejected claim 30 under 35 U.S.C. § 112, first
paragraph, as failing to comply with the written description requirement and
the enablement requirement. Answer 2--4. 1
1 Throughout this Opinion we refer to the Appeal Brief (filed July 3, 2014)
("Appeal Br.") and the Examiner's Answer (mailed Sept. 9, 2014) ("Ans.").
2
Appeal2015-002173
Application 10/392,509
The Examiner has rejected claim 30 under 35 U.S.C. § 112, second
paragraph, as failing to particularly point out and distinctly claim the subject
matter. Answer 4--5.
The Examiner has rejected claim 30 under 35 U.S.C. § 102(b) as
anticipated or under 35 U.S.C. § 103(a) as obvious over Ogino
(US 5,023,696). Answer 6-8.
ANALYSIS
Rejections under 35 U.S.C. § 112 first paragraph
The Examiner rejected claim 30 under 35 U.S.C. § 112, first
paragraph, as there is no written description of; nor does the Specification
enable a skilled artisan to create: a pn-junction formed between the
semiconductor crystal and the crystal layer as recited in claim 30. The
Appellants provides an explanation of where the Specification provides
support for the limitation directed to a pn-junction formed between the
semiconductor crystal and the crystal layer. 2 App. Br. 5-10. We have
reviewed the sections of the Specification cited by the Appellants and the
Examiner. We concur with the Appellants, that the Specification provides
sufficient evidence to show possession of the invention, and would enable a
skilled artisan to make the claimed device. Thus, we do not sustain the
Examiner's written description and enablement rejections of claim 30 under
35 U.S.C. § 112, first paragraph.
2 We construe the limitation directed to "the semiconductor crystal" to refer
to the claimed "substrate crystal of doped silicon" and limitation "the crystal
layer" to refer to the claimed "epitaxial crystal layer."
3
Appeal2015-002173
Application 10/392,509
Rejections under 35 U.S.C. § 112 second paragraph
The Examiner rejected claim 30 under 35 U.S.C. § 112, second
paragraph, determining there is insufficient antecedent basis in for the
limitation of the pn junction at the side of the crystal layer opposite the
semiconductor crystal. Appellants argue that this limitation is referring to
the surface 202. App. Br. 12-13. We concur with Appellants that the
claim 30 recitation, "wherein the pn junction is formed ... at a side of the
crystal layer opposite the semiconductor crystal," clearly is directed to and
describes the pn-junction 202 shown in Appellants' Figure 3 and 4.
Accordingly, we do not sustain the Examiner's rejection of claim 30 under
35 U.S.C. § 112, second paragraph.
Rejections under 35 U.S.C. § 102(b) or under 35 U.S.C. § 103(a)
Appellants argue that the Examiner's rejection based upon Ogino is in
error as the reference does not teach the limitation directed to an epitaxial
layer; rather the layer the Examiner relies upon to teach this limitation is an
ion-implanted layer. App. Br. 12. The Examiner considers the recitation of
an epitaxial layer to be a product-by-process limitation and, as such, is
taught by Ogino' s layer 14, which is formed by ion implantation. Answer
14--15.
We disagree with the Examiner that Ogino teaches the claimed
epitaxial layer. The Examiner has provided insufficient technical evidence
to support the legal conclusion that no structural difference exists between
an ion-implanted layer of a bulk semiconductor substrate and an epitaxially
grown substrate.
4
Appeal2015-002173
Application 10/392,509
\Ve also note that the Examiner has only provided an anticipation
analysis, but not provided any obviousness analysis with respect to this
limitation. Accordingly, we are persuaded of error in the Examiner's
rejection and do not sustain the Examiner's rejection of claim 30 under
35 U.S.C. § 102(b)/103(a).
DECISION
The decision of the Examiner to reject claims 30 is reversed.
REVERSED
5