Ex Parte Kang

Board of Patent Appeals and Interferences

Jan 25, 2011

11229684 (B.P.A.I. Jan. 25, 2011)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte KI-HO KANG
____________

Appeal 2009-008720
Application 11/229,684
Technology Center 2100
____________

Before LANCE LEONARD BARRY, JAY P. LUCAS, and
JOHN A. JEFFERY, Administrative Patent Judges.

JEFFERY, Administrative Patent Judge.

DECISION ON APPEAL1
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner’s
rejection of claims 1-20. We have jurisdiction under 35 U.S.C. § 6(b). We
affirm-in-part.

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, or for filing a request for rehearing,
as recited in 37 C.F.R. § 41.52, begins to run from the “MAIL DATE”
(paper delivery mode) or the “NOTIFICATION DATE” (electronic delivery
mode) shown on the PTOL-90A cover letter attached to this decision.
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STATEMENT OF THE CASE
Appellant’s invention relates to a photolithographic system to control
wafer manufacturing. See generally Spec. ¶ 0002. Claim 1 is illustrative:
1. A photolithography system, comprising:
a photolithography apparatus adapted to perform a
photolithography process on a wafer; and
a control system adapted to control the photolithography apparatus,
the control system including:
a measurement unit adapted to measure one or more characteristics
of a feature formed on the wafer by the photolithography process and
to generate therefrom measured data;
a first server adapted to store a destination address where the
measured data may be remotely accessed, and adapted to transmit the
measured data to the destination address via a network connection.

The Examiner relies on the following as evidence of unpatentability:
Diggin US 6,580,961 B2 June 17, 2003
Ho US 2004/0046264 A1 Mar. 11, 2004
Quinones US 2004/0162063 A1 Aug. 19, 2004
Baek US 2005/0121770 A1 June 9, 2005
Zohar US 2005/0176177 A1 Aug. 11, 2005
Cho US 2006/0060960 A1 Mar. 23, 2006
(filed May 13, 2005)

THE REJECTIONS
1. The Examiner rejected claims 1-4, 6, 8-11, 13-18, and 20 under
35 U.S.C. § 102(b) as anticipated by Diggin. Ans. 3-4.2

2 Throughout this opinion, we refer to (1) the Appeal Brief filed August 6,
2008 and (2) the Examiner’s Answer mailed October 28, 2008.
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2. The Examiner rejected claims 5, 12, and 19 under 35 U.S.C.
§ 103(a) as unpatentable over Diggin and Appellant’s Admitted Prior Art
(AAPA). Ans. 4-5.
3. The Examiner rejected claim 7 under 35 U.S.C. § 103(a) as
unpatentable over Diggin and Quinones. Ans. 5-6.

THE ANTICIPATION REJECTION OVER DIGGIN
Regarding representative independent claim 1, the Examiner finds that
Diggin discloses all recited limitations. Ans. 3-4. Appellant principally
argues that Diggin does not disclose or relate to photolithographic systems
having a photolithography apparatus. Br. 6-7.
The issue before us, then, is as follows:

ISSUE
Under § 102, has the Examiner erred in rejecting claim 1 by finding
that Diggin necessarily discloses a photolithography apparatus adapted to
perform a photolithography process on a wafer?

FINDINGS OF FACT (FF)
1. Appellant states that a photolithograph apparatus “generally
includes a spin coater to coat a photoresist onto a wafer, an exposure unit to
expose the coated photoresist, a development unit to develop the exposed
photoresist, and a baking unit to bake the photoresist.” Spec. ¶ 0005.
2. A “photolithographic process” is defined as “[a] method of
producing integrated circuits and printed circuits by photographing (often at
considerable reduction) an enlarged pattern of the circuit on a suitable light-
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sensitized surface of metal or semiconductor, and chemically etching away
unwanted portions of the surface.”3
3. Diggin discloses a surface mount technology (SMT) production
system 1 that produces a circuit using a production machine to deposit an
item (e.g., glue deposits, solder deposits, and electronic components) on a
substrate, such as a printed circuit board (PCB). Diggin’s SMT production
system 1 includes two placement machines 2, a measurement machine 3, and
a PCB conveyor 4. Diggin, col. 1, ll. 7-10, 29-33; col. 3, ll. 37-44; Fig. 1.
4. Diggin discloses that the deposited items can also be screen-
printed glue dots or solder pads. Diggin, col. 4, ll. 39-44.
5. Zohar discloses a common prior art method for soldermask
applications to high end PCBs involves photolithography. SMT pads can be
placed on PCBs. Zohar, ¶¶ 0005, 0021.
6. Baek disclose packaged integrated circuit devices, including SMT
packaging, are attached to PCBs. Various techniques are used to form layers
for a wafer level integrated circuit device, including photolithography.
Baek, ¶¶ 0003, 0029, 0031.
7. Ho discusses integrated circuit packages, including SMT
packages, attached to a PCB. Ho also discloses flip chip packages and that a
conventional flip chip package has a solder mask defined and a non-solder
mask defined. Solder masks are formed using photolithography. Ho, ¶¶
0006-10.

3 Stan Gibilisco, The Illustrated Dictionary of Electronics 531 (2001)
(“Gibilisco”).
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8. Cho discloses a method of making a particular PCB with a
mounted chip package. According to Cho, a semiconductor package can be
classified as a SMT type where the package is mounted on a surface of a
PCB. Cho also notes that photolithography is used to selectively remove
photosensitive substances that assist in forming a portion where a chip
package is to be mounted. Cho, ¶¶ 0005, 0010, 0025, 0051.

PRINCIPLES OF LAW
During examination of a patent application, a claim is given its
broadest reasonable construction “in light of the specification as it would be
interpreted by one of ordinary skill in the art.” In re Am. Acad. of Sci. Tech
Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004) (internal citations and quotations
omitted). “[T]he words of a claim ‘are generally given their ordinary and
customary meaning.’” Phillips v. AWH Corp., 415 F.3d 1303, 1312 (Fed.
Cir. 2005) (en banc) (internal citations omitted). “[T]he ordinary and
customary meaning of a claim term is the meaning that the term would have
to a person of ordinary skill in the art in question at the time of the invention,
i.e., as of the effective filing date of the patent application.” Id. at 1313.

ANALYSIS
Claims 1-4, 6, and 8-15
This appeal hinges on one key question: Does Diggin necessarily
disclose a photolithography apparatus adapted to perform a
photolithography process on a wafer as recited in claim 1?

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To answer this question, we therefore construe a “photolithography
apparatus” in light of Appellant’s disclosure. See Am. Acad., 367 F.3d at
1364 (internal citations omitted). The Specification states a
photolithography apparatus generally includes a spin coater, an exposure
unit, a development unit, and a baking unit. See FF 1. However, this by no
means defines a photolithography apparatus and, thus, a photolithography
apparatus is not limited to these structures. See id. The phrase
“photolithography apparatus” will therefore be given its ordinary and
customary meaning. See Phillips, 415 F.3d at 1312-13.
A photolithography apparatus in the context of electronics includes an
apparatus that produces integrated circuits and printed circuits by
photographing a circuit pattern on a suitable light-sensitized surface and
chemically removing unwanted portions of the surface. See FF 2. Thus,
when giving the term, “a photolithography apparatus,” its customary
meaning to an ordinarily skilled person at the time of the invention, a
photolithography apparatus includes structure that photographs a pattern on
a light-sensitive surface (e.g., an exposure unit) and chemically removes
unwanted portions of the surface (e.g., a development unit). Lastly, as the
recitation, “adapted to perform a photolithography process on a wafer,” only
recites the intended use of the photolithography apparatus, this phrase adds
no further structural limitation to the photolithography apparatus. With this
construction in mind, we turn to Diggin.
Diggin discloses a SMT production system that produces a circuit
using a production machine to deposit an item (e.g., glue deposits, solder
deposits, and electronic components) on a substrate. FF 3. While not
clearly mapping what structure in Diggin reads on the claimed
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photolithography apparatus (see Ans. 3-4), the Examiner alleges that using
photolithography in an SMT environment is well known. See Ans. 4. Even
assuming that this is the case, however, the Examiner must still show Diggin
necessarily uses a photolithography apparatus (in connection with SMT or
otherwise) to support the Examiner’s anticipation rejection. That is, for
anticipation, the Examiner must show that a photolithography apparatus is
necessarily disclosed within the four corners of Diggin—either expressly or
inherently. Neverthless, the Examiner cites Diggin, Zohar, Cho, Ho, and
Baek to support the Examiner’s anticipation position. See id.
Upon reviewing these cited references (see id.), we cannot say that
SMT necessarily uses a photolithography apparatus as the Examiner seems
to suggest. First, Diggin discloses a structure that screen prints glue dots or
solder pads. FF 4. This disclosed structure, however, does not necessarily
photograph a pattern on a light-sensitive surface or chemically remove
unwanted portions of the surface in forming the screen prints. Zohar
discloses a common prior art method for soldermask applications to PCBs,
including using SMT, involves photolithography. FF 5. Thus, while Zohar
discloses that photolithography will commonly be used when applying a
soldermask to printed circuits or using photolithography is probable, Zohar
fails to demonstrate that such structure is necessarily a part of SMT or such
structure is inherent to SMT products. See In re Robertson, 169 F.3d 743,
745 (Fed. Cir. 1999). Similarly, Baek disclose one of many techniques used
to form layers of a SMT packaged integrated circuit that includes
photolithography (FF 6), but does disclose photolithography is necessarily
used.
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Ho also discusses solder masks in the context of conventional flip
chip packages are formed using photolithography. See FF 7. Ho also
discloses SMT packages mounted to a PCB. Id. Ho, however, does not
show that SMT packages are necessarily flip chip packages. Also, Ho
discloses using a solder mask in forming conventional flip chip packages
(see id.), but does not state photolithography is used to form all flip chip
packages. Lastly, Cho discloses a technique for fabricating a PCB having a
mounted chip package that uses photolithography. FF 8. Nonetheless, Cho
fails to disclose that all PCBs are necessarily manufactured using a structure
that performs photolithography. Moreover, this disclosure does not
necessarily mean that all disclosed SMT packages, including those disclosed
in Diggin, are chip packages that were fabricated with a photolithographic
technique. See id.
Diggin’s SMT production system also includes two placement
machines 2. See FF 3. However, the placement machines are not described
as having structure to photograph a pattern on a light-sensitive surface and
chemically removes unwanted portions of the surface. See id. We therefore
cannot say that Diggin’s SMT production system and a PCB necessarily
includes a photolithography apparatus as recited in claim 1 or a structure that
photographs a pattern on a light-sensitive surface and chemically removes
unwanted portions of the surface.
For the foregoing reasons, Appellant has persuaded us of error in the
anticipation rejection of: (1) independent claim 1; (2) independent claim 10
which recites commensurate limitations; and (3) dependent claims 2-4, 6, 8,
9, 11, and 13-15 for similar reasons.

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Claims 16-18 and 20
Relying on the same explanation for claim 1 (see Ans. 3-4), the
Examiner finds that Diggin discloses all the recited limitations in claim 16.
Appellant mainly refers to the arguments presented for claim 1 in disputing
the anticipation rejection for claim 16 (see Br. 12), including that Diggin
does not: (1) relate to wafers or a feature formed on a wafer by a
photolithography process; (2) have a measurement device that measures data
regarding characteristics of a feature formed on a wafer; and (3) a system
that controls a photolithography apparatus. See Br. 6-7.
The issues before us, then, are as follows:

ISSUES
Under § 102, has the Examiner erred by finding that Diggin discloses:
(a) a control system adapted to control one or more photolithography
apparatus, and
(b) a control system comprising a measurement unit adapted to
measure a characteristic of a feature formed on a wafer by the
photolithography process?

ADDITIONAL FINDINGS OF FACT (FF)
9. Diggin discloses a production system 1 that includes a closed loop
controller 6 having an automatic closed loop (ACL) client 10 associated with
each placement machine 2 and a measurement server computer 11
associated with the measurement machine 3. Diggin, col. 3, ll. 45-49; Fig. 1.

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10. All communication links are over TCP/IP. Signals flow as shown
using arrows in Figure 2. Links 20 and 21 provide the measurement server
with data inspected by the measurement machine 3. Link 22 provides
measurement data which can be provided to ACL client 10 using link 23.
Diggin, col. 3, ll. 49-67; Fig. 2.
11. Diggin states the clients 10 form an interface with different
production machines using TCP/IP. Diggin, col. 6, ll. 62-65; Fig. 1.
12. Diggin discloses the measurement unit 3 measures production and
other characteristics, including angles, offsets, and error codes. Diggin, col.
3, ll. 50-58; col. 5, ll. 1-65; Fig. 1.

ANALYSIS
The scope of representative independent claim 16 differs from
independent claim 1. Claim 16 does not positively recite a photolithography
apparatus or require such a structure. Rather, claim 16 is directed to a
control system adapted to control a photolithography apparatus. Thus, when
given its broadest reasonable construction construed, the phrase “adapted to
control one or more photolithography apparatus” is considered intended use.
Diggin therefore need only be capable of controlling a photolithography
apparatus. We therefore disagree with Appellant (Br. 7) that Diggin must
disclose a system that controls a photolithography apparatus.
Diggin discloses a control system or production system 1 that includes
a closed loop controller 6 having clients 10 and a server 11 and connected to
other components (e.g., placement machines 2, measurement machine 3)
using communication links over TCP/IP. FF 9-10. Diggin also states the
clients 10 form an interface with different production machines. FF 11.
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Since this control system 6 connects to other apparatuses (e.g. machines 2,
3) and communication signals flow between client 10 and the machines (FF
9-11), Diggin discloses a control system (e.g., controller 6) capable of
controlling various apparatus, including a photolithography apparatus, using
communication signals.
Appellant also asserts that Diggin fails to teach the recited
measurement unit because Diggin does not disclose measuring a
characteristic of a feature formed on a wafer by the photolithography device.
Br. 6-7. In particular Appellant states the measurement device or SJ-10
machine 3 measures solder paste and joints and not data regarding a feature
of the wafer. See Br. 6. However, mere lawyer’s arguments that are
unsupported by factual evidence are entitled to little probative value. See In
re Geisler, 116 F.3d 1465, 1470 (Fed. Cir. 1997).
Moreover, claim 16 recites measuring one or more features of a wafer
as intended use. That is, claim 16 recites a measurement unit “adapted to
measure one or more characteristic of a feature formed on the wafer by the
photolithography process.” Diggin thus only needs to have a measurement
unit capable of measuring a characteristic of a feature formed on a wafer by
a photolithography process. Since Diggin’s measurement unit 3 measures
characteristics, including angles and offsets (see FF 12), we find that
Diggin’s measurement unit is also capable of measuring characteristics of a
feature (e.g., particular angles and offset) formed on wafer by a
photolithography process.
Lastly, Appellant asserts that the Examiner has not cited or mapped
anything in Diggin to the recited “means for setting a condition upon the
satisfaction of which the measured data is to be transmitted to the destination
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address.” Br. 12. We disagree. The Examiner cites to Diggin’s discussion
of TCP/IP transmission and to meet this limitation. See Ans. 4, 8-9.
Appellant has not further challenged that this portion of Diggin’s fails to
teach the recited means.
For the foregoing reasons, Appellant has not persuaded us of error in
the anticipation rejection of: independent claim 16 and claims 17, 18, and 20
not separately argued with particularity.

THE OBVIOUSNESS REJECTION OVER DIGGIN AND AAPA
Claims 5 and 12
Claim 5 depends from independent claim 1, and claim 12 depends
from independent claim 10. Because we find that the Examiner’s reliance
on AAPA does not cure the deficiencies noted previously in connection with
independent claims 1 and 10, we likewise will not sustain the rejection of
claims 5 and 12.

Claim 19
Regarding claim 19, the Examiner finds the AAPA admits that control
system for photolithography apparatuses include a line width measurement
unit and an overlay alignment unit. Ans. 4-5. The Examiner then states that
Diggin relates to a system that “would inherently include photolithographic
devices analogous to those instantly claimed” (Ans. 5), including the
admitted line width measurement unit and an overlay alignment unit.
Appellant argues that Diggin would not inherently have a photolithography
device and thus the measurement devices recited in claim 19. Br. 13.

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The issue before us, then, is as follows:

ISSUE
Under § 103, has the Examiner erred in rejecting claim 19 by finding
that Diggin inherently discloses a photolithography apparatus and, when
combining this reasoning with the AAPA’s teaching, collectively would
have taught or suggested a measurement unit comprising a line width
measurement unit and an overlay alignment unit?

ANALYSIS
As stated above in connection with claim 1, we disagree with the
Examiner that Diggin would inherently have a photolithography device.
Thus, the Examiner’s basis for combining Diggin with the AAPA’s control
system for a photolithography apparatus having a measurement unit
comprising a line width measurement unit and an overlay alignment unit is
built on a flawed presumption. While including a photolithographic device
with Diggin’s may be obvious from the prior art (see FF 4-8), the
obviousness rejection was not based on this reasoning. Rather, the Examiner
relies on the Diggin’s system to disclose that the system inherently has such
a photolithography device. See Ans. 5. We are therefore constrained to find
that Diggin and AAPA, as combined by Examiner, would not have taught or
suggested a measurement unit comprising a line width measurement unit and
an overlay alignment unit as recited in claim 19.

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THE OBVIOUSNESS REJECTION OVER DIGGIN AND QUINONES
Claim 7 depends from independent claim 1. Because we reverse the
Examiner’s anticipation rejection of independent claim 1, we likewise will
not sustain the rejection of claim 7.

CONCLUSION
The Examiner did not err in rejecting claims 16-18 and 20 under
§ 102. The Examiner, however, erred in rejecting (1) claims 1-4, 6, 8-11,
and 13-15 under § 102, and (2) claims 5, 7, 12, and 19 under § 103.

ORDER
The Examiner’s decision rejecting claims 1-20 is affirmed-in-part.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED-IN-PART

pgc

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