Ex Parte KAMIKO et al

Patent Trial and Appeal Board

Sep 26, 2018

14836632 (P.T.A.B. Sep. 26, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/836,632 08/26/2015
18052 7590 09/28/2018
Eschweiler & Potashnik, LLC
Rosetta Center
629 Euclid Ave., Suite 1000
Cleveland, OH 44114
FIRST NAMED INVENTOR
TaroKAMIKO
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
INTP383WOUSA 1049
EXAMINER
VERBRUGGE, KEVIN
ART UNIT PAPER NUMBER
2132
NOTIFICATION DATE DELIVERY MODE
09/28/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docketing@eschweilerlaw.com
inteldocs _ docketing@cpaglobal.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte TARO KAMIKO, YAO CRYE LEE, GANESHA NAY AK, and
JIN SZE SOW
Appeal2018-001228
Application 14/836,632
Technology Center 2100
Before ERIC B. CHEN, JEREMY J. CURCURI, and
NABEEL U. KHAN, Administrative Patent Judges.
CHEN, Administrative Patent Judge.
DECISION ON APPEAL
Appeal2018-001228
Application 14/836,632
This is an appeal under 35 U.S.C. § I34(a) from the final rejection of
claims 1--44, all the claims pending in the application. We have jurisdiction
under 35 U.S.C. § 6(b). We reverse.
STATEMENT OF THE CASE
Appellants' 1 invention relates to updating an internal memory on a
semiconductor device from an external memory, including the steps of
writing a first data portion from the external memory to the internal memory,
processing the first data portion, and writing a second data portion from the
external memory to the internal memory while the first data portion is being
processed. (Abstract.)
Claim 1 is exemplary, with disputed limitations in italics:
1. A method for updating an internal memory on a
semiconductor device from an external memory, data in the
external memory being arranged for flow in a plurality of data
portions, the method comprising:
writing a first data portion from the external memory to
the internal memory;
processing the first data portion; and
while the first data portion is being processed, once a
selected data item of the first data portion is processed, starting
to write a second data portion from the external memory to the
internal memory.
Claims 1--44 stand rejected under 35 U.S.C. § 103(a) as unpatentable
over Lahti (US 5,895,469; Apr. 20, 1999).
1 Appellants identify Lantiq Beteiligungs-GmbH & Co.KG as the real party
in interest. (App. Br. 1.)
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Application 14/836,632
ANALYSIS
We are persuaded by Appellants' arguments (App. Br. 5-7) that Lahti
would not have rendered obvious independent claim 1, which includes the
limitation "while the first data portion is being processed, once a selected
data item of the first data portion is processed, starting to write a second data
portion from the external memory to the internal memory."
The Examiner found that cache unit 16 of Lahti, which can be read by
audio generator 12 while another audio sample is being transferred from
system memory 14 to cache unit 16, corresponds the limitation "while the
first data portion is being processed ... starting to write a second data
portion from the external memory to the internal memory." (Final Act. 3;
see also Ans. 4.) The Examiner acknowledged that Lahti does not teach the
limitation "once a selected data item of the first data portion is processed,
starting to write a second data portion from the external memory to the
internal memory," but concluded that
it would have been obvious ... to start the writing of the second
portion once a selected data item is processed because this
provides a simple, independent marker which, when processed,
indicates that the processing has reached a certain point and the
timing is right for the starting of the processing of the next
portion.
(Final Act. 3; see also Ans. 5.) We do not agree.
Lahti relates to "reducing the access time for devices such as a Digital
Signal Processor (DSP) to retrieve an audio sample from system memory by
using a wave table cache." (Col. 1, 11. 22-25.) Figure 1 of Lahti illustrates a
block diagram of wave table cache system 10 (col. 2, 11. 61-63), including
audio generator 12, system memory 14, and cache unit 16 (col. 3, 11. 8-9).
Lahti explains that "[i]f the audio sample is not stored in the cache unit 16,
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Appeal2018-001228
Application 14/836,632
the requested audio sample is transferred from the system memory 14 ... to
the cache unit 16." (Col. 3, 11. 16-19.) Moreover, Lahti explains that
[ t ]he ability to double buffer the audio samples in the cache unit
16 increases the overall efficiency of the system 10 by allowing
the audio generator 12 to read an audio sample from the cache
unit 16 while another audio sample is being transferred from the
system memory 14 to the cache unit 16.
(Col. 3, 11. 57---61.)
Although the Examiner cited to cache unit 16 of Lahti, the Examiner
has provided insufficient evidence to support a finding that "while the first
data portion is being processed, once a selected data item of the first data
portion is processed, starting to write a second data portion from the external
memory to the internal memory" ( emphasis added). In particular, while
Lahti generally explains that "audio generator 12 ... read[s] an audio
sample from the cache unit 16 while another audio sample is being
transferred from the system memory 14 to the cache unit 16," Lahti is silent
respect to when the process of transferring "another" audio sample begins
relative to the audio sample being read. On this record, the Examiner has
not demonstrated that Lahti teaches the limitation "while the first data
portion is being processed, once a selected data item of the first data portion
is processed, starting to write a second data portion from the external
memory to the internal memory."
Accordingly, we are persuaded by Appellants' arguments that
a writing of a second data portion (i.e., the next audio sample) is
not initiated based upon a selected data item of the first data
portion being processed by the audio generator 12 (i.e., the
conversion of an earlier audio sample being transformed into
sound), but instead is initiated upon a request from the audio
generator 12
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Application 14/836,632
(App. Br. 5 (emphasis omitted)) and "[n]o teaching exists in Lahti et al. that
the request from the audio generator has any relationship with another piece
of data being processed as claimed" (id. at 6-7 (emphasis omitted)).
Thus, we do not sustain the rejection of independent claim 1 under
35 U.S.C. § 103(a). Claims 2-20 depend from claim 1. We do not sustain
the rejection of claims 2-20 under 35 U.S.C. § 103(a) for the same reasons
discussed with respect to claim 1.
Independent claims 21 and 34 recite limitations similar to those
discussed with respect to claim 1. We do not sustain the rejection of claims
21 and 34, as well as dependent claims 22-33 and 35--44, for the same
reasons discussed with respect to claim 1.
DECISION
The Examiner's decision rejecting claims 1--44 is reversed.
REVERSED
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